Age | Commit message (Collapse) | Author | Files | Lines |
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for undefined symbols.
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2001-10-17 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (sb1-ext-ps): New test to test
SB-1 core's paired-single extensions to the MIPS64 ISA.
* gas/mips/sb1-ext-ps.d: New file.
* gas/mips/sb1-ext-ps.s: New file.
[include/opcode/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips.h (INSN_SB1): New cpu-specific instruction bit.
(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
if cpu is CPU_SB1.
[opcodes/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
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* doc/as.texinfo (MIPS ISA options): Added accidentally
omitted "-mips64" option to list of options.
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* config/tc-ppc.c (md_show_usage): Add missing -maltivec, -m7400,
-m7410, -m7450 and -m7455 options.
[gas/testsuite/ChangeLog]
* gas/ppc/altivec.s: New test for AltiVec.
* gas/ppc/altivec.d: New file.
* gas/ppc/ppc.exp: Test altivec.s
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE64): Fix typo.
[opcodes/ChangeLog]
* ppc-opc.c (STRM): New AltiVec operand.
(XDSS): New AltiVec instruction form.
(mtvscr): Correct operand list.
(dst, dstt, dstst, dststt, dss, dssall): AltiVec instructions.
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(ppc_size): Select PPC_OPCODE_64 if 64 bit.
(md_begin): Don't set ppc_size here.
(ppc_target_format): Test ppc_size as well as BFD_DEFAULT_TARGET_SIZE.
(md_shortopts): Constify.
(md_longopts): Likewise.
(md_longopts_size): Likewise.
(ppc_elf_suffix): Only allow 64-bit relocs when ppc_size specifies
64-bit opcodes.
(ppc_machine): Explain why this function is a nop.
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* config/tc-mips.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-arc.c (arc_code_symbol): Remove unnecessary test.
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that autoheader doesn't duplicate config.in entries.
(DEFAULT_ARCH): Ditto.
* configure: Regenerate.
* config.in: Regenerate.
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(big): New function.
(little): Remove shl handling. Emit error for endian mismatch.
(md_show_usage): Add description of -big.
(md_parse_option): Handle OPTION_BIG. Remove shl handling.
(OPTION_BIG): Add.
(md_pseudo_table): Add .big.
(md_longopts): Add -big.
(md_begin): Don't set target_big_endian here.
* config/tc-sh.h (TARGET_BYTES_BIG_ENDIAN): Remove.
(LISTING_HEADER, COFF_MAGIC, TARGET_FORMAT): Use target_big_endian.
(shl): Remove.
* configure.in (endian): Default is big.
(sh-*-pe*): Little endian.
(cpu_type): Set sh for target sh*.
* configure: Regenerate.
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relocations.
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* gas/ppc/booke.s (rfci, wrtee, wrteei, mfdcrx, mfdcr, mtdcrx,
mtdcr, msync, dcba, mbar): New BookE tests.
* gas/ppc/booke.d: Update for new BookE tests.
[opcodes/ChangeLog]
* ppc-opc.c (MO): New macro for MO field of mbar instruction.
(powerpc_opcodes): Add rfci, wrtee, wrteei, mfdcrx, mfdcr,
mtdcrx, mtdcr, msync, dcba and mbar as BookE instructions.
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* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
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* config/tc-cris.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-tahoe.c: Likewise.
* config/tc-v850.c: Likewise.
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* bit_fix.h: Likewise.
* expr.c: Likewise.
* itbl-ops.c: Likewise.
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(mips_cpreturn_register): Likewise.
(mips_gp_register): Likewise.
(s_cpsetup): New function prototype.
(s_cplocal): Likewise.
(s_cpreturn): Likewise.
(s_gpvalue): Likewise.
(mips_pseudo_table): Add .cpsetup, .cplocal, .cpreturn, .gpvalue
pseudo-ops.
(macro): Don't warn about .cprestore for NewABI.
(md_pcrel_from): Code cleanup.
(mips_force_relocation): Force output of some NewABI relocations even
without a defined symbol.
(s_cpload): Ignore .cpload for NewABI.
(s_cpsetup): Handle .cpsetup.
(s_cplocal): Handle .cplocal.
(s_cprestore): Ignore .cprestore for NewABI.
(s_cpreturn): Handle .cpreturn.
(s_gpvalue): Handle .gpvalue.
(s_cpadd): Ignore .cpadd for NewABI.
(nopic_need_relax): Take g_switch_value into account as gp
optimization.
(tc_gen_reloc): Don't handle BFD_RELOC_MIPS_{CALL,GOT}* for NewABI.
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(small_ex_type): Named this enum, more return values for
my_getSmallExpression.
(mips_ip): Allow SPC and HT between arguments. Handle some NewABI
triple relocations. Protect some parts with ifdef OBJ_ELF.
(percent_op_match): New struct, lookup table for %some_reloc().
(my_getSmallParser): New function, parses nested percent_ops also.
(my_getSmallExpression): Rewite to support nested percent_ops.
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(load_address): Support both 32- and 64-bit addresses.
(macro): Call load_register correctly. Expand 64-bit loads ans stores.
(macro2): Call load_address correctly.
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throughout file.
(obj_elf_change_section): Rename "group" to "group_name".
(obj_elf_section): Likewise.
(elf_frob_file): Don't use sec->lineno for SHT_GROUP section to store
first member section; Instead use elf_next_in_group.
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Set elf_section_data group from it. Warn if group name changed.
(obj_elf_parse_section_letters): Parse 'G' too.
(obj_elf_section): Parse group name.
(struct group_list): New.
(build_group_lists): New function.
(elf_frob_file): Create SEC_GROUP section(s).
* config/obj-elf.c: (elf_copy_symbol_attributes): Zap trailing
whitespace.
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(cirrus_regtype): New enum.
(LONGEST_INST): Change to 10.
(CIRRUS_MODE1): New.
(CIRRUS_MODE2): New.
(CIRRUS_MODE3): New.
(CIRRUS_MODE4): New.
(CIRRUS_MODE5): New.
(CIRRUS_MODE6): New.
(insns): Add cirrus dsp instructions.
(ARM_EXT_MAVERIKSC_REG): New.
(cirrus_register): New.
(cirrus_mvf_register): New.
(cirrus_mvd_register): New.
(cirrus_mvfx_register): New.
(cirrus_mvdx_register): New.
(cirrus_mvax_register): New.
(ARM_EXT_MAVERIKsc_register): New.
(reg_table): Add cirrus registers.
(cirrus_valid_reg): New.
(cirrus_reg_required_here): New.
(do_c_binops_1): New.
(do_c_binops_2): New.
(do_c_binops_3): New.
(do_c_triple_4): New.
(do_c_triple_5): New.
(do_c_quad_6): New.
(do_c_dspsc_1): New.
(do_c_dspsc_2): New.
(do_c_shift_1): New.
(do_c_shift_2): New.
(do_c_ldst_1): New.
(do_c_ldst_2): New.
(do_c_ldst_3): New.
(do_c_ldst_4): New.
(do_c_binops): New.
(do_c_triple): New.
(do_c_quad): New.
(do_c_dspsc): New.
(do_c_shift): New.
(cirrus_parse_offset): New.
(do_c_ldst): New.
(md_parse_option): Add arm9e.
(md_show_usage): Same.
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* gas/doc/arm/c-arm.texi (ARM Options): Add arm9e documentation.
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* gas/testsuite/gas/arm/arm.exp: Run arm9e tests.
* gas/testsuite/gas/arm/maverick.c: New.
* gas/testsuite/gas/arm/maverick.d: New.
* gas/testsuite/gas/arm/maverick.s: New.
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* gas/testsuite/gas/arm/maverick.c: New.
* gas/testsuite/gas/arm/maverick.d: New.
* gas/testsuite/gas/arm/maverick.s: New.
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capitalise, no final period or newline, don't say "ignoring" for
as_bad messages. In some cases, change the wording to that used
elsewhere for similar messages.
(obj_elf_section_name): New function, split out from ..
(obj_elf_section): .. here. Correctly mask off SHF_MERGE if
entsize not specified.
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* emultempl/elf32.em (gld_*_list_options): Include -z combreloc and
-z nocombreloc in usage.
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* read.c (do_align): If in absolute section, warn about and ignore
non-zero fill pattern.
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reloc->sym_ptr_ptr if it's not allocated.
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relocation triple.
(prev_insn_fixp): Likewise.
(append_insn): Changed prototype to accept a relocation pointer.
(imm_reloc): Make it an array.
(offset_reloc): Likewise.
(md_assemble): Handle triple relocations.
(append_insn): Likewise. Add handling for some NewABI relocations.
(mips_no_prev_insn): Handle triple relocations.
(macro_build): Likewise. Add handling for some NewABI relocations.
Move handling for the 'u' case to append_insn().
(mips16_macro_build): Handle triple relocations.
(macro_build_lui): Likewise. Don't handle _gp_disp as special symbol
for NewABI.
(mips_ip): Handle triple relocations.
(mips16_ip): Likewise.
(mips_force_relocation): Force handling of triple relocations
without symbols for NewABI.
(md_apply_fix): Add handling for some NewABI relocations.
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x86_64, reject x86_64 register name matches.
(md_assemble): Remove now redundant check for x86_64 regs.
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as BFD_DEFAULT_TARGET_SIZE.
(ppc_tc): Likewise.
(ppc_is_toc_sym): Likewise.
(md_apply_fix3): Likewise.
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(mips_target_format): Move downwards in file, use HAVE_64BIT_OBJECTS
in it.
(mips_abi_level, mips_abi): New enum.
(mips_32bit_abi): Remove.
(HAVE*PRS): Use mips_abi instead of mips_32bit_abi.
(HAVE_NEWABI): New define.
(HAVE_64BIT_OBJECTS): New define.
(HAVE_32BIT_ADDRESSES): Don't return true for 64bit objects.
(HAVE_64BIT_ADDRESSES): New define, inverse of HAVE_32BIT_ADDRESSES.
(support_64bit_objects): New prototype.
(md_begin): Use mips_abi instead of mips_32bit_abi. Don't write
.reginfo section for n32, use .MIPS.options instead.
(support_64bit_objects): New function, code from md_parse_option.
(md_longopts): Add -n32 option.
(md_parse_option): Use mips_abi instead of mips_32bit_abi/mips64.
Add -n32 option. Protect with OBJ_ELF.
(s_mipsset): Use mips_abi instead of mips_32bit_abi.
(mips_elf_final_processing): Likewise. Don't write .reginfo section
for n32, use .MIPS.options instead.
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opcodes/po/POTFILES.in
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bits if target is 64 bit.
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