Age | Commit message (Collapse) | Author | Files | Lines |
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* gas/ia64/opc-i.d: Change pmin2.u to pmin2. Change pmax2.u to pmax2.
Change MLI to MLX. Switch operands for output matching tbit.z.orcm,
tbit.z.andcm, tbit.nz.orcm, tbit.nz.andcm, tnat.z.orcm, tnat.z.andcm,
tnat.nz.orcm, tnat.nz.andcm inputs.
* gas/ia64/opc-i.pl: Insert padding nops before last dep.
* gas/ia64/opc-i.s: Regenerate.
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Remove incomplete v5e code from tc-arm.c
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* gas/ia64/opc-i.s: Regenerate.
* gas/ia64/opc-f.pl: Add explicit stop at end.
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* configure: Rebuilt.
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* config/tc-hppa.c (CHECK_ALIGN): New macro.
Added handling of new operand types l,y,&,fe,fE,fx.
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bundling a non-delayed branch type instruction.
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(md_assemble): Use it.
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* config/tc-i386.c (offset_in_range): Use addressT instead of
bfd_vma for none bfd assemblers.
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Fix a couple of 64 bit nits.
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Add M32R docs to as.texinfo
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Add ``-W -Wall'' to sub-directories bfd, binutils, gas gprof, ld and
opcodes by the addition of WARN_CFLAGS to Makefile.am and configury to
set it. Add configure option --enable-build-warnings.
Re-generate all and sundry using auto*-000227.
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* sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
stc GBR,@-<REG_N> is available for arch_sh1_up.
Group parallel processing insn with identical mnemonics together.
Make three-operand psha / pshl come first.
gas:
* config/tc-sh.c (get_operands): There's no third operand if the
first operand is an immediate.
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opcodes:
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
gas:
* config/tc-sh.c (immediate): Delete.
(sh_operand_info): Add immediate member.
(parse_reg): Use A_PC for pc.
(parse_exp): Add second argument 'op'. All callers changed.
(parse_at): Expect pc to be coded as A_PC.
Use immediate field in *op.
(insert): Add fourth argument 'op'. All callers changed.
(build_relax): Add second argument 'op'. All callers changed.
(insert_loop_bounds): New function.
(build_Mytes): Remove DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(assemble_ppi): Use immediate field in *operand.
(sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL.
include/coff:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
include/elf:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.
bfd:
* reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
BFD_RELOC_SH_LOOP_END.
* elf32-sh.c (sh_elf_howto_tab): Change special_func to
sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
(sh_elf_reloc_loop): New function.
(sh_elf_reloc): No need to test for always-to-be-ignored relocs
any more.
(sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
(sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
* bfd-in2.h, libbfd.h: Regenerate.
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TC_CHECK_ADJUSTED_BROKEN_DOT_WORD.
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xgettext can find it. Regnerate .pot files.
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(md_begin): Likewise.
(HAVE_AM33): New macro.
(md_assemble): Use it. Match r_regs and xr_regs only if
HAVE_AM33.
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call TC_CHECK_ADJUSTED_BROKEN_DOT_WORD for each word after
adjustments.
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quantities. Correct right shift sign extension.
(build_insn): Make `number' unsigned long. Mask top 6 bits of
32-bit value when shifting into place.
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* config/tc-ppc.c: Likewise.
(ppc_size): Make unsigned long.
(ppc_insert_operand): Add casts to avoid warnings.
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with 32 bits, not with the unsigned shorter opcodes.
* gas/mn10300/basic.exp: Likewise.
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stream.
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difference, list them all.
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Add test of assembling "bal" instruction
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line is 4. Fix tests for LISTING_WORD_SIZE==1.
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string literal.
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messages with capital. Don't malign Unixware, malign SysV386 instead.
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