Age | Commit message (Collapse) | Author | Files | Lines |
|
* config/bfin-parse.y (gen_multi_instr_1): New function.
(asm): Use it instead of bfin_gen_multi_instr.
(error): Add a format string when calling as_bad.
* config/bfin-defs.h (insn_regmask): Declare.
* config/tc-bfin.c (DREG_MASK, DREGH_MASK, DREGL_MASK, IREG_MASK): New
macros.
(decode_ProgCtrl_0, decode_LDSTpmod_0, decode_dagMODim_0,
decode_dagMODik_0, decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0,
decode_LDSTii_0, decode_dsp32mac_0, decode_dsp32mult_0,
decode_dsp32alu_0, decode_dsp32shift_0, decode_dsp32shitimm_0,
insn_regmask): New functions.
gas/testsuite/
* gas/bfin/parallel.s: Add more test cases.
* gas/bfin/parallel.d: Update accordingly.
* gas/bfin/resource_conflict.l: New test.
* gas/bfin/resource_conflict.s: New test.
* gas/bfin/bfin.exp: Add resource_conflict.
|
|
|
|
* config/tc-arm.c (do_t_mov_cmp): Do not silently ignore shifted
operands.
* gas/arm/t16-bad.l: Update expected messages for moves with
shifted operands.
|
|
Fix compilation of i386-*-go32.
* config/tc-i386.c (i386_target_format <TE_GO32>): New.
(i386_target_format <OBJ_MAYBE_COFF>): Compile only if !TE_GO32.
* config/te-go32.h (TARGET_FORMAT): Move the definition ...
* config/tc-i386.h <!i386_target_format>: ... here.
|
|
gas/testsuite/
* gas/arm/sp-pc-usage-t.d: New test case.
* gas/arm/sp-pc-usage-t.s: New file.
|
|
From Mike Frysinger <michael.frysinger@analog.com>
* elf32-bfin.c (bfin_howto_table, bfin_reloc_map, bfin_check_relocs,
bfin_final_link_relocate, bfin_relocate_section, bfin_gc_sweep_hook,
_bfinfdpic_emit_got_relocs_plt_entries, bfinfdpic_relocate_section,
bfinfdpic_gc_sweep_hook, bfinfdpic_check_relocs,
bfin_finish_dynamic_symbol, bfd_bfin_elf32_create_embedded_relocs):
Adjust to match the renamed reloc definitions.
gas/testsuite/
From Mike Frysinger <michael.frysinger@analog.com>
* gas/bfin/reloc.d: Adjust for the renamed relocations.
include/elf/
From Mike Frysinger <michael.frysinger@analog.com>
* bfin.h (R_BFIN_UNUSED, R_BFIN_PCREL5M2, R_BFIN_UNUSED1,
R_BFIN_PCREL10, R_BFIN_PCREL12_JUMP, R_BFIN_RIMM16,
R_BFIN_LUIMM16, R_BFIN_HUIMM16, R_BFIN_PCREL12_JUMP_S,
R_BFIN_PCREL24_JUMP_X, R_BFIN_PCREL24, R_BFIN_UNUSEDB,
R_BFIN_UNUSEDC, R_BFIN_PCREL24_JUMP_L, R_BFIN_PCREL24_CALL_X,
R_BFIN_VAR_EQ_SYMB, R_BFIN_BYTE_DATA, R_BFIN_BYTE2_DATA,
R_BFIN_BYTE4_DATA, R_BFIN_PCREL11, R_BFIN_PUSH, R_BFIN_CONST,
R_BFIN_ADD, R_BFIN_SUB, R_BFIN_MULT, R_BFIN_DIV, R_BFIN_MOD,
R_BFIN_LSHIFT, R_BFIN_RSHIFT, R_BFIN_AND, R_BFIN_OR, R_BFIN_XOR,
R_BFIN_LAND, R_BFIN_LOR, R_BFIN_LEN, R_BFIN_NEG, R_BFIN_COMP,
R_BFIN_PAGE, R_BFIN_HWPAGE, R_BFIN_ADDR, R_BFIN_PLTPLC,
R_BFIN_GOT, R_BFIN_MAX): Renamed from R_unused0, R_pcrel5ms,
R_unused1, R_pcrel10, R_pcrel12_jump, R_rimm16, R_luimm16,
R_huimm16, R_pcrel12_jump_s, R_pcrel24_jump_x, R_pcrel24,
R_unusedb, R_unusedc, R_pcrel24_jump_l, R_pcrel24_call_x,
R_var_eq_symb, R_byte_data, R_byte2_data, R_byte4_data, R_pcrel11,
R_push, R_const, R_add, R_sub, R_mult, R_div, R_mod, R_lshift,
R_rshift, R_and, R_or, R_xor, R_land, R_lor, R_len, R_neg, R_comp,
R_page, R_hwpage, R_addr, R_pltpc, R_got.
|
|
* config/tc-arm.c (marked_pr_dependency, mapstate): Delete global
variables.
(mapping_state): Use the section's mapstate.
(mapping_state_2): Likewise. Skip special sections.
(s_arm_unwind_fnend): Use the section's marked_pr_dependency.
(arm_elf_change_section): Do not set deleted globals.
* config/tc-arm.h (struct arm_segment_info_type): Document
marked_pr_dependency.
gas/testsuite/
* gas/arm/mapping2.s: Test code after .ident.
|
|
|
|
|
|
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}.
* bfd/Makefile.in: Same.
* bfd/archures.c: Add bfd_arch_microblaze.
* bfd/bfd-in2.h: Regenerate.
* bfd/config.bfd: Add microblaze target.
* bfd/configure: Add bfd_elf32_microblaze_vec target.
* bfd/configure.in: Same.
* bfd/cpu-microblaze.c: New.
* bfd/elf32-microblaze.c: New.
* bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc().
* bfd/libbfd.h: Regenerate.
* bfd/reloc.c: Add MICROBLAZE relocations.
* bfd/section.c: Add struct relax_table and relax_count to section.
* bfd/targets.c: Add bfd_elf32_microblaze_vec.
* binutils/MAINTAINERS: Add self as maintainer.
* binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE &
EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(),
get_machine_name().
* config.sub: Add microblaze target.
* configure: Same.
* configure.ac: Same.
* gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to
TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add
DEP_microblaze_elf target.
* gas/Makefile.in: Same.
* gas/config/tc-microblaze.c: Add MicroBlaze assembler.
* gas/config/tc-microblaze.h: Add header for tc-microblaze.c.
* gas/configure: Add microblaze target.
* gas/configure.in: Same.
* gas/configure.tgt: Same.
* gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS.
* gas/doc/Makefile.in: Same.
* gas/doc/all.texi: Set MICROBLAZE.
* gas/doc/as.texinfo: Add MicroBlaze doc links.
* gas/doc/c-microblaze.texi: New MicroBlaze docs.
* include/dis-asm.h: Decl print_insn_microblaze().
* include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD.
* include/elf/microblaze.h: New reloc definitions.
* ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to
ALL_EMULATIONS, targets.
* ld/Makefile.in: Same.
* ld/configure.tgt: Add microblaze*-linux*, microblaze* targets.
* ld/emulparams/elf32mb_linux.sh: New.
* ld/emulparams/elf32microblaze.sh. New.
* ld/scripttempl/elfmicroblaze.sc: New.
* opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to
CFILES, microblaze-dis.lo to ALL_MACHINES, targets.
* opcodes/Makefile.in: Same.
* opcodes/configure: Add bfd_microblaze_arch target.
* opcodes/configure.in: Same.
* opcodes/disassemble.c: Define ARCH_microblaze, return
print_insn_microblaze().
* opcodes/microblaze-dis.c: New MicroBlaze disassembler.
* opcodes/microblaze-opc.h: New MicroBlaze opcode definitions.
* opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
|
|
block in case it is a null macro.
|
|
* gas/mips/jal-svr4pic.d, gas/mips/jal-xgot.d,
gas/mips/mips-abi32-pic2.d: Add R_MIPS_JALR relocations after jalr.
|
|
* config/tc-mips.c (MIPS_JALR_HINT_P): New define. For IRIX, it is
true for new abi. For non-IRIX targets, it is always true.
(macro_build_jalr): If MIPS_JALR_HINT_P, emit BFD_RELOC_MIPS_JALR.
|
|
2009-08-05 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add attiny2313a, attiny4313, attiny261a,
attiny861a, atmega644pa, attiny24a, attiny44a.
* doc/c-avr.texi: Likewise.
|
|
gas/
* doc/c-mips.texi (MIPS Opts): List 1004K options for -march.
* config/tc-mips.c (mips_cpu_info_table): Add 1004K cores.
|
|
testsuite/
* gas/arm/missing.s: New.
* gas/arm/missing.d: New.
* gas/arm/missing.l: New.
|
|
2009-08-02 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega8m1, atmega8c1, atmega16c1.
* doc/c-avr.texi: Likewise.
|
|
2009-08-01 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Add atmega8u2, atmega16u2, atmega32u2.
* doc/c-avr.texi: Likewise.
|
|
* binutils-all/arm/thumb2-cond.s: Use instructions instead of
.short.
gas/
* config/obj-elf.c (obj_elf_ident): Notify section change to the hook.
* config/tc-arm.c (make_mapping_symbol): New function, from
mapping_state. Save mapping symbols in the frag.
(insert_data_mapping_symbol): New.
(mapping_state): Use make_mapping_symbol, improve state transitions.
(mapping_state_2): New. Provide dummy definition.
(opcode_select): Do not call mapping_state.
(s_bss): Call md_elf_section_change_hook instead of mapping_state.
(output_inst): Update use of tc_frag_data.
(new_automatic_it_block): Call mapping_state before emitting the
IT instruction.
(md_assemble): Move mapping_state to just before outputting the
new instruction.
(arm_handle_align): Update use of tc_frag_data.
Call insert_data_mapping_symbol.
(arm_init_frag): Update use of tc_frag_data. Call
mapping_state_2.
(arm_elf_change_section): Always update the mapping symbol FSM state.
(check_mapping_symbols): New function.
(arm_adjust_symtab): Use check_mapping_symbols.
* config/tc-arm.h (struct arm_frag_type): New.
(TC_FRAG_TYPE): Change to struct arm_frag_type.
(TC_FRAG_INIT): Pass max_chars.
(arm_init_frag): Update prototype.
gas/testsuite/
* gas/arm/mapdir.d, gas/arm/mapdir.s: New files.
* gas/arm/mapping.d: Adapted to new symbols generation.
* gas/arm/mapping2.d: New test case.
* gas/arm/mapping2.s: New file.
* gas/arm/mapping3.d: New test case.
* gas/arm/mapping3.s: New file.
* gas/arm/mapping4.d: New test case.
* gas/arm/mapping4.s: New file.
* gas/arm/mapshort-eabi.d: Adapted to new symbols generation.
* gas/elf/section2.e-armeabi: Adapted to new symbols generation.
|
|
|
|
different syntaxes support by the ARM port.
(ARM Directives): Add entry for .syntax.
|
|
|
|
* symbols.c (S_FORCE_RELOC): True for BSF_GNU_INDIRECT_FUNCTION.
* config/tc-i386.c: Revert 2009-06-13 change.
* config/tc-i386.h: Likewise.
|
|
2009-07-28 Jan Beulich <jbeulich@novell.com>
* expr.c (op_rank): Specify size. Remove O_md* initializers.
|
|
(m68k_cpu): Add line for MCF5221x.
|
|
(mcf53017_ctrl): Fix RAMBAR.
|
|
2009-07-27 Jan Beulich <jbeulich@novell.com>
* obj-elf.c (elf_file_symbol): Replace symbol name set up by
symbol_new() with the passed in, unmodified one.
gas/testsuite/
2009-07-27 Jan Beulich <jbeulich@novell.com>
* gas/elf/file.[ds]: New.
* gas/elf/elf.exp: Run new test.
|
|
* config/tc-cr16.c (md_apply_fix): Put the addend value alone in to
object file without symbol values.
(tc_gen_reloc): For local symbols resolved or its absolute symbol,
then set the relocation type as NULL.
|
|
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
|
|
|
|
* config/obj-elf.c (obj_elf_ident): Set SEC_MERGE | SEC_STRINGS
flags on .comment section.
|
|
* spu.h (R_SPU_ADD_PIC): New.
bfd/
* reloc.c (BFD_RELOC_SPU_ADD_PIC): Define.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf32-spu.c (elf_howto_table): Add entries SPU_ADD_PIC.
(spu_elf_bfd_to_reloc_type): Handle SPU_ADD_PIC.
(spu_elf_relocate_section): Patch instructions marked by SPU_ADD_PIC.
gas/
* config/tc-spu.c (md_apply_fix): Handle SPU_ADD_PIC.
* config/tc-spu.h (tc_fix_adjustable): Don't adjust for SPU_ADD_PIC.
(TC_FORCE_RELOCATION): Emit relocs for SPU_ADD_PIC.
ld/testsuite/
* ld-spu/pic.d: New.
* ld-spu/pic.s: New.
* ld-spu/picdef.s: New.
|
|
2009-07-24 Jan Beulich <jbeulich@novell.com>
* tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx,
.nosse, and .noavx.
(cpu_flags_and_not): New.
(set_cpu_arch): Check whether sub-architecture specified is a
feature disable.
(md_parse_option): Likewise.
(parse_real_register): Don't return floating point register
when x87 functionality is disabled.
(md_show_usage): Add new sub-options.
* doc/c-i386.texi: Update with new command line sub-options.
gas/testsuite/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* gas/i386/8087.[ds]: New.
* gas/i386/287.[ds]: New.
* gas/i386/387.[ds]: New.
* gas/i386/no87.[ls]: New.
* gas/i386/no87-2.[ls]: New.
* gas/i386/i386.exp: Run new tests.
* gas/i386/att-regs.s: Also check FPU register access.
* gas/i386/intel-regs.s: Likewise.
* gas/i386/att-regs.d: Adjust expectations.
* gas/i386/intel-regs.d: Likewise.
opcodes/
2009-07-24 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add
frstpm.
* i386-gen.c (cpu_flag_init): Add FP enabling flags where needed.
(cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP.
(set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387.
* i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP):
Define.
(union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687,
and cpufisttp.
* i386-opc.tbl: Qualify floating point instructions by their
respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos,
and fsincos to be avilable only on 387. Fix fstsw ax to be
available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm,
and frstpm.
* i386-init.h, i386-tbl.h: Regenerate.
|
|
* config/tc-alpha.c: Fix up uses of gas printf like functions so
that the format string is a constant string. Add translation
support to message strings.
* config/tc-arc.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-cris.c: Likewise.
* config/tc-fr30.c: Likewise.
* config/tc-frv.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i370.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-m32r.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-mips.c: Likewise.
* config/tc-moxie.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-openrisc.c: Likewise.
* config/tc-pdp11.c: Likewise.
* config/tc-pj.c: Likewise.
* config/tc-s390.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh64.c: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-spu.c: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-v850.c: Likewise.
* config/tc-xc16x.c: Likewise.
* config/tc-xstormy16.c: Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* config/atof-ieee.c: Add translation support to as_warn
messages.
* config/obj-coff.c: Likewise.
|
|
|
|
|
|
gnu_unique_object.
* doc/as.texinfo: Document new feature of .type directive.
* NEWS: Mention support for gnu_unique_object symbol type.
* common.h (STB_GNU_UNIQUE): Define.
* NEWS: Mention the linker's support for symbols with a binding of
STB_GNU_UNIQUE.
* gas/elf/type.s: Add unique global symbol definition.
* gas/elf/type.e: Add expected readelf output for global unique
symbol.
* elfcpp.h (enum STB): Add STB_GNU_UNIQUE.
* readelf.c (get_symbol_binding): For Linux targeted files return
UNIQUE for symbols with the STB_GNU_UNIQUE binding.
* doc/binutils.texi: Document the meaning of the 'u' symbol
binding in the output of nm and objdump --syms.
* elf-bfd.h (struct elf_link_hash_entry): Add unique_global field.
* elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols
with the BSF_GNU_UNIQUE flag bit set.
* elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag
for symbols with STB_GNU_UNIQUE binding.
* elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols
with the STB_GNU_UNIQUE binding.
(elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for
symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for
symbols with the unique_global field set.
(elf_link_output_extsym): Set unique_global field for symbols with
the STB_GNU_UNIQUE binding.
* syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit.
(bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE
symbols.
(bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE
symbols.
* bfd-in2.h: Regenerate.
|
|
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
|
|
* doc/c-mips.texi (MIPS insn): Document the special behaviour of
the .global directive for MIPS ports.
|
|
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* config/tc-i386.c (i386_align_code): Tune for 32bit nops in
64bit.
(i386_target_format): Set cpu_arch_isa_flags.bitfield.cpulm
for 64bit.
gas/testsuite/
2009-07-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10420
* gas/i386/i386.exp: Run x86-64-nops-1-pentium.
* gas/i386/x86-64-nops-1-pentium.d: New.
|
|
* config/tc-i386.c (md_assemble): Update operand types.
(update_imm): Updated.
(finalize_imm): Update the first 2 immediate operands only
for instructions with 2 operands or more.
|
|
* config/tc-i386.c (md_assemble): Check implicit registers
only for instructions with 3 operands or less.
|
|
compile time warning.
|
|
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (md_assemble): Only check i.operands for AX.
(md_estimate_size_before_relax): Don't relax IFUNC symbols.
gas/testsuite/
2009-07-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run ifunc and x86-64-ifunc.
* gas/i386/ifunc.d: New,
* gas/i386/ifunc.s: Likewise.
* gas/i386/x86-64-ifunc.d: Likewise.
|
|
* config/tc-arm.c (md_apply_fix <BFD_RELOC_ARM_TARGET2>): Write
the offset for REL targets here.
gas/testsuite/
* gas/arm/target-reloc-1.s: New.
* gas/arm/target-reloc-1.d: New.
ld/testsuite/
* ld-arm/arm-target2.s: Add addend cases.
* ld-arm/arm-target2-rel.d: Adjust.
* ld-arm/arm-target2-abs.d: Adjust.
* ld-arm/arm-target2-got-rel.d: Adjust.
|
|
* listing.c (print_source): Initialize cache by NULL.
|
|
(mimplicit-it): Added right option.
|
|
(MAX_MEM_FOR_RS_ALIGN_CODE): Define in terms of
MAX_MEM_ALIGNMENT_BYTES.
* config/tc-arm.c (arm_frag_align_code): Replace hard coded
constant with MAX_MEM_FOR_RS_ALIGN_CODE.
* gas/arm/align64.s: New test case.
* gas/arm/align64.d: Expected disassembly.
|
|
* config/tc-arm.h (THUMB_IS_FUNC): Handle a NULL pointer.
(ARM_IS_FUNC): Likewise.
|
|
* config/tc-arm.c (md_assemble): Added validation.
gas/testsuite
* gas/arm/thumb-w-bad.d: New test case.
* gas/arm/thumb-w-bad.l: New file.
* gas/arm/thumb-w-bad.s: New file.
* gas/arm/thumb-w-good.d: New test case.
* gas/arm/thumb-w-good.s: New file.
|