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bfd/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* version.m4: Bump version to 2.25.51
* configure: Regenerate.
binutils/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
gas/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
gprof/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
ld/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
opcodes/
2014-10-15 Tristan Gingold <gingold@adacore.com>
* configure: Regenerate.
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If src contains n or more bytes, strncat() writes n+1 bytes to dest
(n from src plus the terminating null byte). Therefore, the size of
dest must be at least strlen(dest)+n+1.
* config/tc-tic4x.c (md_assemble): Correct strncat size.
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binutils/
2014-10-14 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.25.
gas/
2014-10-14 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.25.
ld/
2014-10-14 Tristan Gingold <gingold@adacore.com>
* NEWS: Add marker for 2.25.
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PR 17453
bfd/
* libbfd.c (COERCE16, COERCE32, COERCE64): Use unsigned types.
(EIGHT_GAZILLION): Delete.
binutils/
* dwarf.c (read_leb128): Avoid signed overflow.
(read_debug_line_header): Likewise.
gas/
* config/tc-i386.c (fits_in_signed_long): Use unsigned param and
expression to avoid signed overflow.
(fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word,
fits_in_signed_word, fits_in_unsigned_long): Similarly.
* expr.c (operand <'-'>): Avoid signed overflow.
* read.c (s_comm_internal): Likewise.
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* config/tc-sparc.c (sparc_md_end): Fix unused variable warnings.
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binutils. They were discussed and approved here:
https://sourceware.org/ml/binutils/2014-10/msg00038.html
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* as.c (create_obj_attrs_section): Move it and call it from ...
* write.c (create_obj_attrs_section): ... here.
(subsegs_finish_section): Refactored.
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Hash lookup is silly when we can attach the line table info directly
to sections instead. Worse, hash lookup fails when we have multiple
sections with the same name.
gas/
* dwarf2dbg.c (all_segs_hash): Delete.
(get_line_subseg): Delete last_seg, last_subseg, last_line_subseg.
Retrieve line_seg for section via seg_info.
* subsegs.h (segment_info_typet): Add dwarf2_line_seg.
gas/testsuite/
* gas/elf/group2.d, * gas/elf/group2.s: New test.
* gas/elf/elf.exp: Run it.
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gas/
PR gas/17421
* config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded
instructions in 16-bit mode.
gas/testsuite/
PR gas/17421
* gas/i386/i386.exp: Run inval-16.
* gas/i386/inval-16.l: New file.
* gas/i386/inval-16.s: Likewise.
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This patch ignores the MOD field in control/debug register move
instructions.
gas/testsuite/
* gas/i386/cdr.d: New file.
* gas/i386/cdr.s: Likewise.
* gas/i386/x86-64-cdr.d: Likewise.
* gas/i386/i386.exp: Run cdr and x86-64-cdr.
opcodes/
* i386-dis.c (MOD_0F20): Removed.
(MOD_0F21): Likewise.
(MOD_0F22): Likewise.
(MOD_0F23): Likewise.
(dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and
MOD_0F23 with "movZ".
(mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23.
(OP_R): Check mod/rm byte and call OP_E_register.
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* config/tc-m68k.c (md_assemble): Add assert to work around
bogus trunk gcc warning.
* config/tc-pj.h (md_convert_frag): Warning fix.
* config/tc-xtensa.c (xg_assemble_vliw_tokens): Warning fix.
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gas/
* config/tc-arm.c (move_or_literal_pool, add_to_lit_pool): Use
bfd_int64_t instead of int64_t.
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It is used to control which value is encoded in rounding control bits
for SAE-only EVEX instructions.
gas/
* config/tc-i386.c (evexrcig): New.
(build_evex_prefix): Force rounding bits.
(OPTION_MEVEXRCIG): New.
(md_longopts): Add mevexrcig.
(md_parse_option): Handle OPTION_MEVEXRCIG.
(md_show_usage): Document mevexrcig.
* doc/c-i386.texi (mevexrcig): Document new option.
gas/testsuite/
* gas/i386/avx512dq-rcig.s: New.
* gas/i386/avx512dq-rcigrd-intel.d: Likewise.
* gas/i386/avx512dq-rcigrd.d: Likewise.
* gas/i386/avx512dq-rcigrne-intel.d: Likewise.
* gas/i386/avx512dq-rcigrne.d: Likewise.
* gas/i386/avx512dq-rcigru-intel.d: Likewise.
* gas/i386/avx512dq-rcigru.d: Likewise.
* gas/i386/avx512dq-rcigrz-intel.d: Likewise.
* gas/i386/avx512dq-rcigrz.d: Likewise.
* gas/i386/avx512er-rcig.s: Likewise.
* gas/i386/avx512er-rcigrd-intel.d: Likewise.
* gas/i386/avx512er-rcigrd.d: Likewise.
* gas/i386/avx512er-rcigrne-intel.d: Likewise.
* gas/i386/avx512er-rcigrne.d: Likewise.
* gas/i386/avx512er-rcigru-intel.d: Likewise.
* gas/i386/avx512er-rcigru.d: Likewise.
* gas/i386/avx512er-rcigrz-intel.d: Likewise.
* gas/i386/avx512er-rcigrz.d: Likewise.
* gas/i386/avx512f-rcig.s: Likewise.
* gas/i386/avx512f-rcigrd-intel.d: Likewise.
* gas/i386/avx512f-rcigrd.d: Likewise.
* gas/i386/avx512f-rcigrne-intel.d: Likewise.
* gas/i386/avx512f-rcigrne.d: Likewise.
* gas/i386/avx512f-rcigru-intel.d: Likewise.
* gas/i386/avx512f-rcigru.d: Likewise.
* gas/i386/avx512f-rcigrz-intel.d: Likewise.
* gas/i386/avx512f-rcigrz.d: Likewise.
* gas/i386/x86-64-avx512dq-rcig.s: Likewise.
* gas/i386/x86-64-avx512dq-rcigrd-intel.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigrd.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigrne-intel.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigrne.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigru-intel.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigru.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigrz-intel.d: Likewise.
* gas/i386/x86-64-avx512dq-rcigrz.d: Likewise.
* gas/i386/x86-64-avx512er-rcig.s: Likewise.
* gas/i386/x86-64-avx512er-rcigrd-intel.d: Likewise.
* gas/i386/x86-64-avx512er-rcigrd.d: Likewise.
* gas/i386/x86-64-avx512er-rcigrne-intel.d: Likewise.
* gas/i386/x86-64-avx512er-rcigrne.d: Likewise.
* gas/i386/x86-64-avx512er-rcigru-intel.d: Likewise.
* gas/i386/x86-64-avx512er-rcigru.d: Likewise.
* gas/i386/x86-64-avx512er-rcigrz-intel.d: Likewise.
* gas/i386/x86-64-avx512er-rcigrz.d: Likewise.
* gas/i386/x86-64-avx512f-rcig.s: Likewise.
* gas/i386/x86-64-avx512f-rcigrd-intel.d: Likewise.
* gas/i386/x86-64-avx512f-rcigrd.d: Likewise.
* gas/i386/x86-64-avx512f-rcigrne-intel.d: Likewise.
* gas/i386/x86-64-avx512f-rcigrne.d: Likewise.
* gas/i386/x86-64-avx512f-rcigru-intel.d: Likewise.
* gas/i386/x86-64-avx512f-rcigru.d: Likewise.
* gas/i386/x86-64-avx512f-rcigrz-intel.d: Likewise.
* gas/i386/x86-64-avx512f-rcigrz.d: Likewise.
* gas/i386/i386.exp: Run new tests.
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Refactor each relaxation pattern to raise the maintainability.
In origin, all patterns is analysed in nds32_elf_relax_section,
so it is hard to debug and maintain. Therefore, we classify all
patterns into different functions in this patch.
Moreover, we adjust all optimizations into nds32_elf_relax_section
to take these optimizations in turn. This can promise all relaxation
being done after calling gld${EMULATION_NAME}_after_allocation.
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* config/tc-i386.c (OPTION_omit_lock_prefix): Renamed to ...
(OPTION_OMIT_LOCK_PREFIX): This.
(md_longopts): Updated.
(md_parse_option): Likewise.
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bfd/
* aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6.
* archures.c (bfd_architecture): Likewise.
* bfd-in2.h (bfd_architecture): Likewise.
(bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
* cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6.
* elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2
R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2,
R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16
and R_MIPS_PCLO16.
(mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
* elfn32-mips.c: Likewise.
* elfxx-mips.c (MIPSR6_P): New define.
(mipsr6_exec_plt_entry): New array.
(hi16_reloc_p): Add support for R_MIPS_PCHI16.
(lo16_reloc_p): Add support for R_MIPS_PCLO16.
(aligned_pcrel_reloc_p): New function.
(mips_elf_relocation_needs_la25_stub): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(mips_elf_calculate_relocation): Add support for relocs:
R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2,
R_MIPS_PCHI16 and R_MIPS_PCLO16.
(_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6.
(mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16.
(_bfd_mips_elf_check_relocs): Add support for relocs:
R_MIPS_PC21_S2 and R_MIPS_PC26_S2.
(_bfd_mips_elf_relocate_section): Add a check for unaligned
pc relative relocs.
(_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6
plt entry.
(mips_set_isa_flags): Add support for mips32r6 and mips64r6.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
(mips_32bit_flags_p): Add support for mips32r6.
* libbfd.h (bfd_reloc_code_real_names): Add entries for
BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2,
BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2.
* reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and
BFD_RELOC_MIPS_19_PCREL_S2.
binutils/
* readelf.c (get_machine_flags): Add support for mips32r6 and
mips64r6.
elfcpp/
* mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants.
gas/
* config/tc-mips.c (mips_nan2008): New static global.
(mips_flag_nan2008): Removed.
(LL_SC_FMT): New define.
(COP12_FMT): Updated.
(ISA_IS_R6): New define.
(ISA_HAS_64BIT_REGS): Add mips64r6.
(ISA_HAS_DROR): Likewise.
(ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6.
(ISA_HAS_ROR): Likewise.
(ISA_HAS_ODD_SINGLE_FPR): Likewise.
(ISA_HAS_MXHC1): Likewise.
(hilo_interlocks): Likewise.
(md_longopts): Likewise.
(ISA_HAS_LEGACY_NAN): New define.
(options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6.
(mips_ase): Add field rem_rev.
(mips_ases): Updated to add which ISA an ASE was removed in.
(mips_isa_rev): Add support for mips32r6 and mips64r6.
(mips_check_isa_supports_ase): Add support to check if an ASE
has been removed in the specified MIPS ISA revision.
(validate_mips_insn): Skip '-' character.
(macro_build): Likewise.
(mips_check_options): Prevent R6 working with fp32, mips16,
micromips, or branch relaxation.
(file_mips_check_options): Set R6 floating point registers to
64 bit. Also deal with the nan2008 option.
(limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(match_check_prev_operand): New static function.
(match_same_rs_rt_operand): New static function.
(match_non_zero_reg_operand): New static function.
(match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV
and OP_NON_ZERO_REG.
(insns_between): Added case to deal with forbidden slots.
(append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2
and BFD_RELOC_MIPS_26_PCREL_S2.
(match_insn): Add support for operands -A, -B, +' and +". Also
skip '-' character.
(mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo.
(md_parse_option): Add support for mips32r6 and mips64r6. Also
update the nan option handling.
(md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2.
(mips_force_relocation): Prevent forced relaxation for MIPS r6.
(md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(s_mipsset): Add support for mips32r6 and mips64r6.
(s_nan): Update to support the new nan2008 framework.
(tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2,
BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3,
BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and
BFD_RELOC_LO16_PCREL.
(mips_elf_final_processing): Updated to use the mips_nan2008.
(mips_cpu_info_table): Add entries for mips32r6 and mips64r6.
(macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref
macros for R6.
(mips_fix_adjustable): Make PC relative R6 relocations relative
to the symbol and not the section.
* configure.ac: Add support for mips32r6 and mips64r6.
* configure: Regenerate.
* doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line
options.
* doc/as.texinfo: Likewise.
gas/testsuite/
* gas/mips/24k-triple-stores-1.s: If testing for r6 prevent
non-supported instructions from being tested.
* gas/mips/24k-triple-stores-2.s: Likewise.
* gas/mips/24k-triple-stores-3.s: Likewise.
* gas/mips/24k-triple-stores-6.s: Likewise.
* gas/mips/beq.s: Likewise.
* gas/mips/eva.s: Likewise.
* gas/mips/ld-zero-3.s: Likewise.
* gas/mips/mips32-cp2.s: Likewise.
* gas/mips/mips32.s: Likewise.
* gas/mips/mips4.s: Likewise.
* gas/mips/add.s: Don't test the add instructions if r6, and
add padding.
* gas/mips/add.d: Check for a triple dot not a nop at the end of the
disassembly output.
* gas/mips/micromips@add.d: Likewise.
* gas/mips/mipsr6@24k-branch-delay-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-1.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file.
* gas/mips/mipsr6@24k-triple-stores-2.d: New file.
* gas/mips/mipsr6@24k-triple-stores-3.d: New file.
* gas/mips/mipsr6@24k-triple-stores-6.d: New file.
* gas/mips/mipsr6@add.d: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file.
* gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file.
* gas/mips/mipsr6@beq.d: New file.
* gas/mips/mipsr6@bge.d: New file.
* gas/mips/mipsr6@bgeu.d: New file.
* gas/mips/mipsr6@blt.d: New file.
* gas/mips/mipsr6@bltu.d: New file.
* gas/mips/mipsr6@branch-misc-1.d: New file.
* gas/mips/mipsr6@branch-misc-2-64.d: New file.
* gas/mips/mipsr6@branch-misc-2pic-64.d: New file.
* gas/mips/mipsr6@branch-misc-4-64.d: New file.
* gas/mips/mipsr6@cache.d: New file.
* gas/mips/mipsr6@eva.d: New file.
* gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file.
* gas/mips/mipsr6@jal-svr4pic.d: New file.
* gas/mips/mipsr6@ld-zero-2.d: New file.
* gas/mips/mipsr6@ld-zero-3.d: New file.
* gas/mips/mipsr6@loc-swap-dis.d: New file.
* gas/mips/mipsr6@mips32-cp2.d: New file.
* gas/mips/mipsr6@mips32-imm.d: New file.
* gas/mips/mipsr6@mips32.d: New file.
* gas/mips/mipsr6@mips32r2.d: New file.
* gas/mips/mipsr6@mips4-fp.d: New file.
* gas/mips/mipsr6@mips4-fp.l: New file.
* gas/mips/mipsr6@mips4-fp.s: New file.
* gas/mips/mipsr6@mips4.d: New file.
* gas/mips/mipsr6@mips5-fp.d: New file.
* gas/mips/mipsr6@mips5-fp.l: New file.
* gas/mips/mipsr6@mips5-fp.s: New file.
* gas/mips/mipsr6@mips64.d: New file.
* gas/mips/mipsr6@msa-branch.d: New file.
* gas/mips/mipsr6@msa.d: New file.
* gas/mips/mipsr6@pref.d: New file.
* gas/mips/mipsr6@relax-swap3.d: New file.
* gas/mips/r6-64-n32.d: New file.
* gas/mips/r6-64-n64.d: New file.
* gas/mips/r6-64-removed.l: New file.
* gas/mips/r6-64-removed.s: New file.
* gas/mips/r6-64.s: New file.
* gas/mips/r6-attr-none-double.d: New file.
* gas/mips/r6-n32.d: New file.
* gas/mips/r6-n64.d: New file.
* gas/mips/r6-removed.l: New file.
* gas/mips/r6-removed.s: New file.
* gas/mips/r6.d: New file.
* gas/mips/r6.s: New file.
* gas/mips/mipsr6@mips32-dsp.d: New file.
* gas/mips/mipsr6@mips32-dspr2.d: New file.
* gas/mips/mipsr6@mips32r2-ill.l: New file.
* gas/mips/mipsr6@mips32r2-ill.s: New file.
* gas/mips/cache.s: Add r6 instruction varients.
* gas/mips/mips.exp: Add support for the mips32r6 and mips64r6
architectures. Also prevent non r6 supported tests from running.
Finally, add in support for running the new r6 tests.
(run_dump_test_arch): Add support for mipsr6 tests.
(run_list_test_arch): Add support for using files of the
form arch@testname.l .
include/elf/
* mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3,
R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16.
(E_MIPS_ARCH_32R6): New define.
(E_MIPS_ARCH_64R6): New define.
include/opcode/
* mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT,
OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6
instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B,
+I, +O, +R, +:, +\, +", +;
(mips_check_prev_operand): New struct.
(INSN2_FORBIDDEN_SLOT): New define.
(INSN_ISA32R6): New define.
(INSN_ISA64R6): New define.
(INSN_UPTO32R6): New define.
(INSN_UPTO64R6): New define.
(mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6.
(ISA_MIPS32R6): New define.
(ISA_MIPS64R6): New define.
(CPU_MIPS32R6): New define.
(CPU_MIPS64R6): New define.
(cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6.
ld/
* ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6.
opcodes/
* mips-dis.c (mips_arch_choices): Add entries for mips32r6 and
mips64r6.
(parse_mips_dis_option): Allow MSA and virtualization support for
mips64r6.
(mips_print_arg_state): Add fields dest_regno and seen_dest.
(mips_seen_register): New function.
(print_insn_arg): Refactored code to use mips_seen_register
function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and
OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out
the register rather than aborting.
(print_insn_args): Add length argument. Add code to correctly
calculate the instruction address for pc relative instructions.
(validate_insn_args): New static function.
(print_insn_mips): Prevent jalx disassembling for r6. Use
validate_insn_args.
(print_insn_micromips): Use validate_insn_args.
all the arguments are valid.
* mips-formats.h (PREV_CHECK): New define.
* mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s,
-t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +;
(RD_pc): New define.
(FS): New define.
(I37): New define.
(I69): New define.
(mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded
MIPS R6 instructions from MIPS R2 instructions.
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|
gas/
* tc-mips.c (check_fpabi): Move softfloat and singlefloat
checks higher.
gas/testsuite/
* gas/mips/attr-gnu-4-5-msingle-float.l: New file.
* gas/mips/attr-gnu-4-5-msingle-float.s: Likewise.
* gas/mips/attr-gnu-4-5-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-5-msoft-float.s: Likewise.
* gas/mips/attr-gnu-4-6-msingle-float.l: Update expected output.
* gas/mips/attr-gnu-4-6-msoft-float.l: Likewise.
* gas/mips/attr-gnu-4-7-msingle-float.l: Likewise.
* gas/mips/attr-gnu-4-7-msoft-float.l: Likewise.
* gas/mips/mips.exp: Update expected output for FP ABI 5,6,7.
|
|
This patch fixes two related problems:
- By default gas is supposed to bump the current architecture
(starting with v6) as it finds "higher" instructions as the
assembling progresses. There are four possible cases depending on
the usage of the -A and -bump options:
(a) No -A and -bump are specified. In this case max_architecture
must be the highest architecture not conflicting with the
default architecture. The default opcode architecture is
indirectly set in configure.tgt and is "v9" in sparc64 systems
(from "v9-64"). Thus the maximum architecture in sparc64
systems must be "v9b". No warnings are echoed when the assembly
of an instruction bumps the current architecture.
(b) Only -bump is specified. This is like (a) but warnings are
always issued when the assembly of an instruction bumps the
current architecture.
(c) Only -A is specified. In this case bumping to a new
architecture is an error.
(d) Both -A and -bump are specified. In this case max_architecture
must be the highest architecture not conflicting with the
default architecture, but warnings are only to be issued when
bumping to an architecture higher than the architecture selected
in the -A option.
`max_architecture' is a global variable defined in tc-sparc.c which
is initialized to the opcode architecture corresponding to the
default architecture ("sparclite" for sparc-* targets and "v9" for
sparc64-* targets). Then in `md_begin' it is set to the highest
non-conflicting architecture, but only when both -A and -bump are
specified.
Thus (a) does not work:
$ echo "fzero %f0" | as
{standard input}: Assembler messages:
{standard input}:1: Error: Architecture mismatch on "fzero".
{standard input}:1: (Requires v9a|v9b; requested architecture is v9.)
Neither (b):
$ echo "fzero %f0" | as -bump
{standard input}: Assembler messages:
{standard input}:1: Error: Architecture mismatch on "fzero".
{standard input}:1: (Requires v9a|v9b; requested architecture is v9.)
Only (d) does:
$ echo "fzero %f0" | as -Av9 -bump
{standard input}: Assembler messages:
{standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero"
This patch fixes that function to "upgrade" `max_architecture' also
in the (a) and (b) cases.
Note that this problem becomes apparent only in sparc64-* targets
because in sparc-* targets the default architecture is the "higher"
among the 32bit architectures ("sparclite").
- Gas maintains a set of hardware capabilities associated with each
gas architecture, in `sparc_arch_table'. On the other hand
libopcodes maintains a set of hardware capabilities needed by each
individual sparc instruction.
When an instruction is assembled in `sparc_ip' gas checks for the
presence of the hardware capabilities required by the instruction,
emitting an error if some capability is missing.
However, this mechanism does not work properly if the current
architecture is bumped due to an instruction requiring new hw
capabilities not present on either the default architecture or an
architecture specified with -A:
$ echo "fzero %f0" | as -bump
{standard input}: Assembler messages:
{standard input}:1: Warning: architecture bumped from "v6" to "v9a" on "fzero"
{standard input}:1: Error: Hardware capability "vis" not enabled for "fzero".
This patch fixes this by adding the set of required hw caps of an
instruction if it triggers an architecture bump.
The patch has been tested in sparc64-unknown-linux-gnu.
gas/ChangeLog:
2014-09-12 Jose E. Marchesi <jose.marchesi@oracle.com>
* config/tc-sparc.c (sparc_ip): Update the set of allowed hwcaps
when bumping the current architecture.
(md_begin): Adjust the highetst architecture level also when a
specific architecture is not requested.
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|
/
* configure.ac: Add mips*-img-elf* target triple.
* configure: Regenerate.
bfd/
* config.bfd: Add mips*-img-elf* target triple.
gas/
* configure.tgt: Add mips*-img-elf* target triple.
gas/testsuite/
* gas/mips/mips.exp: Add mips*-img-elf* target triple.
binutils/testsuite/
* binutils-all/objcopy.exp: Add mips*-img-elf* target triple.
* binutils-all/readelf.exp: Likewise.
ld/
* configure.tgt: Add mips*-img-elf* target triple.
ld/testsuite/
* ld-mips-elf/mips-elf.exp: Add support for mips*-img-elf* target
triple.
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|
* config/tc-i386.c (match_template): Remove redundant "!!" testing
single-bit bitfields.
(build_modrm_byte): Don't compare single-bit bitfields to "1".
|
|
gas/testsuite/
* gas/i386/i386.exp: Run suffix-intel, x86-64-suffix and
x86-64-suffix-intel.
* gas/i386/suffix.s: Add tests for iret and sysret.
* gas/i386/suffix.d: Updated.
* gas/i386/suffix-intel.d: New file.
* gas/i386/x86-64-suffix-intel.d: Likewise.
* gas/i386/x86-64-suffix.d: Likewise.
* gas/i386/x86-64-suffix.s: Likewise.
opcodes/
* i386-dis.c (dis386): Replace "P" with "%LP" for iret and sysret.
(putop): Handle "%LP".
|
|
Currently, section ordering differs a little for non-loaded reloc
sections output by ld -emit-relocs or ld -r and that after passing
such objects through objcopy. Not that it really matters, but it
would be better for a simple objcopy to produce an unchanged output
object file. Also, section headers are put somewhere in the middle of
the non-loaded sections, again slightly differently for ld and
objcopy. This patch fixes these discrepancies and puts section
headers last, which is where gold puts them, and is where
bfd_from_remote_memory wrongly assumed they will be found.
bfd/
* elf.c (assign_file_positions_except_relocs): Move section header
placement to..
(_bfd_elf_assign_file_positions_for_relocs): ..here. Make static.
* elf-bfd.h (_bfd_elf_assign_file_positions_for_relocs): Delete.
* elflink.c (bfd_elf_final_link): Don't call above function.
gas/testsuite/
* gas/arm/got_prel.d: Adjust for changed section header placement.
* gas/i386/ilp32/x86-64-size-1.d: Likewise.
* gas/i386/ilp32/x86-64-size-3.d: Likewise.
* gas/i386/ilp32/x86-64-size-5.d: Likewise.
* gas/i386/ilp32/x86-64-unwind.d: Likewise.
* gas/i386/size-1.d: Likewise.
* gas/i386/size-3.d: Likewise.
* gas/i386/x86-64-size-1.d: Likewise.
* gas/i386/x86-64-size-3.d: Likewise.
* gas/i386/x86-64-size-5.d: Likewise.
* gas/i386/x86-64-unwind.d: Likewise.
* gas/ia64/alias-ilp32.d: Likewise.
* gas/ia64/alias.d: Likewise.
* gas/ia64/group-1.d: Likewise.
* gas/ia64/group-2.d: Likewise.
* gas/ia64/secname-ilp32.d: Likewise.
* gas/ia64/secname.d: Likewise.
* gas/ia64/unwind-ilp32.d: Likewise.
* gas/ia64/unwind.d: Likewise.
* gas/mmix/bspec-1.d: Likewise.
* gas/mmix/bspec-2.d: Likewise.
* gas/mmix/byte-1.d: Likewise.
* gas/mmix/loc-1.d: Likewise.
* gas/mmix/loc-2.d: Likewise.
* gas/mmix/loc-3.d: Likewise.
* gas/mmix/loc-4.d: Likewise.
* gas/mmix/loc-5.d: Likewise.
* gas/tic6x/scomm-directive-4.d: Likewise.
ld/testsuite/
* ld-aarch64/emit-relocs-local-addend.d: Adjust for changed
section header placement.
* ld-aarch64/local-addend-r.d: Likewise.
* ld-mmix/bspec1.d: Likewise.
* ld-mmix/bspec2.d: Likewise.
* ld-mmix/local1.d: Likewise.
* ld-mmix/local3.d: Likewise.
* ld-mmix/local5.d: Likewise.
* ld-mmix/local7.d: Likewise.
* ld-mmix/undef-3.d: Likewise.
* ld-sh/sh64/crange3-cmpct.rd: Likewise.
* ld-sh/sh64/crange3-media.rd: Likewise.
* ld-sh/sh64/crangerel1.rd: Likewise.
* ld-sh/sh64/crangerel2.rd: Likewise.
* ld-tic6x/common.d: Likewise.
* ld-tic6x/shlib-1.rd: Likewise.
* ld-tic6x/shlib-1b.rd: Likewise.
* ld-tic6x/shlib-1r.rd: Likewise.
* ld-tic6x/shlib-1rb.rd: Likewise.
* ld-tic6x/shlib-app-1.rd: Likewise.
* ld-tic6x/shlib-app-1b.rd: Likewise.
* ld-tic6x/shlib-app-1r.rd: Likewise.
* ld-tic6x/shlib-app-1rb.rd: Likewise.
* ld-tic6x/shlib-noindex.rd: Likewise.
* ld-tic6x/static-app-1.rd: Likewise.
* ld-tic6x/static-app-1b.rd: Likewise.
* ld-tic6x/static-app-1r.rd: Likewise.
* ld-tic6x/static-app-1rb.rd: Likewise.
* ld-x86-64/ilp32-4.d: Likewise.
* ld-x86-64/split-by-file-nacl.rd: Likewise.
* ld-x86-64/split-by-file.rd: Likewise.
|
|
* config/tc-arm.c (arm_cpus): Add cortex-a17.
|
|
gas/testsuite/
* gas/mips/attr-gnu-abi-fp-1.d: Relax expected output.
* gas/mips/elf_ase_micromips-2.d: Likewise.
* gas/mips/elf_ase_micromips.d: Likewise.
* gas/mips/elf_ase_mips16-2.d: Likewise.
* gas/mips/elf_ase_mips16.d: Likewise.
* gas/mips/module-mfp32.d: Likewise.
* gas/mips/module-msingle-float.d: Likewise.
* gas/mips/module-msoft-float.d: Likewise.
|
|
gas/testsuite/
* gas/mips/module-defer-warn2.l: Ignore differences in output from
64-bit vs 32-bit targets using O32.
|
|
binutils/testsuite/
* binutils-all/readelf.ss-mips: Account for new sections.
gas/testsuite/
* gas/elf/type.e: Account for new sections.
* gas/mips/mips16-e.d: Likewise.
* gas/mips/mips16-f.d: Likewise.
* gas/mips/mipsel16-e.d: Likewise.
* gas/mips/mipsel16-f.d: Likewise.
* gas/mips/tmips16-e.d: Appropriately escape dots.
* gas/mips/tmips16-f.d: Likewise.
* gas/mips/tmipsel16-e.d: Likewise.
* gas/mips/tmipsel16-f.d: Likewise.
|
|
gas/testsuite/
* gas/mips/mips.exp: Add mipsisa32 and mipsisa32el to
the list of addr32 targets.
|
|
2014-09-03 Jiong Wang <jiong.wang@arm.com>
opcode/
* aarch64-tbl.h (aarch64_opcode_table): Update encoding for mrs/msr.
* aarch64-dis-2.c: Update auto-generated file.
gas/
* config/tc-aarch64.c (parse_sys_reg): Remove the restriction on op0 field.
gas/testsuite/
* gas/aarch64/illegal.s: Update testcase.
* gas/aarch64/illegal.d: Likewise.
* gas/aarch64/sysreg-1.s: Likewise.
* gas/aarch64/sysreg-1.d: Likewise.
|
|
2014-09-03 Jiong Wang <jiong.wang@arm.com>
gas/
* config/tc-aarch64.c (parse_operands): Recognize PAIRREG.
(aarch64_features): Add entry for lse extension.
include/opcode/
* aarch64.h (AARCH64_FEATURE_LSE): New feature added.
(aarch64_opnd): Add AARCH64_OPND_PAIRREG.
(aarch64_insn_class): Add lse_atomic.
(F_LSE_SZ): New field added.
(opcode_has_special_coder): Recognize F_LSE_SZ.
opcode/
* aarch64-tbl.h (QL_R4NIL): New qualifiers.
(aarch64_feature_lse): New feature added.
(LSE): New Added.
(aarch64_opcode_table): New LSE instructions added. Improve
descriptions for ldarb/ldarh/ldar.
(aarch64_opcode_table): Describe PAIRREG.
* aarch64-opc.h (aarch64_field_kind): Add FLD_lse_sz.
* aarch64-opc.c (fields): Add entry for F_LSE_SZ.
(aarch64_print_operand): Recognize PAIRREG.
(operand_general_constraint_met_p): Check reg pair constraints for CASP
instructions.
* aarch64-dis.c (aarch64_ext_regno_pair): New extractor for paired reg.
(do_special_decoding): Recognize F_LSE_SZ.
* aarch64-asm.c (do_special_encoding): Recognize F_LSE_SZ.
gas/testsuite/
* gas/aarch64/lse-atomic.d: New.
* gas/aarch64/lse-atomic.s: Likewise.
* gas/aarch64/illegal-lse.d: Likewise.
* gas/aarch64/illegal-lse.l: Likewise.
* gas/aarch64/illegal-lse.s: Likewise.
* gas/aarch64/diagnostic.s: Check processor feature detect for lse
instruction.
* gas/aarch64/diagnostic.l: Likewise.
|
|
gas/
* config/tc-arm.c (aeabi_set_public_attributes): Update intended_arch based
on the info we got during parsing.
(arm_handle_align): Make sure the p2align expanding logic under thumb
unchanged.
gas/testsuite/
* gas/arm/blx-bl-convert.d: New testcase.
* gas/arm/blx-bl-convert.l: Warning expectation.
* gas/arm/blx-bl-convert.s: Source file.
|
|
This change removes code duplication for the SAA macro in line with other
such macros and also adds a !microMIPS internal consistency guard as
there's no microMIPS encoding of the underlying SAA/SAAD instructions.
* config/tc-mips.c (macro) <M_SAA_AB>: Remove duplicate code and
jump to...
<M_SAAD_AB>: ... here. Assert that !microMIPS.
|
|
This complements commit 16e5e222b6eae6f110ea72bf627585c095a453a8,
removing offset values embedded in dump patterns that served ECOFF
binaries.
* gas/mips/l_d.d: Remove ECOFF offset alternatives.
* gas/mips/mips1@l_d.d: Likewise.
* gas/mips/ld.d: Likewise.
* gas/mips/mips1@ld.d: Likewise.
* gas/mips/mips1@ld-forward.d: Likewise.
* gas/mips/s_d.d: Likewise.
* gas/mips/mips1@s_d.d: Likewise.
* gas/mips/sd.d: Likewise.
|
|
* config/tc-moxie.h (md_convert_frag): Silence warning.
|
|
ldxfsr, stxfsr, ldxefsr.
- V8 instructions: ldfsr, stfsr
- V9 instructions: ldx, ldxa, stx, stxa, ldxfsr, stxfsr
- V9b instructions: ldxefsr
Tested on sparc64-*-linux-gnu.
[gas/testsuite/Changelog]
2014-08-25 Jose E. Marchesi <jose.marchesi@oracle.com>
* gas/sparc/ldx_stx.s: New file.
* gas/sparc/ldx_stx.d: Likewise.
* gas/sparc/ldx_efsr.s: New file.
* gas/sparc/ldx_efsr.d: Likewise.
* gas/sparc/ld_st_fsr.s: New file.
* gas/sparc/ld_st_fsr.d: Likewise.
* gas/sparc/sparc.exp: Run the tests ldx_stx, ldx_efsr and
ld_st_fsr.
|
|
* config/tc-aarch64.h (DWARF2_LINE_MIN_INSN_LENGTH): Set to 4.
(DWARF2_CIE_DATA_ALIGNMENT): Set to -8.
|
|
* config/tc-aarch64.c (tc_aarch64_regname_to_dw2regnum): Fix
register number for vector register types.
|
|
Only set the VLE flag if the instruction has been pulled via the VLE
instruction set. This way the flag is guaranteed to be set for VLE-only
instructions or for VLE-only processors, however it'll remain clear for
dual-mode instructions on dual-mode and, more importantly, standard-mode
processors.
gas/
* config/tc-ppc.c (md_assemble): Only set the PPC_APUINFO_VLE
flag if both the processor and opcode flags match.
ld/testsuite/
* ld-powerpc/apuinfo-vle.rd: New test.
* ld-powerpc/apuinfo-vle.s: New test source.
* ld-powerpc/apuinfo.rd: Adjust according to GAS PPC_APUINFO_VLE
handling change.
* ld-powerpc/powerpc.exp: Run the new test.
|
|
2014-08-21 Nathan Sidwell <nathan@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
opcodes/
* arm-dis.c (print_arm_address): Negate the GPR-relative offset
returned if the U bit is set.
2014-08-21 Paul Brook <paul@codesourcery.com>
gas/testsuite/
* gas/arm/arch7a-mp.d: Adjust according to `print_arm_address'
offset fix.
* gas/arm/arch7r-mp.d: Likewise.
|
|
cc1: warnings being treated as errors
.../gas/config/tc-arm.c: In function 'add_to_lit_pool':
.../gas/config/tc-arm.c:3193: error: 'imm1' may be used uninitialized in this function
* config/tc-arm.c (add_to_lit_pool): Preinitialize `imm1'.
|
|
* gas/mips/mips.exp: Correct indentation.
|
|
* dw2gencfi.c (make_debug_seg): Replace leading spaces with tabs.
(dot_cfi_val_encoded_addr, output_cfi_insn): Likewise.
(output_cie, cfi_change_reg_numbers, cfi_finish): Likewise.
|
|
* config/tc-arm.c (parse_ifimm_zero): New function.
(enum operand_parse_code): Add OP_RSVD_FI0 value.
(parse_operands): Handle OP_RSVD_FI0.
(asm_opcode_insns): Use RSVD_FI0 for second operand of vcmp, vcmpe.
* gas/arm/ual-vcmp.s: New file.
* gas/arm/ual-vcmp.d: Likewise.
* gas/arm/vcmp-zero-bad.s: Likewise.
* gas/arm/vcmp-zero-bad.d: Likewise.
* gas/arm/vcmp-zero-bad.l: Likewise.
|
|
* Makefile.am: Typo fix.
* Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
|
|
Before FreeBSD-8 there was/is no arm support from the OS side.
FreeBSD-9.x added ARM support but only for the OABI.
From FreeBSD-10 upwards there is EABI support.
* Makefile.am: Add FreeBSD ARM support.
* Mafefile.in: Regenerate.
* configure.tgt: Add FreeBSD ARM support.
* config/te-armfbsdeabi.h: New file.
* config/te-armfbsdvfp.h: Likewise.
|
|
Directories that don't use libtool need to add -ldl (on most *nix
hosts) to provide dlopen for libbfd.
config/
* plugins.m4 (AC_PLUGINS): If plugins are enabled, add -ldl to
LIBS via AC_SEARCH_LIBS.
gdb/
* acinclude.m4 (GDB_AC_CHECK_BFD): Don't add -ldl.
* config.in: Regenerate.
sim/ppc/
* configure.ac: Invoke AC_PLUGINS.
* config.in: Regenerate.
and regen lots of configure files.
|
|
than 4. This affects DWARF debug info generation in particular.
* config/tc-rl78.c (md_apply_fix): Correct handling of small sized
RELOC_RL78_DIFF fixups.
|
|
* read.c (parse_mri_cons): Warning fix.
|
|
This also makes --enable-plugins default to on for hosts that can
support plugins, so we have consistent lto toolchain support. The
ACX_LARGEFILE moves aren't strictly necessary, but are harmless and
will be necessary if plugin support is extended to more hosts via
libtool's dlopen support. I started down that path then decided it
was more work than I was interested in doing. (ACX_LARGEFILE invokes
AC_PLUGINS.)
config/
* plugins.m4: Test for dlfcn.h or windows.h here to set default
for --enable-plugins. Report error if someone tries to enable
plugins on a host we don't support.
bfd/
* configure.ac: Delete redundant plugin related checks.
* configure: Regenerate.
binutils/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* config.in: Regenerate.
* configure: Regenerate.
gas/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* config.in: Regenerate.
* configure: Regenerate.
gprof/
* configure.ac: Move ACX_LARGEFILE after LT_INIT.
* configure: Regenerate.
* gconfig.in: Regenerate.
ld/
* configure.ac: Move AC_PROG_CC and other macros earlier. Delete
plugin checks now done in config/plugins.m4.
* config.in: Regenerate.
* configure: Regenerate.
|
|
The variables used to track insn state should be pushed down into the
private_data structure to avoid pollution across calls.
This also happens to fix the output when hitting comments/invalid insns
which needs to tweak a gas test.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
|
