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2012-05-062012-05-06 Arnold Metselaar <arnold_m@operamail.com>Arnold Metselaar6-0/+35
* gas/z80/jr-forwf.s: New file, adapted from z8k version. * gas/z80/jr-backf.s: Likewise. * gas/z80/djnz-backf.s: Likewise. * gas/z80/ill_op: New file, with illegal operand. * gas/z80/z80.exp: Run new tests.
2012-05-062012-05-06 Arnold Metselaar <arnold_m@operamail.com>Arnold Metselaar3-135/+183
* config/tc-z80.h(md_register_arithmetic): Define as 0. * config/tc-z80.c(md_begin): Store register names in symbol table, prevents usage as ordinary symbol. * config/tc-z80.c(contains_register): New function. * config/tc-z80.c(parse_exp2): Removed. * config/tc-z80.c(parse_exp_not_indexed): New function. * config/tc-z80.c(parse_exp): Add code to recogize indexed addressing after parsing. * config/tc-z80.c(emit_byte, emit_word): Use contains_register. * config/tc-z80.c(emit_jp): Use parse_exp_not_indexed, simplify condition for jump to register. * config/tc-z80.c(emit_call, emit_jr, emit_ex, emit_rst): Use parse_exp_not_indexed.
2012-05-05Replace all uses of bfd_abs_section, bfd_com_section, bfd_und_sectionAlan Modra14-42/+61
and bfd_ind_section with their _ptr variants, or use corresponding bfd_is_* macros.
2012-05-04Support x86_64-*-linux-gnux32H.J. Lu2-1/+8
gas/ * configure.tgt: Support x86_64-*-linux-gnux32. ld/ * configure.tgt: Support x86_64-*-linux-gnux32. ld/testsuite/ * ld-elf/eh1.d: Skip x86_64-*-linux-gnux32. * ld-elf/eh2.d: Likewise. * ld-elf/eh3.d: Likewise. * ld-elf/eh4.d: Likewise. * ld-elfvsb/elfvsb.exp: Xfail x86_64-*-linux-gnux32. * ld-shared/shared.exp: Likewise. * ld-ifunc/ifunc-3a-x86.d: Support x86_64-*-linux-gnux32.
2012-05-04Add `instruction' to unsupported error messageH.J. Lu2-1/+6
* config/tc-i386.c (match_template): Add `instruction' to unsupported error message.
2012-05-04Reformat output_insnH.J. Lu2-1/+5
* config/tc-i386.c (output_insn): Reformat.
2012-05-04Remove the extra VEX checkH.J. Lu2-2/+5
* config/tc-i386.c (output_insn): Remove the extra VEX check.
2012-05-04Improve unsupported error messageH.J. Lu2-2/+8
* config/tc-i386.c (match_template): Improve unsupported error message.
2012-05-03Add support for Motorola XGATE embedded CPUNick Clifton25-2/+2269
2012-04-30* config/rx-parse.y (rx_intop): Add parameter for operation size.DJ Delorie2-11/+26
Check for large positive constants really being small negative ones. (BRA, BSR): Update calls to rx_intop. (immediate): Likewise.
2012-04-30gas: Make dwarf2dbg.c versions specific and add DW_AT_high_pc case for DWARF 4+.Mark Wielaard3-4/+37
* dwarf2dbg.c (DWARF2_ARANGES_VERSION): New define to 2. (DWARF2_LINE_VERSION): Likewise. (out_debug_line): Use DWARF2_LINE_VERSION not DWARF2_VERSION. (out_debug_aranges): Use DWARF2_ARANGES_VERSION not DWARF2_VERSION. (out_debug_abbrev): Use DW_FORM_data for DW_AT_high_pc when DWARF2_VERSION >= 4. (out_debug_info): Use difference between start and end as data value for DW_AT_high_pc when DWARF2_VERSION >= 4. * config/tc-ia64.h (DWARF2_LINE_VERSION): Override it.
2012-04-27Document sparc's %l34 and %h34David S. Miller2-1/+18
gas/ * doc/c-sparc.text: Document %l34 and %h34.
2012-04-27Add support for sparc %cfr ASR register.David S. Miller6-0/+31
opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'. * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr. gas/ * config/tc-sparc.c (v9a_asr_table): Add 'cfr'. gas/testsuite/ * gas/sparc/sparc.exp: Run cfr test. * gas/sparc/cfr.s: New testcase. * gas/sparc/cfr.d: Likewise.
2012-04-27Add support for sparc pause instruction.David S. Miller6-5/+36
opcodes/ * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'. * sparc-dis.c (v9a_asr_reg_names): Add 'pause'. gas/ * config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4, v8pluse, v8plusv, v9e, and v9v. (v9a_asr_table): Add 'pause'. gas/testsuite/ * gas/sparc/sparc.exp: Run pause test. * gas/sparc/pause.s: New testcase. * gas/sparc/pause.d: Likewise.
2012-04-27Add support for sparc compare-and-branch instructions.David S. Miller6-5/+161
opcodes/ * sparc-opc.c (CBCOND): New define. (CBCOND_XCC): Likewise. (cbcond): New helper macro. (sparc_opcodes): Add compare-and-branch instructions. gas/ * config/tc-sparc.c (sparc_arch_table): Add HWCAP_CBCOND to sparc4, v8pluse, v8plusv, v9e, and v9v. (sparc_ip): Handle R_SPARC_5 of immediate constants inline in order to accomodate cbcond which otherwise would require two relocations to be handled in a single instruction.. gas/testsuite/ * gas/sparc/cbcond.s: New file. * gas/sparc/cbcond.d: New file. * gas/sparc/sparc.exp: Run cbcond test.
2012-04-27Add support for SPARC T4 crypto instructions.David S. Miller6-3/+316
include/opcode/ * sparc.h: Document new arg code' )' for crypto RS3 immediates. opcodes/ * sparc-dis.c (print_insn_sparc): Handle ')'. * sparc-opc.c (sparc_opcodes): Add crypto instructions. gas/ * config/tc-sparc.c (sparc_ip): Likewise. Accept instruction names containing "_". (sparc_arch_table): Add sparc4, v8pluse, and v9e. Add crypto hwcap masks to v8plusv and v9v. gas/testsuite/ * gas/sparc/crypto.s: New file. * gas/sparc/crypto.d: New file. * gas/sparc/sparc.exp: Run crypto test.
2012-04-27Move sparc opcode hwcaps out of sparc_opcode flags field.David S. Miller2-80/+78
include/opcode/ * sparc.h (struct sparc_opcode): New field 'hwcaps'. F_MUL32, F_DIV32, F_FDMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2, F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS, F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING, F_HWCAP_MASK): Delete. (HWCAP_MUL32, HWCAP_DIV32, HWCAP_FSMULD, HWCAP_V8PLUS, HWCAP_POPC, HWCAP_VIS, HWCAP_VIS2, HWCAP_ASI_BLK_INIT, HWCAP_FMAF, HWCAP_VIS3, HWCAP_HPC, HWCAP_RANDOM, HWCAP_TRANS, HWCAP_FJFMAU, HWCAP_IMA, HWCAP_ASI_CACHE_SPARING, HWCAP_AES, HWCAP_DES, HWCAP_KASUMI, HWCAP_CAMELLIA, HWCAP_MD5, HWCAP_SHA1, HWCAP_SHA256, HWCAP_SHA512, HWCAP_MPMUL, HWCAP_MONT, HWCAP_PAUSE, HWCAP_CBCOND, HWCAP_CRC32): New defines. opcodes/ * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values into new struct sparc_opcode 'hwcaps' field instead of 'flags'. gas/ * config/tc-sparc.c (sparc_arch_table): Rework to use HWCAP_* masks. (sparc_md_end): No longer need to translate hwcap_seen values into ELF hwcap bits, they now match exactly. (get_hwcap_name): Use HWCAP_* and handle new values. (sparc_ip): Fetch hwcaps from insn->hwcaps instead of insn->flags.
2012-04-202012-04-20 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-0/+146
* config/tc-ia64.c (obj_elf_vms_common): New function. (md_pseudo_table): Add .vms_common pseudo. * config/obj-elf.h (obj_elf_section_name): Add a prototype. * config/obj-elf.c (obj_elf_section_name): Make it public.
2012-04-17gas/Richard Sandiford2-1/+5
* config/tc-avr.c (md_apply_fix): Fix handling of BFD_RELOC32.
2012-04-12Support R_SPARC_WDISP10 and R_SPARC_H34.David S. Miller5-0/+58
include/ * elf/sparc.h (R_SPARC_WDISP10): New reloc. * opcode/sparc.h: Define '=' as generating R_SPARC_WDISP10. opcodes/ * sparc-dis.c (X_DISP10): Define. (print_insn_sparc): Handle '='. bfd/ * reloc.c (BFD_RELOC_SPARC_H34, BFD_RELOC_SPARC_SIZE32, BFD_RELOC_SPARC_SIZE64, BFD_RELOC_SPARC_WDISP10): New relocs. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfxx-sparc.c (sparc_elf_wdisp10_reloc): New function. (_bfd_sparc_elf_howto_table): Add entries for R_SPARC_H34, R_SPARC_SIZE32, R_SPARC_64, and R_SPARC_WDISP10. (_bfd_sparc_elf_reloc_type_lookup): Handle new relocs. (_bfd_sparc_elf_check_relocs): Likewise. (_bfd_sparc_elf_gc_sweep_hook): Likewise. (_bfd_sparc_elf_relocate_section): Likewise. gas/ * config/tc-sparc.c (sparc_ip): Handle '=', "%h34", "%l34", and BFD_RELOC_SPARC_H34. (md_apply_fix): Handle BFD_RELOC_SPARC_WDISP10 and BFD_RELOC_SPARC_H34. (tc_gen_reloc): Likewise. gas/testsuite/ * gas/sparc/reloc64.s: Add abs34 code model tests. * gas/sparc/reloc64.d: Update. elfcpp/ * sparc.h (R_SPARC_WDISP10): New relocation. gold/ * sparc.cc (Reloc::wdisp10): New relocation method. (Reloc::h34): Likewise. (Target_sparc::Scan::check_non_pic): Handle R_SPARC_H34. (Target_sparc::Scan::get_reference_flags): Handle R_SPARC_H34 and R_SPARC_WDISP10. (Target_sparc::Scan::local): Likewise. (Target_sparc::Scan::global): Likewise. (Target_sparc::Relocate::relocate): Likewise.
2012-04-12 * elf32-arm.c (elf32_arm_nacl_plt0_entry, elf32_arm_nacl_plt_entry):Nick Clifton106-101/+227
New variables. (struct elf32_arm_link_hash_table): New member `nacl_p'. (elf32_arm_link_hash_table_create): Initialize it. (elf32_arm_nacl_link_hash_table_create): New function. (arm_movw_immediate, arm_movt_immediate): New functions. (elf32_arm_populate_plt_entry): Test HTAB->nacl_p. (elf32_arm_finish_dynamic_sections): Likewise. (elf32_arm_output_plt_map_1): Likewise. (bfd_elf32_littlearm_nacl_vec, bfd_elf32_bigarm_nacl_vec): New backend vector stanza. (elf32_arm_nacl_modify_segment_map): New function. * config.bfd: Handle arm-*-nacl*, armeb-*-nacl*. * targets.c: Support bfd_elf32_{big,little}_nacl_vec. * configure.in: Likewise. (bfd_elf32_bigarm_nacl_vec): Add elf-nacl.lo here. (bfd_elf32_littlearm_nacl_vec): Likewise. (bfd_elf32_bigarm_vec, bfd_elf32_littlearm_vec): Likewise. (bfd_elf32_bigarm_symbian_vec): Likewise. (bfd_elf32_littlearm_symbian_vec): Likewise. (bfd_elf32_bigarm_vxworks_vec): Likewise. (bfd_elf32_littlearm_vxworks_vec): Likewise. * configure: Regenerated. * configure.tgt (arm-*-nacl*): Match it. * config/te-nacl.h (FPU_DEFAULT, EABI_DEFAULT): Define. (LOCAL_LABELS_DOLLAR): Define. * config/tc-arm.c (elf32_arm_target_format) [TE_NACL]: Use nacl format variants. * gas/elf/elf.exp (run_elf_list_test): Treat arm-*-nacl* targets as -armeabi. * gas/arm/any-idiv.d: Match *-*-nacl* targets too. * gas/arm/arch4t.d: Likewise. * gas/arm/arch4t-eabi.d: Likewise. * gas/arm/attr-any-armv4t.d: Likewise. * gas/arm/attr-any-thumbv6.d: Likewise. * gas/arm/attr-cpu-directive.d: Likewise. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-all.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/arm/attr-march-armv6s-m.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-armv7-a+idiv.d: Likewise. * gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/arm/attr-march-armv7-a+sec+virt.d: Likewise. * gas/arm/attr-march-armv7-a+virt.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7em.d: Likewise. * gas/arm/attr-march-armv7-m.d: Likewise. * gas/arm/attr-march-armv7m.d: Likewise. * gas/arm/attr-march-armv7-r.d: Likewise. * gas/arm/attr-march-armv7r.d: Likewise. * gas/arm/attr-march-armv7-r+mp.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-names.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/got_prel.d: Likewise. * gas/arm/mapdir.d: Likewise. * gas/arm/mapmisc.d: Likewise. * gas/arm/mapsecs.d: Likewise. * gas/arm/mapshort-eabi.d: Likewise. * gas/arm/mapshort-elf.d: Likewise. * gas/arm/mov-highregs-any.d: Likewise. * gas/arm/mov-lowregs-any.d: Likewise. * gas/arm/pr12198-1.d: Likewise. * gas/arm/pr12198-2.d: Likewise. * gas/arm/thumb.d: Likewise. * gas/arm/thumb-eabi.d: Likewise. * gas/arm/thumbrel.d: Likewise. * configure.tgt (arm*-*-nacl*, arm*b-*-nacl*): Handle them. * emulparams/armelf_nacl.sh: New file. * emulparams/armelfb_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add earmelf_nacl.c and earmelfb_nacl.c here. (earmelf_nacl.c, earmelfb_nacl.c): New targets. * Makefile.in: Regenerated. * ld-arm/arm-elf.exp (armelftests): Split out into ... (armelftests_common, armelftests_nonacl): ... these two. (armeabitests): Split out into ... (armeabitests_common, armeabitests_nonacl): ... these two. Omit _nonacl sets for arm*-*-nacl* targets. * ld-arm/farcall-mix.d: Don't match exact addresses, only symbolic ones. * ld-arm/farcall-mix2.d: Likewise. * ld-arm/farcall-group.d: Likewise. * ld-arm/tls-gdesc-got.d: Match variant file formats too. Accept some variation in exact addresses. * ld-arm/thumb2-b-interwork.d: Match variant file formats too. Fix regexps not to care about exact addresses where not relevant. * ld-arm/thumb2-bl-undefweak.d: Match any hex strings, not any strings of particular exact lengths. * ld-arm/thumb2-bl-undefweak1.d: Likewise. * ld-arm/arm-app.r: Match variant file formats too. * ld-arm/arm-app-abs32.r: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-lib.r: Likewise. * ld-arm/arm-static-app.r: Likewise. * ld-arm/armv4-bx.d: Likewise. * ld-arm/data-only-map.d: Likewise. * ld-arm/group-relocs.d: Likewise. * ld-arm/jump19.d: Likewise. * ld-arm/reloc-boundaries.d: Likewise. * ld-arm/thumb1-bl.d: Likewise. * ld-arm/thumb2-bl.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-app.r: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-lib.r: Likewise. * ld-arm/tls-mixed.r: Likewise. * ld-arm/vfp11-fix-none.d: Likewise. * ld-arm/vfp11-fix-scalar.d: Likewise. * ld-arm/vfp11-fix-vector.d: Likewise. * ld-arm/arm-static-app.d: Likewise. Fix regexps not to care about exact number of leading spaces. * ld-arm/arm-app-abs32.d: Likewise. * ld-arm/fix-arm1176-off.d: Likewise. * ld-arm/fix-arm1176-on.d: Likewise. * ld-arm/arm-elf.exp: Treat nacl targets like eabi targets.
2012-04-12oops - omitted from previous deltaNick Clifton4-0/+44
2012-04-12 * config/tc-arm.c (only_one_reg_in_list): New function.Nick Clifton3-2/+58
(encode_ldmstm): Ditto. (do_ldmstm): Use a different encoding when pushing or poping a single register. (A_COND_MASK): New macro. (A_PUSH_POP_OP_MASK): Ditto. (A1_OPCODE_PUSH): Ditto. (A2_OPCODE_PUSH): Ditto. (A2_OPCODE_POP): Ditto. * gas/arm/push-pop.d: New testcase. * gas/arm/push-pop.s: Ditto. * gas/arm/stm-ldm.d: Ditto. * gas/arm/stm-ldm.s: Ditto.
2012-04-07gas/testsuite/David S. Miller2-1/+5
* gas/all/gas.exp: Sparc can handle BFD_RELOC_8 for constants. ld/testsuite/ * ld-sparc/tlssunbin32.rd: Fix regexp. * ld-sparc/tlssunbin64.rd: Likewise.
2012-04-06 * doc/c-mips.texi (MIPS Opts): Correct -no-mfix-24k toMaciej W. Rozycki2-1/+6
-mno-fix-24k.
2012-04-06binutils/Roland McGrath4-6/+15
2012-04-06 Roland McGrath <mcgrathr@google.com> * configure.in (AC_CHECK_HEADERS): Add locale.h. * config.in: Regenerate. * configure: Regenerate. gas/ 2012-04-06 Roland McGrath <mcgrathr@google.com> * configure.in (AC_CHECK_HEADERS): Add locale.h. * config.in: Regenerate. * configure: Regenerate. gold/ 2012-04-06 Roland McGrath <mcgrathr@google.com> * configure.in (AC_CHECK_HEADERS): Add locale.h. * config.in: Regenerate. * configure: Regenerate. ld/ 2012-04-06 Roland McGrath <mcgrathr@google.com> * configure.in (AC_CHECK_HEADERS): Add locale.h. * config.in: Regenerate. * configure: Regenerate.
2012-04-05 * configure.in (AC_CHECK_FUNCS): Add setlocale.Nick Clifton5-0/+63
(AM_LC_MESSAGES): Add. * aclocal.m4: Regenerate. * config.in: Regenerate. * configure: Regenerate.
2012-04-03* config/rx-parse.y: Make the .L optional for ADC and SBB.DJ Delorie2-1/+5
2012-04-03bfd/Roland McGrath3-0/+7
2012-04-03 Roland McGrath <mcgrathr@google.com> * elf-nacl.c: New file. * elf-nacl.h: New file. * elf32-i386.c (elf_backend_modify_segment_map): Define for bfd_elf32_i386_nacl_vec. (elf_backend_modify_program_headers): Likewise. * elf64-x86-64.c (elf_backend_modify_segment_map): Define for bfd_elf64_x86_64_nacl_vec and bfd_elf32_x86_64_nacl_vec. (elf_backend_modify_program_headers): Likewise. * Makefile.am (BFD32_BACKENDS, BFD64_BACKENDS): Add elf-nacl.lo here. (BFD32_BACKENDS_CFILES, BFD64_BACKENDS_CFILES): Add elf-nacl.c here. * Makefile.in: Regenerated. * configure.in (bfd_elf64_x86_64_nacl_vec): Add elf-nacl.o to tb here. (bfd_elf32_x86_64_nacl_vec): Likewise. (bfd_elf64_x86_64_vec, bfd_elf32_x86_64_vec): Likewise. (bfd_elf64_x86_64_freebsd_vec, bfd_elf64_x86_64_sol2_vec): Likewise. (bfd_elf64_l1om_vec, bfd_elf64_l1om_freebsd_vec): Likewise. (bfd_elf64_k1om_vec, bfd_elf64_k1om_freebsd_vec): Likewise. (bfd_elf32_i386_nacl_vec): Likewise. (bfd_elf32_i386_sol2_vec, bfd_elf32_i386_freebsd_vec): Likewise. (bfd_elf32_i386_vxworks_vec, bfd_elf32_i386_vec): Likewise. * configure: Regenerated. binutils/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * lib/binutils-common.exp (is_elf_format): Consider *-*-nacl* to be ELF too. * binutils-all/elfedit-4.d: Add "#as: --64" option. * binutils-all/i386/i386.exp: Accept nacl targets too. * binutils-all/x86-64/x86-64.exp: Likewise. gas/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * gas/i386/k1om.d: Add not-target match for *-*-nacl*. * gas/i386/l1om.d: Likewise. ld/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * configure.tgt (i[3-7]86-*-nacl*, x86_64-*-nacl*): Handle them. * emulparams/elf_nacl.sh: New file. * emulparams/elf_i386_nacl.sh: New file. * emulparams/elf32_x86_64_nacl.sh: New file. * emulparams/elf_x86_64_nacl.sh: New file. * Makefile.am (ALL_EMULATION_SOURCES): Add eelf_i386_nacl.c here. (ALL_64_EMULATION_SOURCES): Add eelf32_x86_64_nacl.c and eelf_x86_64_nacl.c here. (eelf_i386_nacl.c, eelf32_x86_64_nacl.c, eelf_x86_64_nacl.c): New targets. * Makefile.in: Regenerated. * scripttempl/elf.sc: Handle SEPARATE_CODE cases. ld/testsuite/ 2012-04-03 Roland McGrath <mcgrathr@google.com> * ld-x86-64/ilp32-4-nacl.d: New file. * ld-x86-64/x86-64.exp: Run it. * ld-discard/discard.exp: Accept nacl targets too. * ld-elf/binutils.exp: Likewise. * ld-elf/comm-data.exp: Likewise. * ld-elf/elf.exp: Likewise. * ld-elf/tls_common.exp: Likewise. * ld-elfvers/vers.exp: Likewise. * ld-elfvsb/elfvsb.exp: Likewise. * ld-elfweak/elfweak.exp: Likewise. * ld-gc/gc.exp: Likewise. * ld-ifunc/binutils.exp: Likewise. * ld-ifunc/ifunc.exp: Likewise. * ld-linkonce/linkonce.exp:Likewise. * ld-pie/pie.exp: Likewise. * ld-shared/shared.exp: Likewise. * ld-undefined/weak-undef.exp: Likewise. * ld-unique/unique.exp: Likewise. * ld-x86-64/dwarfreloc.exp: Likewise. * ld-x86-64/line.exp: Likewise. * lib/ld-lib.exp (slurp_options): Support global array options_regsub to apply substitutions to the contents of options lines read from the file. * ld-i386/emit-relocs.d: Renamed to ... * ld-i386/emit-relocs.rd: ... this. * ld-i386/i386.exp: Accept nacl targets too. For them, use options_regsub to replace elf_i386 with elf_i386_nacl in run_dump_test cases; apply the same substitution in $i386tests; replace foo.rd expectations files with foo-nacl.rd in $i386tests. (i386tests): Change emit-relocs.d to emit-relocs.rd here. * ld-i386/emit-relocs-nacl.rd: New file. * ld-i386/plt-nacl.pd: New file. * ld-i386/plt-pic-nacl.pd: New file. * ld-i386/tlsbin-nacl.rd: New file. * ld-i386/tlsbindesc-nacl.rd: New file. * ld-i386/tlsdesc-nacl.rd: New file. * ld-i386/tlsgdesc-nacl.rd: New file. * ld-i386/tlsnopic-nacl.rd: New file. * ld-i386/tlspic-nacl.rd: New file. * ld-x86-64/x86-64.exp: Accept nacl targets too. For them, use options_regsub to replace elf_x86_64 with elf_x86_64_nacl in run_dump_test cases; apply the same substitution in $x86_64tests; replace foo.rd expectations files with foo-nacl.rd in $x86_64tests. Add explicit -melf_x86_64 to ld options in tests that need it, in case the default emulation is x32 (as it is for x86_64-nacl). * ld/testsuite/ld-x86-64/plt-nacl.pd: New file. * ld/testsuite/ld-x86-64/split-by-file-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbin-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsbindesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.pd: New file. * ld/testsuite/ld-x86-64/tlsdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlsgdesc-nacl.rd: New file. * ld/testsuite/ld-x86-64/tlspic-nacl.rd: New file. * ld-i386/hidden2.d: Loosen regexps to match any file format variant, and not to depend on exact addresses, displacements, etc. where they are irrelevant. * ld-i386/pcrel16.d: Likewise. * ld-i386/pcrel16abs.d: Likewise. * ld-i386/pr12718.d: Likewise. * ld-i386/pr12921.d: Likewise. * ld-i386/reloc.d: Likewise. * ld-i386/tlsbin.dd: Likewise. * ld-i386/tlsbin.sd: Likewise. * ld-i386/tlsbin.td: Likewise. * ld-i386/tlsbindesc.dd: Likewise. * ld-i386/tlsbindesc.sd: Likewise. * ld-i386/tlsbindesc.td: Likewise. * ld-i386/tlsdesc.dd: Likewise. * ld-i386/tlsdesc.sd: Likewise. * ld-i386/tlsdesc.td: Likewise. * ld-i386/tlsg.sd: Likewise. * ld-i386/tlsgdesc.dd: Likewise. * ld-i386/tlsindntpoff.dd: Likewise. * ld-i386/tlsnopic.dd: Likewise. * ld-i386/tlsnopic.sd: Likewise. * ld-i386/tlspic.dd: Likewise. * ld-i386/tlspic.sd: Likewise. * ld-i386/tlspic.td: Likewise. * ld-i386/tlspie2.d: Likewise. * ld-x86-64/hidden2.d: Likewise. * ld-x86-64/pcrel16.d: Likewise. * ld-x86-64/pr12718.d: Likewise. * ld-x86-64/pr12921.d: Likewise. * ld-x86-64/protected3.d: Likewise. * ld-x86-64/tlsbin.dd: Likewise. * ld-x86-64/tlsbin.sd: Likewise. * ld-x86-64/tlsbin.td: Likewise. * ld-x86-64/tlsbindesc.dd: Likewise. * ld-x86-64/tlsbindesc.sd: Likewise. * ld-x86-64/tlsbindesc.td: Likewise. * ld-x86-64/tlsdesc.dd: Likewise. * ld-x86-64/tlsdesc.sd: Likewise. * ld-x86-64/tlsdesc.td: Likewise. * ld-x86-64/tlsg.sd: Likewise. * ld-x86-64/tlsgd5.dd: Likewise. * ld-x86-64/tlsgd6.dd: Likewise. * ld-x86-64/tlsgdesc.dd: Likewise. * ld-x86-64/tlspic.dd: Likewise. * ld-x86-64/tlspic.sd: Likewise. * ld-x86-64/tlspic.td: Likewise. * ld-x86-64/ilp32-8.d: Match any file format variant. Use a -Ttext and adjust expected results, to handle variant layouts. * ld-x86-64/ilp32-9.d: Likewise. * ld-i386/alloc.t: Remove superfluous OUTPUT_FORMAT statement. * ld-i386/pr12627.t: Likewise. * ld-x86-64/abs-l1om.d: Add target: constraint. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/plt.s: New file. * ld-x86-64/pltlib.s: New file. * ld-x86-64/plt.pd: New file. * ld-x86-64/x86-64.exp (x86_64tests): Add them. * ld-i386/plt.s: New file. * ld-i386/pltlib.s: New file. * ld-i386/plt.pd: New file. * ld-i386/plt-pic.s: New file. * ld-i386/plt-pic.pd: New file. * ld-i386/i386.exp (i386tests): Add them.
2012-04-03* config/rx-parse.y: IMM->IMM_, take an extra parameter for theDJ Delorie4-343/+388
transfer size. (IMM): New, call IMM_ with the default 32. (IMMW,IMMB): Likewise, for 16 and 8. (NIMM, MBIMM): Add size parameter. (immediate): Likewise. Allow 32768..65535 for 16-bit transfers. (MOV.W): Use IMMW instead of IMM. * config/rx-parse.y (ADC,SBB): ADC and SBB only allow .L. (op_dp20_rm_l): New. (op_dp20_rim_l): New. * config/rx-parse.y (op_dp20_rms): Rename to op_dp20_rr, don't allow mem. (ABS, NEG, NOT): These only take REG or REG,REG (rr, not rms). * gas/rx/mov.d: Update patterns for fixed MOV.W encoding.
2012-03-292012-03-29 Terry Guo <terry.guo@arm.com>Matthew Gretton-Dann3-0/+7
* gas/config/tc-arm.c (arm_cpus): Add cortex-m0plus. * gas/doc/c-arm.texi (ARM Options): Document -mcpu=cortex-m0plus.
2012-03-24 gas/Maxim Kuvyrkov3-1/+12
* config/tc-mips.c (mips_cpu_info_table): Add entry for Broadcom XLP. * doc/c-mips.texi: Mention XLP. opcodes/ * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
2012-03-21gas/Thomas Schwinge4-12/+31
[SH] Support the .uaquad and .8byte directives also for non-sh64 configurations. * config/tc-sh.c (sh_cons_fix_new, md_apply_fix) [!HAVE_SH64]: Handle BFD_RELOC_64. * doc/c-sh64.texi (SH64 Machine Directives): Move .uaquad description... * doc/c-sh.texi (SH Machine Directives): ... here.
2012-03-20 * config/tc-arm.c (do_vmrs): Accept priviledged mode VFP systemNick Clifton5-8/+57
registers. (do_vmsr): Likewise. (arm_opcode_insns): Do not default to using the FPSCR register in the VMRS and VMSR registers. * gas/arm/vfp1xD.s: Add tests of the VMSR ad VMRS instructions in priviledged modes. * gas/arm/vfp1xD.d: Update expected output.
2012-03-16bfd/Roland McGrath3-1/+12
2012-03-16 Roland McGrath <mcgrathr@google.com> * config.bfd: Handle x86_64-*-nacl*. * elf64-x86-64.c (bfd_elf64_x86_64_nacl_vec): New backend vector stanza. (bfd_elf32_x86_64_nacl_vec): Likewise. * targets.c: Support them. * configure.in: Likewise. * configure: Regenerated. gas/ 2012-03-16 Roland McGrath <mcgrathr@google.com> * config/tc-i386.h [TE_NACL] (ELF_TARGET_FORMAT32, ELF_TARGET_FORMAT64): Define for this case. * configure.tgt (i386-*-nacl*): If ${cpu} is x86_64*, default to x32.
2012-03-16 * gas/config/tc-arm.c (aeabi_set_public_attributes): CorrectMatthew Gretton-Dann83-87/+124
handling of Tag_DIV_use. * gas/testsuite/gas/testsuite/gas/arm/any-idiv.d: New testcase. * gas/testsuite/gas/testsuite/gas/arm/any-idiv.s: Likewise. * gas/testsuite/gas/arm/attr-any-armv4t.d: Update expected output. * gas/testsuite/gas/arm/attr-any-thumbv6.d: Likewise. * gas/testsuite/gas/arm/attr-cpu-directive.d: Likewise. * gas/testsuite/gas/arm/attr-default.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv1.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2a.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv2s.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv3.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv3m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4t.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4txm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv4xm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5t.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5te.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5tej.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5texp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv5txm.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6j.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6k.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6kt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6t2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6z.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7a.d: Likewise. * gas/testsuite/gas/arm/attr-march-iwmmxt.d: Likewise. * gas/testsuite/gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-xscale.d: Likewise. * gas/testsuite/gas/arm/attr-mcpu.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-maverick.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/testsuite/gas/arm/attr-order.d: Likewise. * gas/testsuite/gas/arm/attr-override-cpu-directive.d: Likewise. * gas/testsuite/gas/arm/attr-override-mcpu.d: Likewise. * gas/testsuite/gas/arm/eabi_attr_1.d: Likewise. * gas/testsuite/gas/arm/mov-highregs-any.d: Likewise. * gas/testsuite/gas/arm/mov-lowregs-any.d: Likewise. * gas/testsuite/gas/arm/pr12198-1.d: Likewise. * gas/testsuite/gas/arm/pr12198-2.d: Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-2.attr: Update ouput. * ld/testsuite/ld-arm/attr-merge-2a.s: Remove Tag_DIV_use test. * ld/testsuite/ld-arm/attr-merge-2b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-3.attr: Updated expected output. * ld/testsuite/ld-arm/attr-merge-4.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-5.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-1.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-6.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-6r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise. * ld/testsuite/ld-arm/attr-merge.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-div-0.s: New testcase. * ld/testsuite/ld-arm/attr-merge-div-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-01-m3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-01.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-1.s: Likewise. * ld/testsuite/ld-arm/attr-merge-div-10-m3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-10.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-11.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-12.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-120.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-2.s: Likewise. * ld/testsuite/ld-arm/attr-merge-div-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-21.d: Likewise. * ld/testsuite/ld-arm/attr-merge-div-22.d: Likewise.
2012-03-15gas/Thomas Schwinge2-1/+5
* doc/as.texinfo (Bundle directives): Fix typo.
2012-03-15 * gas/i386/bundle-lock.d: Ignore trailing nops.Alan Modra4-0/+9
* gas/i386/bundle.d: Likewise. * gas/i386/x86-64-bundle.d: Likewise.
2012-03-14Replace @defn with @dfnH.J. Lu2-5/+9
2012-03-14 Ryan Mansfield <rmansfield@qnx.com> * doc/as.texinfo (Bundle directives): Replace @defn with @dfn.
2012-03-13Fix up last commit.Roland McGrath3-3/+3
2012-03-13gas/Roland McGrath24-86/+8953
2012-03-12 Roland McGrath <mcgrathr@google.com> * config/tc-arm.c (arm_frag_max_var): New function. * config/tc-arm.h: Declare it. (md_frag_max_var): New macro. * config/tc-i386.c (i386_frag_max_var): New function. * config/tc-i386.h: Declare it. (md_frag_max_var): New macro. * doc/as.texinfo (Bundle directives): New node. (Pseudo Ops): Add it to the menu. * NEWS: Mention new feature. * read.c [md_frag_max_var] (HANDLE_BUNDLE): New macro. [HANDLE_BUNDLE] (bundle_align_p2): New variable. [HANDLE_BUNDLE] (bundle_lock_frchain, bundle_lock_frag): New variables. [HANDLE_BUNDLE] (start_bundle, pending_bundle_size, finish_bundle): New functions. (assemble_one): New function if [HANDLE_BUNDLE], #define directly to md_assembly if not. (read_a_source_file): Call assemble_one in place of md_assemble. (read_a_source_file) [HANDLE_BUNDLE]: Check for unterminated .bundle_lock at end of processing. [HANDLE_BUNDLE] (s_bundle_align_mode, s_bundle_lock, s_bundle_unlock): New functions. [HANDLE_BUNDLE] (potable): Add their entries. * read.h: Declare new functions. gas/testsuite/ 2012-03-12 Roland McGrath <mcgrathr@google.com> * gas/i386/bundle-bad.s: New file. * gas/i386/bundle-bad.d: New file. * gas/i386/bundle-bad.l: New file. * gas/i386/i386.exp: Run it. * gas/arm/bundle.s: New file. * gas/arm/bundle.d: New file. * gas/arm/bundle-lock.s: New file. * gas/arm/bundle-lock.d: New file. * gas/i386/bundle.s: New file. * gas/i386/bundle.d: New file. * gas/i386/x86-64-bundle.s: New file. * gas/i386/x86-64-bundle.d: New file. * gas/i386/bundle-lock.s: New file. * gas/i386/bundle-lock.d: New file. * gas/i386/i386.exp: Run them.
2012-03-09include/opcode/Alan Modra14-7/+243
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. opcodes/ * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500". * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New. (PPCVEC2, PPCTMR, E6500): New short names. (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt, mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx, lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl, lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl, lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC optional operands on sync instruction for E6500 target. bfd/ * archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add entryies for bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. gas/ * config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500. (ppc_handle_align): Add termination nop opcode for e500mc family. * doc/as.texinfo: Document options -me5500 and -me6500. * doc/c-ppc.texi: Likewise. gas/testsuite/ * gas/ppc/e500mc64_nop.s: New test case for e500mc family termination nops. * gas/ppc/e500mc64_nop.d: Likewise. * gas/ppc/e5500_nop.s: Likewise. * gas/ppc/e5500_nop.d: Likewise. * gas/ppc/e6500_nop.s: Likewise. * gas/ppc/e6500_nop.d: Likewise. * gas/ppc/e6500.s: New. * gas/ppc/e6500.d: Likewise. * gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
2012-03-082012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-2/+7
* s390-opc.txt: Set instruction type of pku to SS_L2RDRD. 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: Move length field to the second operand. * gas/s390/esa-g5.s: Likewise.
2012-03-07 * mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,Nick Clifton2-0/+26
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE, R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD, R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF. * elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type field. (elf32_mn10300_link_hash_table): Add tls_ldm_got entry; (elf_mn10300_tdata): Define. (elf_mn10300_local_got_tls_type): Define. (elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD, R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE, R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD, R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs. (mn10300_reloc_map): Likewise. (elf_mn10300_tls_transition): New function. (dtpoff, tpoff, mn10300_do_tls_transition): New functions. (mn10300_elf_check_relocs): Add TLS support. (mn10300_elf_final_link_relocate): Likewise. (mn10300_elf_relocate_section): Likewise. (mn10300_elf_relax_section): Likewise. (elf32_mn10300_link_hash_newfunc): Initialise new field. (_bfd_mn10300_copy_indirect_symbol): New function. (elf32_mn10300_link_hash_table_create): Initialise new fields. (_bfd_mn10300_elf_size_dynamic_sections): Add TLS support. (_bfd_mn10300_elf_finish_dynamic_symbol): Likewise. (_bfd_mn10300_elf_reloc_type_class): Allocate an elf_mn10300_obj_tdata structure. (elf_backend_copy_indirect_symbol): Define. * reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD, BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE, BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD, BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations. (BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to alongside other MN10300 relocations. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * config/tc-mn10300.c (other_registers): Add SSP and USP. (md_assemble): Add support for TLS relocs. (mn10300_parse_name): Likewise. * readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
2012-02-27 * config/tc-crx.c (check_range): Correct uint32_t misconceptions.Alan Modra2-5/+6
2012-02-27 * config/tc-tic4x.c (tic4x_do_align): Remove ATTRIBUTE_UNUSED onAlan Modra2-13/+23
params. Properly generate NOP pattern. Comment reason for subseg_text_p failure.
2012-02-27 * config/tc-h8300.c (constant_fits_width_p): Trim constant to 32 bitsAlan Modra2-12/+26
and sign extend before range tests. (constant_fits_size_p): Similarly. (get_specific): Trim X_add_number to 32 bits. (fix_operand_size): Likewise, and use unsigned test for signed ranges.
2012-02-27gas/Alan Modra2-24/+35
* config/tc-crx.c: Include bfd_stdint.h. (getconstant): Remove irrelevant comment. Don't fail due to sign-extension of int mask. (check_range): Rewrite using unsigned arithmetic throughout. opcodes/ * crx-dis.c (print_arg): Mask constant to 32 bits. * crx-opc.c (cst4_map): Use int array. include/opcode/ * crx.h (cst4_map): Update declaration.
2012-02-25Fix regression from changeWalter Lee3-2/+10
http://sourceware.org/ml/binutils-cvs/2012-01/msg00049.html . The code needs to check that the symbol is not a local symbol before accessing a non-local-symbol field. * tc-tilepro.c (emit_tilepro_instruction): Check if symbol is non-local before checking sy_value. * tc-tilegx.c (emit_tilegx_instruction): Ditto.
2012-02-25Improve TLS support on TILE-Gx/TILEPro:Walter Lee5-183/+342
- Add support for TLS LE references. - Support linker optimization of TLS references. - Delete relocations of GOT/tp relative offsets beyond 32-bits. This brings binutils in line with the support expected in gcc 4.7, for TILE-Gx/TILEPro. bfd/ * reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL, BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD, BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA, BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA, BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE, BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE, BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE, BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD, BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD. Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT, BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD, BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE, BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE, BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE. * elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro relocations. (tilepro_reloc_map): Ditto. (tilepro_info_to_howto_rela): Ditto. (reloc_to_create_func): Ditto. (tilepro_tls_translate_to_le): New. (tilepro_tls_translate_to_ie): New. (tilepro_elf_tls_transition): New. (tilepro_elf_check_relocs): Handle new tls relocations. (tilepro_elf_gc_sweep_hook): Ditto. (allocate_dynrelocs): Ditto. (tilepro_elf_relocate_section): Ditto. (tilepro_replace_insn): New. (insn_mask_X1): New. (insn_mask_X0_no_dest_no_srca): New (insn_mask_X1_no_dest_no_srca): New (insn_mask_Y0_no_dest_no_srca): New (insn_mask_Y1_no_dest_no_srca): New (srca_mask_X0): New (srca_mask_X1): New (insn_tls_le_move_X1): New (insn_tls_le_move_zero_X0X1): New (insn_tls_ie_lw_X1): New (insn_tls_ie_add_X0X1): New (insn_tls_ie_add_Y0Y1): New (insn_tls_gd_add_X0X1): New (insn_tls_gd_add_Y0Y1): New * elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx relocations. (tilegx_reloc_map): Ditto. (tilegx_info_to_howto_rela): Ditto. (reloc_to_create_func): Ditto. (tilegx_elf_link_hash_table): New field disable_le_transition. (tilegx_tls_translate_to_le): New. (tilegx_tls_translate_to_ie): New. (tilegx_elf_tls_transition): New. (tilegx_elf_check_relocs): Handle new tls relocations. (tilegx_elf_gc_sweep_hook): Ditto. (allocate_dynrelocs): Ditto. (tilegx_elf_relocate_section): Ditto. (tilegx_copy_bits): New. (tilegx_replace_insn): New. (insn_mask_X1): New. (insn_mask_X0_no_dest_no_srca): New. (insn_mask_X1_no_dest_no_srca): New. (insn_mask_Y0_no_dest_no_srca): New. (insn_mask_Y1_no_dest_no_srca): New. (insn_mask_X0_no_operand): New. (insn_mask_X1_no_operand): New. (insn_mask_Y0_no_operand): New. (insn_mask_Y1_no_operand): New. (insn_tls_ie_ld_X1): New. (insn_tls_ie_ld4s_X1): New. (insn_tls_ie_add_X0X1): New. (insn_tls_ie_add_Y0Y1): New. (insn_tls_ie_addx_X0X1): New. (insn_tls_ie_addx_Y0Y1): New. (insn_tls_gd_add_X0X1): New. (insn_tls_gd_add_Y0Y1): New. (insn_move_X0X1): New. (insn_move_Y0Y1): New. (insn_add_X0X1): New. (insn_add_Y0Y1): New. (insn_addx_X0X1): New. (insn_addx_Y0Y1): New. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * tc-tilepro.c (O_tls_le): Define operator. (O_tls_le_lo16): Ditto. (O_tls_le_hi16): Ditto. (O_tls_le_ha16): Ditto. (O_tls_gd_call): Ditto. (O_tls_gd_add): Ditto. (O_tls_ie_load): Ditto. (md_begin): Delete old operators; handle new operators. (emit_tilepro_instruction): Ditto. (md_apply_fix): Ditto. * tc-tilegx.c (O_hw1_got): Delete operator. (O_hw2_got): Ditto. (O_hw3_got): Ditto. (O_hw2_last_got): Ditto. (O_hw1_tls_gd): Ditto. (O_hw2_tls_gd): Ditto. (O_hw3_tls_gd): Ditto. (O_hw2_last_tls_gd): Ditto. (O_hw1_tls_ie): Ditto. (O_hw2_tls_ie): Ditto. (O_hw3_tls_ie): Ditto. (O_hw2_last_tls_ie): Ditto. (O_hw0_tls_le): Define operator. (O_hw0_last_tls_le): Ditto. (O_hw1_last_tls_le): Ditto. (O_tls_gd_call): Ditto. (O_tls_gd_add): Ditto. (O_tls_ie_load): Ditto. (O_tls_add): Ditto. (md_begin): Delete old operators; handle new operators. (emit_tilegx_instruction): Ditto. (md_apply_fix): Ditto. * doc/c-tilegx.texi: Delete old operators; document new operators. * doc/c-tilepro.texi: Ditto. include/elf/ * tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete. (R_TILEGX_IMM16_X1_HW1_GOT): Ditto. (R_TILEGX_IMM16_X0_HW2_GOT): Ditto. (R_TILEGX_IMM16_X1_HW2_GOT): Ditto. (R_TILEGX_IMM16_X0_HW3_GOT): Ditto. (R_TILEGX_IMM16_X1_HW3_GOT): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto. (R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto. (R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto. (R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto. (R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation. (R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto. (R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto. (R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto. (R_TILEGX_TLS_GD_CALL): Ditto. (R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto. (R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto. (R_TILEGX_TLS_IE_LOAD): Ditto. (R_TILEGX_IMM8_X0_TLS_ADD): Ditto. (R_TILEGX_IMM8_X1_TLS_ADD): Ditto. (R_TILEGX_IMM8_Y0_TLS_ADD): Ditto. (R_TILEGX_IMM8_Y1_TLS_ADD): Ditto. * tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation. (R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto. (R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto. (R_TILEPRO_TLS_IE_LOAD): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto. (R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto. (R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto. include/opcode/ * tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS, TILEGX_OPC_LD_TLS. * tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS, TILEPRO_OPC_LW_TLS_SN. opcodes/ * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS. * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and TILEPRO_OPC_LW_TLS_SN.
generated by cgit v1.1 at 2024-11-25 08:51:16 +0000