Age | Commit message (Collapse) | Author | Files | Lines |
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* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5,
update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5,
and increase MAX_OPCODES.
(op_code_struct): add mbar and sleep
* microblaze-opcm.h (microblaze_instr): add mbar
Define IMM_MBAR and IMM5_MBAR_MASK
* microblaze-dis.c: Add get_field_imm5_mbar
(print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE
gas/
* config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5
gas/testsuite/
* gas/microblaze/allinsn.s: Add mbar and sleep
* gas/microblaze/allinsn.d: Likewise
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opcodes/
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn
* microblaze-opcm.h (microblaze_instr): add clz
gas/testsuite/
* gas/microblaze/allinsn.s: Add clz insn
* gas/microblaze/allinsn.d: Likewise
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2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur,
lhur, lwr, sbr, shr, swr
* microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr,
swr
2012-11-14 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/allinsn.exp: New file - test newly added opcodes
* gas/microblaze/allinsn.s: Likewise
* gas/microblaze/allinsn.d: Likewise
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* config/tc-ppc.c (md_apply_fix): Leave field zero when emitting
an ELF reloc on data as well.
gas/testsuite/ChangeLog:
* gas/ppc/astest.d: Update for fixup changes.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
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* gas/microblaze/endian.exp: New file - endian testcase for microblaze / microblazeel.
* gas/microblaze/endian.s: Likewise.
* gas/microblaze/endian_be.d: Likewise.
* gas/microblaze/endian_le.d: Likewise.
* gas/microblaze/endian_le_elf.d: Likewise.
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* config/obj-elf.h (obj_elf_vendor_attribute): ... here.
* read.c (potable): Remove "gnu_attribute".
(skip_whitespace, skip_past_char, skip_past_comma): Delete, move
to config/obj-elf.c.
(s_vendor_attribute): Delete, move to obj_elf_vendor_attribute
in config/obj-elf.c.
(s_gnu_attribute): Delete, move to obj_elf_gnu_attribute in
config/obj-elf.c.
* config/obj-elf.c (elf_pseudo_table): Add "gnu_attribute".
(skip_whitespace, skip_past_char, skip_past_comma): New, moved
from read.c.
(obj_elf_vendor_attribute): New, moved from s_vendor_attribute
in read.c.
(obj_elf_gnu_attribute): New, moved from s_gnu_attribute in
read.c.
* config/tc-arm.c (s_arm_eabi_attribute): Rename
s_vendor_attribute to obj_elf_vendor_attribute.
* config/tc-tic6x.c (s_tic6x_c6xabi_attribute): Likewise.
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* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
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* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
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binutils/bfd/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* config.bfd: Add microblazeel-*-*
* configure.in: Likewise.
* configure: Regenerate.
* elf32-microblaze.c (microblaze_elf_relocate_section):
Add endian awareness.
(microblaze_elf_merge_private_bfd_data): New.
(microblaze_bfd_write_imm_value_32): New.
(microblaze_bfd_write_imm_value_64): New.
(microblaze_elf_relax_section): Add endian awareness.
(microblaze_elf_add_symbol_hook): Define TARGET_LITTLE_NAME,
TARGET_LITTLE_SYM and bfd_elf32_bfd_merge_private_bfd_data.
* targets.c: Add bfd target bfd_elf32_microblazeel_vec.
binutils/gas/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* tc-microblaze.c (md_longopts): Define OPTION_EB and
OPTION_EL for target.
(md_parse_option): Likewise.
* tc-microblaze.h: Set elf32-microblazeel if not
target_big_endian for TARGET_FORMAT.
* configure.tgt: Add microblazeel and set endian per target.
binutils/gas/testsuite/Changelog
2012-11-09 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze/endian.exp: New file - endian
testcase for microblaze / microblazeel.
* gas/microblaze/endian.s: Likewise.
* gas/microblaze/endian_be.d: Likewise.
* gas/microblaze/endian_le.d: Likewise.
* gas/microblaze/endian_le_elf.d: Likewise.
* gas/microblaze/reloc_sym.d: Update to accept targets
other than elf32-microblaze.
* gas/microblaze/special_reg.d: Likewise.
binutils/ld/Changelog
2012-11-09 Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Makefile.am: Add eelf32microblazeel.c and eelf32mbel_linux.c.
* Makefile.in: Regenerated.
* configure.tgt: Add microblazeel and set endian per target.
* emulparams/elf32mb_linux.sh: Add OUTPUT_FORMAT.
* emulparams/elf32microblaze.sh: Likewise.
* emulparams/elf32mbel_linux.sh: New file.
* emulparams/elf32microblazeel.sh: Likewise.
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* config/tc-m68hc11.c: Fix R_M68HC12_16B relocation for movb/w
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bfd/
* aout-tic30.c (MY_final_link_callback): Remove trailing
redundant `;'.
* coff-h8500.c (extra_case): Likewise.
(bfd_coff_reloc16_get_value): Likewise.
* dwarf2.c (_bfd_dwarf2_cleanup_debug_info): Likewise.
* elf.c (_bfd_elf_slurp_version_tables): Likewise.
* elf32-frv.c (elf32_frv_relocate_section): Likewise.
* elf32-v850.c (v850_elf_perform_relocation): Likewise.
* opncls.c (bfd_calc_gnu_debuglink_crc32): Likewise.
* plugin.c (add_symbols): Likewise.
* reloc.c (bfd_check_overflow): Likewise.
* vms-lib.c (_bfd_vms_lib_archive_p): Likewise.
binutils/
* coffgrok.c (coff_grok): Remove trailing redundant `;'.
* resrc.c (open_input_stream): Likewise.
gas/
* config/atof-ieee.c (gen_to_words): Remove trailing redundant
`;'.
* config/atof-vax.c (flonum_gen2vax): Likewise.
* config/tc-d10v.c (write_2_short): Likewise.
* config/tc-i386-intel.c (i386_intel_simplify): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-v850.c (md_parse_option): Likewise.
* config/tc-xtensa.c (find_address_of_next_align_frag): Likewise.
* dwarf2dbg.c (out_header): Likewise.
* symbols.c (dollar_label_name): Likewise.
(fb_label_name): Likewise.
ld/
* testplug.c (record_add_file): Remove trailing redundant `;'.
opcodes/
* aarch64-opc.h (gen_mask): Remove trailing redundant `;'.
* ia64-gen.c (fetch_insn_class): Likewise.
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* config/tc-mips.c (mips_ip) <'u'>: Default to BFD_RELOC_LO16.
gas/testsuite/
* gas/mips/lui.d: New test.
* gas/mips/micromips@lui.d: New test.
* gas/mips/lui-1.l: New list test.
* gas/mips/lui-2.l: New list test.
* gas/mips/lui.s: New test source.
* gas/mips/lui-1.s: New test source.
* gas/mips/lui-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
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* config/tc-m68hc11.c: Fix R_M68HC12_16B relocation for movb/w
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* config/tc-microblaze.c: Remove special register condition check
for INST_TYPE_RFSL related instructions.
2012-11-07 David Holsgrove <david.holsgrove@xilinx.com>
* testsuite/gas/microblaze/special_reg.exp: Add test case.
* testsuite/gas/microblaze/special_reg.s: Likewise.
* testsuite/gas/microblaze/special_reg.d: Likewise.
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style and whitespace fixes. Wrap overly long lines. Format
help message.
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* coff-tic4x.c (tic4x_coff0_vec, tic4x_coff0_beh_vec,
tic4x_coff1_vec, tic4x_coff1_beh_vec, tic4x_coff2_vec,
tic4x_coff2_beh_vec): Allow SEC_CODE and SEC_READONLY in
section flags.
gas/
* config/tc-tic4x.c: Remove alignment TODO comments.
(tic4x_do_align): Enable subseg_text_p test.
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* elf64-ppc.c (struct ppc_link_hash_table): Add dot_toc_dot.
(ppc64_elf_size_stubs): Lookup ".TOC.".
(ppc64_elf_relocate_section): Resolve special symbol ".TOC.".
gas/
* config/tc-ppc.c (ppc_elf_adjust_symtab): New function, split out..
(ppc_frob_file_before_adjust): ..from here.
(md_apply_fix): Set BSF_KEEP on .TOC. if not @tocbase.
* config/tc-ppc.h (ppc_elf_adjust_symtab): Declare.
(tc_adjust_symtab): Define.
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last patch.
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* config/tc-m68hc11.c: Likewise.
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(ppc_setup_opcodes): Assert num_powerpc_operands fit.
(ppc_is_toc_sym): Move earlier in file.
(md_assemble): Move code setting reloc from md_apply_fix. Combine
non-ELF code setting fixup with ELF code. Stash opindex in
fx_pcrel_adjust. Adjust fixup offset for VLE. Don't set
fx_no_overflow here.
(md_apply_fix): Rewrite to use ppc_insert_operand for all
resolved instruction fields. Leave insn field zero when
emitting an ELF reloc in most cases.
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* config/tc-m68k.c (tc_gen_reloc, md_pcrel_from): Remove explicit
sign extendion of fx_pxrel_adjust.
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* config/tc-mips.c (append_insn): Set fx_no_overflow for 16-bit
microMIPS branch relocations.
gas/testsuite/
* gas/mips/micromips-b16.d: New test.
* gas/mips/micromips-b16.s: New test source.
* gas/mips/mips.exp: Run the new test.
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* config/tc-mips.c (is_delay_slot_valid): Don't accept macros
in 16-bit delay slots.
(macro_build_jalr): Emit 32-bit JALR if placed in a 32-bit delay
slot.
(macro) <M_JAL_2>: Likewise
gas/testsuite/
* gas/mips/micromips-branch-delay.l: Update messages for 16-bit
delay slot changes.
* gas/mips/micromips-warn-branch-delay.d: New test.
* gas/mips/micromips-warn-branch-delay.l: Stderr output for the
new test.
* gas/mips/micromips-warn-branch-delay-1.d: New test.
* gas/mips/micromips-warn-branch-delay.s: New test source.
* gas/mips/micromips-warn-branch-delay-1.s: New test source.
* gas/mips/mips.exp: Run the new tests.
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* config/tc-microblaze.c: Check for weak symbols before
emitting relocation.
2012-10-31 David Holsgrove <david.holsgrove@xilinx.com>
* gas/microblaze: New.
* gas/microblaze/reloc_sym.exp: Add test case.
* gas/microblaze/reloc_strongsym.s: Likewise.
* gas/microblaze/reloc_weaksym.s: Likewise.
* gas/microblaze/reloc_sym.d: Likewise.
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* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
binutils:
PR binutils/14779
* configure.in: Add checks for wchar.h and mbstate_t.
* config.in: Regenerate.
* configure: Regenerate.
* readelf.c: Conditionally include wchar.h.
(print_symbol): Conditionally use mbstate_t.
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same size as long.
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* dlltool.c (INIT_SEC_DATA): Move.
(secdata <DLLTOOL_PPC>): Use here too.
binutils/testsuite/
* binutils-all/copy-3.d: Exclude all cygwin and mingw targets,
and rs6000.
gas/
* config/tc-ppc.c (ppc_znop): Remove unused vars.
ld/
* configure.tgt (powerpcle-pe,winnt,cygwin): Add deffilep.o
and pe-dll.o.
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powerpc-pe targets from cfi-common-6 test.
* gas/cfi/cfi-ppc-1.d: Use objdump to handle pe.
* gas/cfi/cfi-ppc-1.s: Don't use .type and .size.
* gas/ppc/ppc.exp: Exclude various tests for powerpc-pe. Exclude
vle tests for le targets.
* gas/ppc/476.d, * gas/ppc/476.s: Update for le output. Use .text
rather than section directive with quotes.
* gas/ppc/a2.d, * gas/ppc/a2.s: Likewise.
* gas/ppc/altivec.d, * gas/ppc/altivec.s: Likewise.
* gas/ppc/altivec2.d: Likewise.
* gas/ppc/altivec_and_spe.d: Likewise.
* gas/ppc/astest.d: Likewise.
* gas/ppc/astest2.d: Likewise.
* gas/ppc/astest2_64.d: Likewise.
* gas/ppc/astest64.d: Likewise.
* gas/ppc/booke.d, * gas/ppc/booke.s: Likewise.
* gas/ppc/cell.d, * gas/ppc/cell.s: Likewise.
* gas/ppc/common.d, * gas/ppc/common.s: Likewise.
* gas/ppc/e500.d, * gas/ppc/e500.s: Likewise.
* gas/ppc/e500mc.d, * gas/ppc/e500mc.s: Likewise.
* gas/ppc/e500mc64_nop.d, * gas/ppc/e500mc64_nop.s: Likewise.
* gas/ppc/e5500_nop.d, * gas/ppc/e5500_nop.s: Likewise.
* gas/ppc/e6500.d, * gas/ppc/e6500.s: Likewise.
* gas/ppc/e6500_nop.d, * gas/ppc/e6500_nop.s: Likewise.
* gas/ppc/machine.d: Likewise.
* gas/ppc/power4.d, * gas/ppc/power4.s: Likewise.
* gas/ppc/power4_32.d, * gas/ppc/power4_32.s: Likewise.
* gas/ppc/power6.d, * gas/ppc/power6.s: Likewise.
* gas/ppc/power7.d, * gas/ppc/power7.s: Likewise.
* gas/ppc/ppc750ps.d, * gas/ppc/ppc750ps.s: Likewise.
* gas/ppc/regnames.d: Likewise.
* gas/ppc/simpshft.d: Likewise.
* gas/ppc/test1elf32.d: Likewise.
* gas/ppc/test1elf64.d: Likewise.
* gas/ppc/titan.d, * gas/ppc/titan.s: Likewise.
* gas/ppc/vle-reloc.s: Likewise.
* gas/ppc/vle-simple-1.s: Likewise.
* gas/ppc/vle-simple-2.s: Likewise.
* gas/ppc/vle-simple-3.s: Likewise.
* gas/ppc/vle-simple-4.s: Likewise.
* gas/ppc/vle-simple-5.s: Likewise.
* gas/ppc/vle-simple-6.s: Likewise.
* gas/ppc/vle.s: Likewise.
* gas/ppc/vsx.d, * gas/ppc/vsx.s: Likewise.
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2012-10-27 James Lemke <jwlemke@codesourcery.com>
* gas/m68k/all.exp: Exclude pr11676 for fido-*-*.
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* s390-mkopc.c: Accept empty lines in s390-opc.txt.
* s390-opc.c: Add M_20OPT field. New instruction formats RRF_RURR2 and RRF_RMRR.
* s390-opc.txt: Add new instructions. New instruction type for lptea.
2012-10-26 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/testsuite/gas/s390/zarch-z10.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z10.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z196.s: Refreshed.
* gas/testsuite/gas/s390/zarch-z9-109.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.d: Refreshed.
* gas/testsuite/gas/s390/zarch-z990.s: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.d: Refreshed.
* gas/testsuite/gas/s390/zarch-zEC12.s: Refreshed.
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* gas/z8k/z8k.exp: Run translate-ops test.
* gas/z8k/translate-ops.s: New file.
* gas/z8k/translate-ops.d: New file.
opcodes:
* z8kgen.c (struct op): Fix encoding for translate opcodes (trdb,
trdrb, trib, trirb, trtdb, trtdrb, trtib, trtirb). Remove
non-existing opcode trtrb.
* z8k-opc.h: Regenerate.
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bfd/
* elf32-ppc.c (ppc_elf_reloc_type_lookup): Decode ppc64 _DS
bfd_reloc values. Map to corresponding D-form relocs.
(is_insn_ds_form, is_insn_qs_form): New functions.
(ppc_elf_relocate_section): Validate insn with DS-form or DQ-form
fields using D-form reloc.
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Fix comment.
(md_assemble): Translate to _DS relocs for ppc32 as well as ppc64.
(tc_gen_reloc): Handle _DS relocs in ppc32 mode.
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* gas/ppc/power4.d: Update.
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* gas/i386/rex.s: Add test of REX prefix before fsave (i.e. fwait).
* gas/i386/rex.d: Update.
opcodes/
* i386-dis.c (ckprefix): When bailing out for fwait with prefixes,
set rex_used to rex.
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* ppc-opc.c (powerpc_opcodes) <vcfpsxws>: Fix opcode spelling.
gas/testsuite/
* gas/ppc/altivec.s <vcfpsxws>: Fix opcode spelling.
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current sbrk(0) and start_sbrk.
* (main): Set start_sbrk to sbrk(0) on entry.
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(coff_frob_symbol): Check that function-aux entries are generated for
defined symbols only.
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exclude.
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opcodes/
* aarch64-opc.c (aarch64_sys_regs): Add rmr_el1, rmr_el2 and
rmr_el3; remove daifset and daifclr.
gas/testsuite/
* gas/aarch64/sysreg-1.s: Add tests of rmr_el1, rmr_el2 and rmr_el3.
* gas/aarch64/sysreg-1.d: Update.
* gas/aarch64/illegal.s: Add tests of daifset and daifclr.
* gas/aarch64/illegal.d: Update.
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opcodes/
* aarch64-opc.c (operand_general_constraint_met_p): Change to check
the alignment of addr.offset.imm instead of that of shifter.amount for
operand type AARCH64_OPND_ADDR_UIMM12.
gas/testsuite/
* gas/aarch64/illegal-2.s: Add test case.
* gas/aarch64/illegal-2.l: Likewise.
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(pa_get_absolute_expression): Simplify.
(pa_ip): Use pa_get_number instead of pa_get_absolute_expression
to get SOP, SFU and COPR identifiers.
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loads that reference the right half of a floating point register.
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which reference the right half of a floating point register.
* gas/hppa/basic/basic.exp: Adjust expected results.
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not involving a carry.
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involving a carry.
* gas/hppa/basic/unit2.s: Likewise.
* gas/hppa/basic/basic.exp: Adjusted expected.
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