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2015-10-22Add support for MSP430 silicon errata to the assembler.Nick Clifton11-80/+473
* config/tc-msp430.c (PUSH_1X_WORKAROUND): Delete. (OPTION_SILICON_ERRATA): Define. (OPTION_SILICON_WARN): Define. (md_parse_opton): Handle silicon errata options. (md_longopts): Add silicon errata options. (ms_show_usage): Report silicon errata options. (msp430_srcoperand): Handle silicon errata. (msp430_operands): Likewise. Improve nop insertion. (msp430_fix_adjustable): Update warning generation. * doc/c-msp430.texi: Document silicon errata options. tests * gas/msp430/errata_fixes.s: New test source file. * gas/msp430/errata_fixes.d: New test control file. * gas/msp430/errata_warns.s: New test source file. * gas/msp430/errata_warns.d: New test control file. * gas/msp430/errata_warns.l: New test message file. * gas/msp430/msp430.exp: Run the new tests. * gas/msp430/bad.l: Update expected warning messages * gas/msp430/msp430.exp: Run the new tests.
2015-10-22Properly check --enable-compressed-debug-sections={yes,all}H.J. Lu3-2/+8
gas/ * configure.ac: Properly check --enable-compressed-debug-sections={yes,all}. * configure: Regenerated. ld/ * configure.ac: Properly check --enable-compressed-debug-sections={yes,all}. * configure: Regenerated.
2015-10-22Handle --enable-compressed-debug-sections=ld,gasH.J. Lu3-10/+18
gas/ PR gas/19109 * configure.ac: Handle --enable-compressed-debug-sections=*,gas,*. * configure: Regenerated. ld/ PR gas/19109 * configure.ac: Handle --enable-compressed-debug-sections=*,ld,*. * configure: Regenerated.
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu10-12/+119
This patch adds support for the R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX relocations proposed in https://groups.google.com/forum/#!topic/x86-64-abi/n9AWHogmVY0 to gas and ld. It updates gas to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX if there is a REX prefix, relocation for memory operand, foo@GOTPCREL(%rip). With the locally defined symbol, foo, we convert mov foo@GOTPCREL(%rip), %reg to lea foo(%rip), %reg and convert call/jmp *foo@GOTPCREL(%rip) to nop call foo/jmp foo nop When PIC is false, convert test %reg, foo@GOTPCREL(%rip) to test $foo, %reg and convert binop foo@GOTPCREL(%rip), %reg to binop $foo, %reg where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf64-x86-64.c: Include opcode/i386.h. (x86_64_elf_howto_table): Add R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (R_X86_64_standard): Replace R_X86_64_PLT32_BND with R_X86_64_REX_GOTPCRELX. (x86_64_reloc_map): Add BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_x86_64_check_relocs): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. Replace need_convert_mov_to_lea with need_convert_load. (elf_x86_64_gc_sweep_hook): Handle R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX. (elf_x86_64_size_dynamic_sections): Likewise. (elf_x86_64_relocate_section): Likewise. (elf_x86_64_convert_mov_to_lea): Renamed to ... (elf_x86_64_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_X86_64_GOTPCRELX and R_X86_64_REX_GOTPCRELX transformations. * reloc.c (BFD_RELOC_X86_64_GOTPCRELX): New. (BFD_RELOC_X86_64_REX_GOTPCRELX): Likewise. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. (tc_gen_reloc): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_GOTPCRELX or BFD_RELOC_X86_64_REX_GOTPCRELX if fx_tcbit2 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Also return true for BFD_RELOC_X86_64_GOTPCRELX and BFD_RELOC_X86_64_REX_GOTPCRELX. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-gotpcrel. * gas/i386/x86-64-gotpcrel.d: New file. * gas/i386/x86-64-gotpcrel.s: Likewise. * gas/i386/ilp32/x86-64-gotpcrel.d: Likewise. * gas/i386/x86-64-localpic.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * gas/i386/ilp32/x86-64-localpic.d: Likewise. include/elf/ * x86-64.h (R_X86_64_GOTPCRELX): New. (R_X86_64_REX_GOTPCRELX): Likewise. ld/testsuite/ * ld-ifunc/ifunc-5r-local-x86-64.d: Replace R_X86_64_GOTPCREL with R_X86_64_REX_GOTPCRELX. * ld-x86-64/plt-main1.rd: Likewise. * ld-x86-64/plt-main3.rd: Likewise. * ld-x86-64/plt-main4.rd: Likewise. * ld-x86-64/gotpcrel1.dd: New file. * ld-x86-64/gotpcrel1.out: Likewise. * ld-x86-64/gotpcrel1a.S: Likewise. * ld-x86-64/gotpcrel1b.c: Likewise. * ld-x86-64/gotpcrel1c.c: Likewise. * ld-x86-64/gotpcrel1d.S: Likewise. * ld-x86-64/load1.s: Likewise. * ld-x86-64/load1a.d: Likewise. * ld-x86-64/load1b.d: Likewise. * ld-x86-64/load1c.d: Likewise. * ld-x86-64/load1d.d: Likewise. * ld-x86-64/x86-64.exp: Run load1a, load1b, load1c and load1d tests. Run gotpcrel1 test.
2015-10-22Add R_386_GOT32X support to gas and ldH.J. Lu9-19/+151
This patch adds support for the R_386_GOT32X relocation proposed in https://groups.google.com/forum/#!topic/ia32-abi/GbJJskkid4I to gas and ld. It updates gas to generate R_386_GOT32X relocation for memory operand, foo@GOT[(%reg)]. We must encode "mov foo@GOT, %eax" with the 0x8b opcode, instead of the 0xb8 opcode, so that it can be transformed to "lea foo, %eax". With the locally defined symbol, foo, we convert mov foo@GOT[(%reg1)], %reg2 to lea foo[@GOTOFF(%reg1)], %reg2 and convert call/jmp *foo@GOT[(%reg)] to nop call foo/jmp foo nop When PIC is false, convert test %reg1, foo@GOT[(%reg2)] to test $foo, %reg1 and convert binop foo@GOT[(%reg1)], %reg2 to binop $foo, %reg2 where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. bfd/ * elf32-i386.c: Include opcode/i386.h. (elf_howto_table): Add R_386_GOT32X. (R_386_ext2): Replace R_386_IRELATIVE with R_386_GOT32X. (elf_i386_reloc_type_lookup): Handle BFD_RELOC_386_GOT32X. (need_convert_mov_to_lea): Renamed to ... (need_convert_load): This. (elf_i386_check_relocs): Handle R_386_GOT32X. Replace need_convert_mov_to_lea with need_convert_load. (elf_i386_gc_sweep_hook): Handle R_386_GOT32X. (elf_i386_size_dynamic_sections): Likewise. (elf_i386_relocate_section): Likewise. (elf_i386_convert_mov_to_lea): Renamed to ... (elf_i386_convert_load): This. Replace need_convert_mov_to_lea with need_convert_load. Support R_386_GOT32X transformations. * reloc.c (BFD_RELOC_386_GOT32X): New. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_386_GOT32X. (tc_gen_reloc): Likewise. (match_template): Force 0x8b encoding for "mov foo@GOT, %eax". (output_disp): Check for "call/jmp *mem", "mov mem, %reg", "test %reg, mem" and "binop mem, %reg" where binop is one of adc, add, and, cmp, or, sbb, sub, xor instructions. Set fx_tcbit if the REX prefix is generated. Set fx_tcbit2 if BFD_RELOC_386_GOT32X should be generated. (i386_validate_fix): Generate BFD_RELOC_386_GOT32X if fx_tcbit2 is set. gas/testsuite/ * gas/i386/got.d: New file. * gas/i386/got.s: Likewise. * gas/i386/i386.exp: Run got. * gas/i386/localpic.d: Replace R_386_GOT32 with R_386_GOT32X. * gas/i386/mixed-mode-reloc32.d: Likewise. * gas/i386/reloc32.d: Likewise. include/elf/ * i386.h (R_386_GOT32X): New relocation. ld/testsuite/ * ld-i386/branch1.d: New file. * ld-i386/branch1.s: Likewise. * ld-i386/call1.d: Likewise. * ld-i386/call1.s: Likewise. * ld-i386/call2.d: Likewise. * ld-i386/call2.s: Likewise. * ld-i386/got1.dd: Likewise. * ld-i386/got1.out: Likewise. * ld-i386/got1a.S: Likewise. * ld-i386/got1b.c: Likewise. * ld-i386/got1c.c: Likewise. * ld-i386/got1d.S: Likewise. * ld-i386/jmp1.d: Likewise. * ld-i386/jmp1.s: Likewise. * ld-i386/jmp2.d: Likewise. * ld-i386/jmp2.s: Likewise. * ld-i386/load1.d: Likewise. * ld-i386/load1.s: Likewise. * ld-i386/load2.d: Likewise. * ld-i386/load2.s: Likewise. * ld-i386/load3.d: Likewise. * ld-i386/load3.s: Likewise. * ld-i386/load4.s: Likewise. * ld-i386/load4a.d: Likewise. * ld-i386/load4b.d: Likewise. * ld-i386/load5.s: Likewise. * ld-i386/load5a.d: Likewise. * ld-i386/load5b.d: Likewise. * ld-i386/load6.d: Likewise. * ld-i386/load6.s: Likewise. * ld-i386/i386.exp: Run branch1, call1, call2, jmp1, jmp2, load1, load2, load3, load4a, load4b, load5a, load5b and load6 tests. Run got1 test.
2015-10-22Fix tests for PR 18500, revisitedAlan Modra4-34/+42
Correct commit a846e9c1. PR gas/18500 * gas/arm/vfpv2-ldr_immediate.d: Use parentheses, not brackets, to select alternatives. * gas/arm/vfpv3-ldr_immediate.d: Likewise. * gas/arm/vfpv3xd-ldr_immediate.d: Likewise.
2015-10-21Fix tests for PR 18500 so that they will pass for big-endian ARM toolchains.Nick Clifton4-34/+42
PR gas/18500 * gas/arm/vfpv3xd-ldr_immediate.d: Update test for big-endian ARM toolchains. * gas/arm/vfpv3-ldr_immediate.d: Likewise. * gas/arm/vfpv2-ldr_immediate.d: Likewise.
2015-10-21Extend description of the --enable-compressed-debug-sections configure ↵Nick Clifton3-3/+4
option in gas and ld.
2015-10-21Reset x86 Linux targets to not compressing debug sections by default. ↵Nick Clifton3-16/+42
Enable compression of debug sections by default in the linker, if so configured. PR gas/19109 . * configure.ac: Note the 'none' is an acceptable argument to --enable-compressed-debug-sections. * configure: Regenerate. gas * configure.ac: Restore --enable-compressed-debug-sections. Do not enable compressed debug sections by default for x86 Linux targets. * configure: Regenerate. ld * configure.ac: Add --enable-compressed-debug-sections. * configure: Regenerate. * config.in: Regenerate. * ld.texinfo: Document how to determine the default action for debug sections. * ldmain.c (main): If DEFAULT_FLAG_COMPRESS_DEBUG is defined then set the compress_debug field of the link_info structure to zlib-gabi. * lexsup.c (elf_static_list_options): Output the default setting for the --compress-debug-sections option. * NEWS: Mention the new configure option.
2015-10-20Add --enable-compressed-debug-sections={all,gas,gold,ld}H.J. Lu4-36/+29
This patch removes the gas configure option: --enable-compressed-debug-sections and adds a toplevel configure option: --enable-compressed-debug-sections={all,gas,gold,ld} to enable compressed debug sections for gas, gold or ld by default. At the moment, this configure option is ignored by gold and ld. For x86 Linux targets, default to compressing debug sections in gas. PR gas/19109 * configure.ac: Add --enable-compressed-debug-sections={all,gas,gold,ld}. * configure: Regenerated. gas/ PR gas/19109 * NEWS: Update --enable-compressed-debug-sections=. * configure.ac: Remove --enable-compressed-debug-sections. (DEFAULT_FLAG_COMPRESS_DEBUG): Check --enable-compressed-debug-sections={all,gas} instead of --enable-compressed-debug-sections. For x86 Linux targets, default to compressing debug sections. * configure: Regenerated.
2015-10-19Add a gas configure option to select the default behaviour for the ↵Nick Clifton8-10/+79
generation of debug sections - compressed or uncompressed. PR gas/19109 * configure.ac: Add option --enable-compressed-debug-sections. This sets the default behaviour for compressing debug sections. * as.c (flag_compress_debug): Define and initialise to COMPRESS_DEBUG_GABI_ZLIB if DEFAULT_COMPRESS_DEBUG is set. (show_usage): Indicate whether --no-compress-debug-sections or --compress-debug-sections is the default. * config/tc-i386.c (flag_compress_debug): Delete definition. * doc/as.texinfo (--nocompress-debug-sectionas): Update description. * NEWS: Announce the new feature. * config.in: Regenerate. * configure: Regenerate.
2015-10-14Add missing changelog entriesAndreas Krebbel1-0/+7
2015-10-14S/390: Fix instruction type of troo, trot, trto, and trtt.Andreas Krebbel4-24/+24
opcodes/ChangeLog: 2015-10-14 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.c: Fix comment. * s390-opc.txt: Change instruction type for troo, trot, trto, and trtt to RRF_U0RER since the second parameter does not need to be a register pair. gas/testsuite/ChangeLog: 2015-10-14 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/s390/esa-g5.d: Use odd GPR for the second operand. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z9-109.d: Likewise. * gas/s390/esa-z9-109.s: Likewise.
2015-10-12Update list of known MSP430 MCU names.Nick Clifton2-62/+622
* config/tc-msp430.c (msp430_mcu_names): Rename to msp430_mcu_data. Add fields for the ISA and hardware multiply support. Update with information from the latest devices.csv file. (md_parse_option): Make use of the new array.
2015-10-12avr: Fix bugs in org/align tracking.Andrew Burgess5-13/+33
This commit fixes a few issues in the mechanism for passing information about ".org" and ".align" directives from the assembler to the linker, used by the avr target. In the original commit fdd410ac7a07dfb47dcb992201000582a280d8b2, there were some mistakes when writing out information about ".align" directives: - An align with fill does not write out its information correctly, the fill data overwrites the alignment data. - Each alignment directive is recorded at the location where the previous alignment directive should be recorded, the first alignment directive is discarded. In commit 137c83d69fad77677cc818593f9399caa777a0c5, the data produced by objdump is not correct: - It's miss-aligned due to a missing whitespace. - The fill data for align with fill records is not displayed correctly. All of the above issues are addressed in this commit, and the test is improved to cover these cases. binutils/ChangeLog: * od-elf32_avr.c (elf32_avr_dump_avr_prop): Fix printing of align specific data, fix formatting for align and org data. gas/ChangeLog: * config/tc-avr.c (avr_output_property_record): Fix overwrite bug for align and fill records. (avr_handle_align): Record fill information for align frags. (create_record_for_frag): Add next frag assertion, use correct address for align records. gas/testsuite/ChangeLog: * gas/avr/avr-prop-1.s: Use fill in some cases. * gas/avr/avr-prop-1.d: Update expected results.
2015-10-10Bug 19113 - read.c stringer assertionAlan Modra2-3/+9
Fails due to signed char promotion. PR gas/19113 * read.c (next_char_of_string): Mask char after escape. Use CHAR_MASK rather than 0xff.
2015-10-07Avoid using 'template' C++ keywordYao Qi2-8/+13
'template' is used in include/opcode/aarch64.h as below, typedef struct { const char *template; uint32_t value; int has_xt; } aarch64_sys_ins_reg; and it triggers compilation errors when GDB is built in C++ mode. In file included from git/gdb/aarch64-tdep.c:62:0: git/gdb/../include/opcode/aarch64.h:651:15: error: expected unqualified-id before 'template' const char *template; This patch is to rename field template to name. gas/ * config/tc-aarch64.c (md_begin): Access field 'name' rather than 'template'. include/opcode/ * aarch64.h (aarch64_sys_ins_reg) <template>: Removed. <name>: New field. opcodes/ * aarch64-dis.c (aarch64_ext_sysins_op): Access field 'name' rather than 'template'. * aarch64-opc.c (aarch64_print_operand): Likewise.
2015-10-07New ARC implementation.Nick Clifton86-4760/+5014
bfd * archures.c: Remove support for older ARC. Added support for new ARC cpus (ARC600, ARC601, ARC700, ARCV2). * bfd-in2.h: Likewise. * config.bfd: Likewise. * cpu-arc.c: Likewise. * elf32-arc.c: Totally changed file with a refactored inplementation of the ARC port. * libbfd.h: Added ARC specific relocation types. * reloc.c: Likewise. gas * config/tc-arc.c: Revamped file for ARC support. * config/tc-arc.h: Likewise. * doc/as.texinfo: Add new ARC options. * doc/c-arc.texi: Likewise. ld * configure.tgt: Added target arc-*-elf* and arc*-*-linux-uclibc*. * emulparams/arcebelf_prof.sh: New file * emulparams/arcebelf.sh: Likewise. * emulparams/arceblinux_prof.sh: Likewise. * emulparams/arceblinux.sh: Likewise. * emulparams/arcelf_prof.sh: Likewise. * emulparams/arcelf.sh: Likewise. * emulparams/arclinux_prof.sh: Likewise. * emulparams/arclinux.sh: Likewise. * emulparams/arcv2elfx.sh: Likewise. * emulparams/arcv2elf.sh: Likewise. * emultempl/arclinux.em: Likewise. * scripttempl/arclinux.sc: Likewise. * scripttempl/elfarc.sc: Likewise. * scripttempl/elfarcv2.sc: Likewise * Makefile.am: Add new ARC emulations. * Makefile.in: Regenerate. * NEWS: Mention the new feature. opcodes * arc-dis.c: Revamped file for ARC support * arc-dis.h: Likewise. * arc-ext.c: Likewise. * arc-ext.h: Likewise. * arc-opc.c: Likewise. * arc-fxi.h: New file. * arc-regs.h: Likewise. * arc-tbl.h: Likewise. binutils * readelf.c (get_machine_name): Remove A5 reference. Add ARCompact and ARCv2. (get_machine_flags): Handle EM_ARCV2 and EM_ARCOMPACT. (guess_is_rela): Likewise. (dump_relocations): Likewise. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (is_none_reloc): Likewise. * NEWS: Mention the new feature. include * dis-asm.h (arc_get_disassembler): Correct declaration. * arc-reloc.def: Macro file with definition of all relocation types. * arc.h: Changed macros for the newly supported ARC cpus. Altered enum defining the supported relocations. * common.h: Changed EM_ARC_A5 definition to EM_ARC_COMPACT. Added macro for EM_ARC_COMPACT2. * arc-func.h: New file. * arc.h: Likewise.
2015-10-02[GAS][AARCH64]Add TLSDESC large memory model support.Renlin Li9-0/+152
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * elfnn-aarch64.c (elfNN_aarch64_howto_table): Check overflow for BFD_RELOC_AARCH64_TLSDESC_OFF_G1. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (s_tlsdescadd): New. (s_tlsdescldr): New. (md_pseudo_table): Handle tlsdescadd and tlsdescldr pseudo ops. (reloc_table): Add entries for BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC and BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC. (process_movw_reloc_info): Support AARCH64_TLSDESC_OFF_G1 and AARCH64_TLSDESC_OFF_G0_NC. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsdesc_off_g0_nc.d: New. * gas/aarch64/reloc-tlsdesc_off_g0_nc.s: New. * gas/aarch64/reloc-tlsdesc_off_g1.d: New. * gas/aarch64/reloc-tlsdesc_off_g1.s: New. * gas/aarch64/tls-desc.d: New. * gas/aarch64/tls-desc.s: New.
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li7-1/+66
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c: Make AARCH64_TLSIE_MOVW_GOTTPREL_G1 and AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC defined in alphabetical order. * libbfd.h: Regenerate. * bfd-in2.h: Likewise. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Make TLSIE_MOVW_GOTTPREL_G1 check overflow. (aarch64_reloc_got_type): Add support for TLSIE_MOVW_GOTTPREL_G1 and TLSIE_MOVW_GOTTPREL_G0_NC. (elfNN_aarch64_final_link_relocate): Likewise. (elfNN_aarch64_relocate_section): Likewise. (elfNN_aarch64_gc_sweep_hook): Likewise. (elfNN_aarch64_check_relocs): Likewise. * elfxx-aarch64.c (_bfd_aarch64_elf_put_addend): Likewise. (_bfd_aarch64_elf_resolve_relocation): Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): Add two entries for gottprel_g0_nc and gottprel_g1. (process_movw_reloc_info): Add support. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gottprel_g0_nc.d: New. * gas/aarch64/reloc-gottprel_g0_nc.s: New. * gas/aarch64/reloc-gottprel_g1.d: New. * gas/aarch64/reloc-gottprel_g1.s: New. ld/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * ld-aarch64/tls-large-ie.d: New. * ld-aarch64/tls-large-ie.s: New. * ld-aarch64/aarch64-elf.exp: Run new test.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li5-0/+37
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC. * libbfd.h: Regenerate. * bfd-in2.h: Likewise gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g0_nc. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g0_nc.d: New. * gas/aarch64/reloc-tlsgd_g0_nc.s: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li5-0/+38
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_TLSGD_MOVW_G1): New entry. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSGD_MOVW_G1. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier tlsgd_g1. (process_movw_reloc_info): Support BFD_RELOC_AARCH64_TLSGD_MOVW_G1. (md_apply_fix): Likewise. (aarch64_force_relocation): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-tlsgd_g1.s: New. * gas/aarch64/reloc-tlsgd_g1.s: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li5-0/+37
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry MOVW_GOTOFF_G0_NC. * libbfd.h: Regnerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g0_nc. (process_movw_reloc_info): Support gotoff_g0_nc. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g0_nc.s: New. * gas/aarch64/reloc-gotoff_g0_nc.d: New.
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li5-0/+38
bfd/ 2015-10-02 Renlin Li <renlin.li@arm.com> * reloc.c (BFD_RELOC_AARCH64_MOVW_GOTOFF_G1): New. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for MOVW_GOTOFF_G1. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ 2015-10-02 Renlin Li <renlin.li@arm.com> * config/tc-aarch64.c (reloc_table): New relocation modifier gotoff_g1. (process_movw_reloc_info): Support newly added modifier. (md_apply_fix): Likewise. gas/testsuite/ 2015-10-02 Renlin Li <renlin.li@arm.com> * gas/aarch64/reloc-gotoff_g1.s: New. * gas/aarch64/reloc-gotoff_g1.d: New.
2015-09-30Revise new e500 invalid opcode testAlan Modra4-9/+14
.machine isn't available on all powerpc targets. * gas/ppc/ppc.exp (e500-ill): Pass -me500. * gas/ppc/e500-ill.s: Remove .machine. * gas/ppc/e500-ill.l: Remove line numbers.
2015-09-29Add support for extensions in the .machine pseudoop on S/390, e.g. ".machine ↵Dominik Vogt17-54/+267
zEC12+nohtm+vx" gas * doc/c-s390.texi: Add documentation. Add missing code markup. * config/tc-s390.c (current_flags): New static variable. (s390_parse_cpu): Parse cpu flags a la "+nohtm" etc. (s390_setup_opcodes): Use cpu flags to determine the set of opcodes. Fix indentation. (md_parse_option): Call s390_parse_cpu with the new signature. (s390_machine): Likewise. Keep track of current_flags. Simplify code a bit. undefine MAX_HISTORY at end of function. (s390_machinemode): undefine MAX_HISTORY at end of function. Update an error message. tests * gas/s390/s390.exp: Add new tests. * gas/s390/machine-parsing-1.s: New test file. * gas/s390/machine-parsing-1.l: Likewise. * gas/s390/machine-parsing-2.s: Likewise. * gas/s390/machine-parsing-2.l: Likewise. * gas/s390/machine-parsing-3.s: Likewise. * gas/s390/machine-parsing-3.l: Likewise. * gas/s390/machine-parsing-4.s: Likewise. * gas/s390/machine-parsing-4.l: Likewise. * gas/s390/machine-parsing-5.s: Likewise. * gas/s390/machine-parsing-5.l: Likewise. * gas/s390/machine-parsing-6.s: Likewise. * gas/s390/machine-parsing-6.l: Likewise. opcode * s390.h (S390_INSTR_FLAG_HTM): New flag. (S390_INSTR_FLAG_VX): New flag. (S390_INSTR_FLAG_FACILITY_MASK): New flag mask. opcodes * s390-mkopc.c (main): Parse htm and vx flag. * s390-opc.txt: Mark instructions from the hardware transactional memory and vector facilities with the "htm"/"vx" flag.
2015-09-28Patches for illegal ppc 500 instructionsTom Rix4-0/+26
This change marks a few opcodes as invalid for ppc e500 as well as adds a test to verify the change.
2015-09-25Correct the generation of OR1K pc-relative relocations.Peter Zotov3-18/+55
gas PR ld/18759 * config/tc-or1k.c (tc_gen_reloc): Correct computation of PC relative relocs. * config/tc-or1k.h (GAS_CGEN_PRCEL_R_TYPE): Delete. bfd * elf32-or1k.c (R_OR1K_32_PCREL): Set pcrel_offset to TRUE. (R_OR1K_16_PCREL): Likewise. (R_OR1K_8_PCREL): Likewise. ld/tests * ld-elf/eh-frame-hdr: Expect to pass on the or1k-linux target.
2015-09-25POSIX shell compatibility of gas/configure.acRyo ONODERA3-10/+16
* configure.ac (nds32): Don't use bash == in tests. * configure: Regenerate.
2015-09-23Fix compile time warnings generated when compiling with clang.Nick Clifton2-1/+5
bfd * bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in order to avoid problems with left shifting negative values. (abs32code): Likewise. * mach-o.c (FILE_ALIGN): Likewise. * coff-rs6000.c (xcoff_debug_sections): Delete unused static array. * elf32-visium.c (visium_reloc_map): Likewise. * elf32-arm.c (elf32_arm_final_link_relocate): Remove useless calls to abs function. * elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise. * elf32-score.c (score_elf_final_link_relocate): Likewise. * elf32-score7.c (score_elf_final_link_relocate): Likewise. * elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead of shifting to create a negative mask. * elf32-msp430.c (elf_backend_special_sections): Define. * elfxx-mips.c (got_ofst_reloc_p): Delete unused function. (got_hi16_reloc_p): Delete unused function. * ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of partition name. gas * config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int. opcode * ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left shifting. ld * emultempl/elf32.em (ehdr_start_empty): New static variable. (before_allocation): Use it to initialise ehdr_start_save. * emultempl/pe.em (write_build_id): Remove useless double parenthesis. * emultempl/pep.em (write_build_id): Likewise. opcodes * bfin-dis.c (fmtconst): Remove unnecessary call to the abs function. * tic30-dis.c (print_branch): Likewise. * cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed value before left shifting. * fr30-ibld.c (fr30_cgen_extract_operand): Likewise. * hppa-dis.c (print_insn_hppa): Likewise. * mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static array. * msp430-dis.c (msp430_singleoperand): Likewise. (msp430_doubleoperand): Likewise. (print_insn_msp430): Likewise. * nds32-asm.c (parse_operand): Likewise. * sh-opc.h (MASK): Likewise. * v850-dis.c (get_operand_value): Likewise.
2015-09-22Change 7-byte NOP instruction for RX target, so that it only takes 1 cycle ↵Nick Clifton2-2/+6
to excute. * config/tc-rx.c (nop_7): Recode using MAX.
2015-09-10S/390: Fix instruction format of crj*, clrj*, and clgrj*.Andreas Krebbel1-39/+39
This fixes the instruction format for 3 of the compare and branch extended mnemonics. That way the extended mnemonics are actually being found by objdump. gas/testsuite/ChangeLog: 2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/s390/zarch-z10.d: Fix testcase for some of the compare and branch extended mnemonics. opcodes/ChangeLog: 2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.txt: Fix instruction format of crj*, clrj*, and clgrj*.
2015-09-10S/390: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.Andreas Krebbel1-52/+52
This makes objdump to be able to recognize some of the extended mnemonics more often. It does not lead to wrong being generated. opcodes/ChangeLog: 2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.c: Fix MASK_RIE_R0PI and MASK_RIE_R0PU. gas/testsuite/ChangeLog: 2015-09-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/s390/zarch-z10.d: Fix testcase for compare and branch extended mnemonics.
2015-09-09S/390: Fix opcode of ppno.Andreas Krebbel1-1/+1
opcodes/ChangeLog: 2015-09-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.txt: Fix opcode of ppno instruction. gas/testsuite/ChangeLog: 2015-09-09 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gas/s390/zarch-z13.d: Fix opcode of ppno instruction.
2015-09-08config/tc-avr.c (md_section_align): Append UL for -1 to avoid the latest ↵Chen Gang2-1/+6
gcc's warning The related warning is: gcc -DHAVE_CONFIG_H -I. -I../../binutils-gdb/gas -I. -I../../binutils-gdb/gas -I../bfd -I../../binutils-gdb/gas/config -I../../binutils-gdb/gas/../include -I../../binutils-gdb/gas/.. -I../../binutils-gdb/gas/../bfd -DLOCALEDIR="\"/upstream/release-avr32/share/locale\"" -W -Wall -Wstrict-prototypes -Wmissing-prototypes -Wshadow -Werror -I../../binutils-gdb/gas/../zlib -g -O2 -MT tc-avr.o -MD -MP -MF .deps/tc-avr.Tpo -c -o tc-avr.o `test -f 'config/tc-avr.c' || echo '../../binutils-gdb/gas/'`config/tc-avr.c ../../binutils-gdb/gas/config/tc-avr.c: In function ‘md_section_align’: ../../binutils-gdb/gas/config/tc-avr.c:1233:43: error: left shift of negative value [-Werror=shift-negative-value] return ((addr + (1 << align) - 1) & (-1 << align)); ^ 2015-09-05 Chen Gang <gang.chen.5i5j@gmail.com> * config/tc-avr.c (md_section_align): Append UL for -1 to avoid the latest gcc's warning.
2015-08-27More fallout from "Allow symbol and label names to be enclosed in double quotes"Alan Modra18-92/+134
Some of the TC_START_LABEL implementations need to adjust the end of the symbol, when a colon doesn't mean a label definition. That means they need access to nul_char both the restore the NUL location (it may be a quote rather than a colon) and to store the new nul_char. Others need adjusting to step over a potential trailing quote. PR gas/18581 * config/tc-aarch64.h (TC_START_LABEL): Redefine. * config/tc-arm.c (tc_start_label_without_colon): Delete params. Use input_line_pointer directly. * config/tc-arm.h (TC_START_LABEL): Redefine. (TC_START_LABEL_WITHOUT_COLON): Redefine. (tc_start_label_without_colon): Update prototype. * config/tc-bfin.c (bfin_start_label): Delete ptr param. Check for NUL instead. * config/tc-bfin.h (bfin_start_label): Update prototype. (TC_START_LABEL): Redefine. * config/tc-d30v.h (TC_START_LABEL): Redefine. * config/tc-fr30.c (restore_colon): Rewrite. (fr30_is_colon_insn): Add nul_char param. Return int. Bump i_l_p over quote. Update restore_colon calls. * config/tc-fr30.h (TC_START_LABEL): Redefine. (fr30_is_colon_insn): Update prototype. * config/tc-m32c.c (restore_colon, m32c_is_colon_insn): As above. * config/tc-m32c.h (TC_START_LABEL): Redefine. (m32c_is_colon_insn): Update prototype. * config/tc-m32r.h (TC_START_LABEL): Redefine. * config/tc-mep.h (TC_START_LABEL): Redefine. * config/tc-nds32.h (TC_START_LABEL): Redefine. * config/tc-tic54x.c (tic54x_start_label): Replace params with nul_char and next_char. Step over trailing quote. * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Redefine. (tic54x_start_label): Update prototype. * read.c (TC_START_LABEL): Redefine. Update invocation. (TC_START_LABEL_WITHOUT_COLON): Update invocation. * config/tc-nios2.c (s_nios2_set): Save initial input_line_pointer and restore if calling s_set. Don't restore delim again.
2015-08-26Fallout from "Allow symbol and label names to be enclosed in double quotes"Alan Modra4-4/+13
PR gas/18581 * config/tc-mn10200.c (md_assemble <mdr>): Move restore_line_pointer call to where input line used to be restored. * config/tc-mn10300.c (md_assemble <usp>): Remove redundant input line restore. * config/tc-tilepro.c (parse_reg_expression): Add regname var.
2015-08-26Add asprintf to the list of functions whose decls are checked at configure time.Nick Clifton4-1/+22
PR gas/18842 * configure.ac (AS_CHECK_DECLS): Add asprintf. * configure: Regenerate. * config.in: Regenerate.
2015-08-25Update MIPS tests for test failures on some configurations.Simon Dardis4-14/+20
* gas/mips/micromips32-move.d: Update expected disassembly. * gas/mips/move.d: Likewise. * gas/mips/move.s: Fix for some MIPS configurations.
2015-08-25Support for the sparc %pmcdper privileged register.Jose E. Marchesi7-0/+19
opcodes/ChangeLog: 2015-08-25 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-dis.c (print_insn_sparc): Handle the privileged register %pmcdper. gas/ChangeLog: 2015-08-25 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-sparc.c (priv_reg_table): New privileged register %pmcdper. gas/testsuite/ChangeLog: 2015-08-25 Jose E. Marchesi <jose.marchesi@oracle.com> * gas/sparc/wrpr.s: Test writing to the privileged %pmcdper register. * gas/sparc/wrpr.d: ...and the expected result. * gas/sparc/rdpr.s: Test reading from the privileged %pmcdper register. * gas/sparc/rdpr.d: ...and the expected result.
2015-08-24Fix the partial disassembly of a broken three byte instruction at the end of ↵Jan Stancek3-0/+21
a function. opcodes * i386-dis.c (print_insn): Fix decoding of three byte operands. tests * gas/i386/intel.s: Add test of disassembly of a potential three byte instuction at the end of a function. * gas/i386/intel.d: Update expected disassembly.
2015-08-21Allow symbol and label names to be enclosed in double quotes.Nick Clifton59-911/+900
gas PR gas/18581 * expr.c (get_symbol_end): Rename to get_symbol_name. Add a return parameter pointing to the start of the symbol. Allow symbol names enclosed in double quotes. (restore_line_pointer): New function. Replace the NUL character inserted into the input stream with the given character. If the character was a double quote, advance the input pointer. * expr.h (get_symbol_end): Delete. (get_symbol_name): Add prototype. (restore_line_pointer): Prototype. * read.h (SKIP_WHITESPACE_AFTER_NAME): New macro. * doc/as.texinfo (Symbol Intro): Document that symbol names can now be enclosed in double quotes. * cond.c (s_ifdef): Replace get_symbol_end with get_symbol_name. Use restore_line_pointer to replace the NUL in the input stream. Use SKIP_WHITESPACE_AFTER_NAME to skip past the end of a symbol. Check for the use of double quoted symbol names. * expr.c: Likewise. * config/obj-aout.c: Likewise. * config/obj-coff-seh.c: Likewise. * config/obj-coff.c: Likewise. * config/obj-elf.c: Likewise. * config/obj-evax.c: Likewise. * config/obj-macho.c: Likewise. * config/obj-som.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-iq2000.c: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nios2.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-s390.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-tic6x.c: Likewise. * config/tc-tilegx.c: Likewise. * config/tc-tilepro.c: Likewise. * config/tc-v850.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbgc.: Likewise. * ecoff.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. tests PR gas/18581 * gas/all/byte.d: Disable this test. Quoted expressions are now allowed in .byte directives. * gas/all/quoted-sym-names.s: New test. * gas/all/quoted-sym-names.d: Expected output. * gas/all/gas.exp: Run the new test.
2015-08-21PR binutils/18257: Properly decode x86/Intel mask instructions.Alexander Fomin5-2/+1002
opcodes/ PR binutils/18257 * i386-dis.c: Use MOD_TABLE for most of mask instructions. (MOD enum): Add MOD_VEX_W_0_0F41_P_0_LEN_1, MOD_VEX_W_1_0F41_P_0_LEN_1, MOD_VEX_W_0_0F41_P_2_LEN_1, MOD_VEX_W_1_0F41_P_2_LEN_1, MOD_VEX_W_0_0F42_P_0_LEN_1, MOD_VEX_W_1_0F42_P_0_LEN_1, MOD_VEX_W_0_0F42_P_2_LEN_1, MOD_VEX_W_1_0F42_P_2_LEN_1, MOD_VEX_W_0_0F44_P_0_LEN_1, MOD_VEX_W_1_0F44_P_0_LEN_1, MOD_VEX_W_0_0F44_P_2_LEN_1, MOD_VEX_W_1_0F44_P_2_LEN_1, MOD_VEX_W_0_0F45_P_0_LEN_1, MOD_VEX_W_1_0F45_P_0_LEN_1, MOD_VEX_W_0_0F45_P_2_LEN_1, MOD_VEX_W_1_0F45_P_2_LEN_1, MOD_VEX_W_0_0F46_P_0_LEN_1, MOD_VEX_W_1_0F46_P_0_LEN_1, MOD_VEX_W_0_0F46_P_2_LEN_1, MOD_VEX_W_1_0F46_P_2_LEN_1, MOD_VEX_W_0_0F47_P_0_LEN_1, MOD_VEX_W_1_0F47_P_0_LEN_1, MOD_VEX_W_0_0F47_P_2_LEN_1, MOD_VEX_W_1_0F47_P_2_LEN_1, MOD_VEX_W_0_0F4A_P_0_LEN_1, MOD_VEX_W_1_0F4A_P_0_LEN_1, MOD_VEX_W_0_0F4A_P_2_LEN_1, MOD_VEX_W_1_0F4A_P_2_LEN_1, MOD_VEX_W_0_0F4B_P_0_LEN_1, MOD_VEX_W_1_0F4B_P_0_LEN_1, MOD_VEX_W_0_0F4B_P_2_LEN_1, MOD_VEX_W_0_0F91_P_0_LEN_0, MOD_VEX_W_1_0F91_P_0_LEN_0, MOD_VEX_W_0_0F91_P_2_LEN_0, MOD_VEX_W_1_0F91_P_2_LEN_0, MOD_VEX_W_0_0F92_P_0_LEN_0, MOD_VEX_W_0_0F92_P_2_LEN_0, MOD_VEX_W_0_0F92_P_3_LEN_0, MOD_VEX_W_1_0F92_P_3_LEN_0, MOD_VEX_W_0_0F93_P_0_LEN_0, MOD_VEX_W_0_0F93_P_2_LEN_0, MOD_VEX_W_0_0F93_P_3_LEN_0, MOD_VEX_W_1_0F93_P_3_LEN_0, MOD_VEX_W_0_0F98_P_0_LEN_0, MOD_VEX_W_1_0F98_P_0_LEN_0, MOD_VEX_W_0_0F98_P_2_LEN_0, MOD_VEX_W_1_0F98_P_2_LEN_0, MOD_VEX_W_0_0F99_P_0_LEN_0, MOD_VEX_W_1_0F99_P_0_LEN_0, MOD_VEX_W_0_0F99_P_2_LEN_0, MOD_VEX_W_1_0F99_P_2_LEN_0, MOD_VEX_W_0_0F3A30_P_2_LEN_0, MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0, MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0, MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0, MOD_VEX_W_1_0F3A33_P_2_LEN_0. (vex_w_table): Replace terminals with MOD_TABLE entries for most of mask instructions. gas/testsuite PR binutils/18257 * gas/i386/disassem.s: Add mask instructions with invalid ModR/M byte. * gas/i386/x86-64-disassem.s: Likewise. * gas/i386/disassem.d: Updated. * gas/i386/x86-64-disassem.d: Likewise.
2015-08-19[AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang19-10/+222
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c: New entries, including BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC. BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation types support for dtprel_lo12. (ldst_lo12_determine_real_reloc_type): Support BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC. (parse_operands): Likewise. (md_apply_fix): Likewise (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12-ldst8.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ldstc.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.s: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst8.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ldst8.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst16.d: Likewise. * gas/aarch64/reloc-dtprel_lo12-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst32.d: Likewise. * gas/aarch64/reloc-dtprel-lo12-ldst64.d: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc-ldst64.d: Likewise.
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang23-0/+247
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries. * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers, "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1", "dtprel_g1_nc", "dtprel_g2". (md_apply_fix): Support new relocation types. (aarch64_force_relocation): Likewise. (process_movw_reloc_info): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_g0.s: New testcase. * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1.s: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise. * gas/aarch64/reloc-dtprel_g2.s: Likewise. * gas/aarch64/reloc-dtprel_hi12.s: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_g0.d: New expectation file. * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1.d: Likewise. * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise. * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise. * gas/aarch64/reloc-dtprel_g2.d: Likewise. * gas/aarch64/reloc-dtprel_hi12.d: Likewise. * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang7-0/+53
2015-08-19 Jiong Wang <jiong.wang@arm.com> bfd/ * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC): New entry. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. gas/ * config/tc-aarch64.c (reloc_table): New relocation modifiers. (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC. (aarch64_force_relocation): Likewise. gas/testsuite/ * gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise. * gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file. * gas/aarch64/reloc-dtprel_lo12_nc-ilp32.d: Likewise.
2015-08-17Rationalize ARM .alignAlan Modra4-48/+14
* gas/config/tc-arm.c (s_align): Delete. (md_pseudo_table): Use s_align_ptwo for "align". * gas/config/tc-arm.h (TC_ALIGN_ZERO_IS_DEFAULT): Define. * read.c (s_align): Modify for TC_ALIGN_ZERO_IS_DEFAULT.
2015-08-13Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira4-16/+39
opcodes * arm-dis.c (print_insn_arm): Disassembling for all targets V6 and higher with ARM instruction set will now mark the 26-bit versions of teq,tst,cmn and cmp as UNPREDICTABLE. (arm_opcodes): Fix for unpredictable nop being recognized as a teq. test * gas/arm/nops.d: New. * gas/arm/nops.s: New. * gas/arm/inst.d: Changed expectation file for 26-bit teq, tst, cmn and cmp.
2015-08-13gas 0f handlingAlan Modra2-38/+30
_start: .byte 0f-_start 0: Fixes ..:2: Error: floating point number invalid ..:2: Error: junk at end of line, first unrecognized character is `_' * expr.c (operand): Rewrite handling of operands starting with "0f". If atof_generic only parses "-" or "+", treat as expression.
2015-08-13gas 0b vs 0b0 vs 00bAlan Modra2-21/+32
* expr.c (integer_constant): Return O_absent expression if eol. (operand): For targets with both LOCAL_LABELS_FB and NUMBERS_WITH_SUFFIX set, treat "0b" not followed by binary digits as a local label reference. Correct handling of 0b prefix. If a suffix is not allowed, error on 0B.
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