Age | Commit message (Collapse) | Author | Files | Lines |
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obj_fix_adjustable() and tc_fix_adjustable() to tell whether to
add a symbol's address. Removed all target-specific #ifdefs that
used to accomplished the same.
* config/tc-v850.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-m68k.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-arm.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i960.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
* config/tc-i386.h (TC_DONT_FIX_NON_ADJUSTABLE): Define.
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* dwarf2dbg.c: Fix formatting.
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gas/
* config/tc-ia64.c (specify_resource, case IA64_RS_GR): Handle
postincrement modified registers. Handle IA64_OPND_R3_2 addl
source registers.
(note_register_values): Handle IA64_OPND_R3_2 operands.
gas/testsuite/
* gas/ia64/dv-raw-err.s: Add new tests for addl and postinc.
* gas/ia64/dv-raw-err.l: Likewise.
* gas/ia64/dv-waw-err.l: Update sed pattern.
* gas/ia64/opc-f.pl: Delete fpsub, and fpadd comment.
* gas/ia64/opc-f.s, gas/ia64/opc-f.d: Regenerate.
include/opcode/
* ia64.h (IA64_OPCODE_POSTINC): New.
opcodes/
* ia64-ic.tbl (pr-readers-nobr-nomovpr): Add addl, adds. Delete
break, mov-immediate, nop.
* ia64-opc-f.c: Delete fpsub instructions.
* ia64-opc-m.c: Add POSTINC to all instructions with postincrement
address operand. Rewrite using macros to avoid long lines.
* ia64-opc.h (POSTINC): Define.
* ia64-asmtab.c: Regenerate.
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* config/tc-i860.c (md_operand): Silly typo fixed.
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Add extra tests for these addressing modes
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(md_parse_option): Set -32/-64 for -xarch=, allow all -A archs
in -xarch= as well.
(md_show_usage): Update usage text.
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* config/tc-sh.c (md_assemble): Changed so debug_type
test performed for ppi_assemble
* config/tc-sh.c: Included dwarf2dbg.h.
(debug_line): Defined.
(md_assemble): Generates dwarf2 line info.
(sh_finalize): New function. Finalize dwarf2 info.
(assemble_ppi): Returns size of code generated.
(build_Mytes): Returns size of code generated.
(md_pseudo_table): Added "file" and "loc" psuedo ops.
* config/tc-sh.h (md_end): Defined.
(sh_finalize): Declared.
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md_number_to_chars.
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has the IgnoreSize bit set.
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bfd/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle
EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP.
(elf64_ia64_print_private_bfd_data): Likewise. Also handle
EF_IA_64_ABSOLUTE.
gas/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic.
(md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC.
(md_begin): Change assignment to md.flag to OR in the new bit.
include/elf/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP,
EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
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C_MOU, and C_EOS.
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* NEWS: Mention i860 support.
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* doc/c-i860.texi (Opcodes for i860): Remove braces from @item
argument.
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* config/obj-bout.c: Fix formatting.
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* expr.c: Fix formatting.
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* doc/c-i860.texi: Flesh out the i860 section more.
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* expr.c: Fix formatting.
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* symbols.c: Fix formatting.
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2000-08-08 Jason Eckhardt <jle@cygnus.com>
* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
(i860_fix_info): New enum.
(MD_APPLY_FIX3): Define.
(WORKING_DOT_WORD): Define.
(TC_HANDLES_FX_DONE): Define.
(DIFF_EXPR_OK): Define.
(LISTING_HEADER): Define.
(TARGET_FORMAT): Select target format based on endian flag.
(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
(target_big_endian): Add external declaration.
* config/tc-i860.c: All existing code reworked completely. Other
new code shown below.
(SYNTAX_SVR4): Define.
(target_warn_expand): New variable.
(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
(md_longopts): Declare and define with new options (-EL, -EB,
and -mwarn-expand).
(md_show_usage): New function.
(md_operand): New function.
(obtain_reloc_for_imm16): New function.
(md_apply_fix3): New function.
(tc_gen_reloc): New function.
include:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* opcode/i860.h: Small formatting adjustments.
opcode:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* i860-dis.c (print_br_address): Change third argument from int
to long.
bfd:
2000-08-08 Jason Eckhardt <jle@cygnus.com>
* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
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* gasp.c: Fix formatting.
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* hash.c: Fix formatting.
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Accept 68hc12 register indirect modes.
Mention 68HC11 & 68HC12 support in NEWS.
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(dot_vframe): Elide psp_gr record if it overlaps prologue_gr.
(dot_save): Likewise for pfs_gr, rp_gr, and preds_gr.
(dot_body): Clear unwind.prologue_mask.
(dot_prologue): Set it. Accept a register second argument.
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* config/atof-ieee.c: Fix formatting.
* config/atof-tahoe.c: Likewise.
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Don't declare md_pcrel_from_section (already in tc-avr.h).
(avr_operands): Use AVR_UNDEF_P and AVR_SKIP_P macros.
(avr_operand): Don't set (unsigned) op_mask to -1.
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versions of texinfo, including the one on sourceware.cygnus.com.
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.subsection, .version, .vtable_entry, .vtable_inherit and .weak.
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* config/tc-cris.c: Fix formatting.
* config/tc-i386.c: Likewise.
* config/tc-sparc.c (sparc_ip): Simplify the code.
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* config/tc-cris.c: Rearrange code for readability.
* config/tc-d10v.c: Fix formatting.
* config/tc-m32r.c: Likewise.
* config/tc-sparc.c: Likewise.
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gas/
* config/tc-ia64.c (emit_one_bundle): Call ia64_free_opcode
before ia64_find_opcode.
(md_assemble): Likewise.
opcodes/
* ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
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* config/obj-som.c: Fix formatting.
* config/obj-ieee.c: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-v850.c: Likewise.
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* doc/c-i860.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-i860.texi.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add I860 as relevant architecture.
* doc/as.texinfo: Include i860 dependent file c-i860.texi.
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* configure.in: Add bits for i860-stardent-{sysv4, elf}*.
* configure: Regenerated.
* config/obj-elf.c (obj_elf_type): Recognize a fifth type
of operand to the .type directive (.e.g, "type").
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* configure.in: Add bits for i860-stardent-{sysv4, elf}*.
* configure: Regenerated.
* config/obj-elf.c (obj_elf_type): Recognize a fifth type
of operand to the .type directive (.e.g, "type").
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