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2016-07-13MIPS/GAS: Remove extraneous `install_insn' call from `append_insn' (CL)Maciej W. Rozycki1-0/+5
Add missing ChangeLog entry for commit b8bca85b334b ("MIPS/GAS: Remove extraneous `install_insn' call from `append_insn'").
2016-07-13opcodes,gas: support for the ldtxa SPARC instructions.Jose E. Marchesi4-0/+66
This patch adds support for the LDTXA instructions, along with the corresponding ASIs. Tests for GAS are included. opcodes/ChangeLog: 2016-07-12 Jose E. Marchesi <jose.marchesi@oracle.com> * sparc-opc.c (ldtxa): New macro. (sparc_opcodes): Use the macro defined above to add entries for the LDTXA instructions. (asi_table): Add the ASI_TWINX_* asis used in the LDTXA instruction. gas/ChangeLog: 2016-07-12 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/sparc/ldtxa.s: New file. * testsuite/gas/sparc/ldtxa.d: Likewise. * testsuite/gas/sparc/sparc.exp: Execute the ldtxa test.
2016-07-11TLS: DTPOFF can accept offsets, stored into addendum. Remove the need of baseClaudiu Zissulescu2-23/+8
gas/ChangeLog: 2016-07-05 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff. (tc_gen_reloc): Remove passing DTPOFF base info into reloc addendum as it is no longer needed. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
2016-07-08MIPS/GAS: Remove extraneous `install_insn' call from `append_insn'Maciej W. Rozycki1-1/+0
Complement: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), and remove a call to `install_insn' from `append_insn', which as from that change has become redundant. This is because such a call, to place an instruction's bit pattern in output, is already made from `move_insn', called from `add_relaxed_insn' or `add_fixed_insn' as appropriate, either of which now always is and has to be made from `append_insn' before the repeated call to `install_insn' is made. Previously the place where this second invocation is made was the only one where the output stream was updated, although the update was made inline rather than with a function call. Remove the repeated call then, to reclaim some performance. gas/ * config/tc-mips.c (append_insn): Remove extraneous `install_insn' call.
2016-07-05x86: fix register check in check_qword_reg()Jan Beulich4-1/+19
A missing 'r' (or wrong 'e') register prefix needs to be complained about if the template allows for a 64-bit register, not a 32-bit one. I assume this was a copy-and-paste type of mistake (from check_long_reg()).
2016-07-02MIPS/GAS/testsuite: Remove remnants of a.out/ECOFF supportMaciej W. Rozycki27-1822/+1066
Complement: commit 16e5e222b6eae6f110ea72bf627585c095a453a8 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Sat Jun 22 16:57:42 2013 +0000 <https://sourceware.org/ml/binutils/2013-06/msg00195.html>, ("Make gas/mips/mips.exp ELF-only"), and remove the remaining stale ECOFF test dumps and pieces of a.out/ECOFF support in relocation match patterns. gas/ * testsuite/gas/mips/ecoff@ld.d: Remove test. * testsuite/gas/mips/ecoff@ld-forward.d: Remove test. * testsuite/gas/mips/ecoff@ld-zero-3.d: Remove test. * testsuite/gas/mips/ecoff@sd.d: Remove test. * testsuite/gas/mips/ecoff@sd-forward.d: Remove test. * testsuite/gas/mips/beq.d: Remove a.out and ECOFF support from reloc patterns. * testsuite/gas/mips/mipsr6@beq.d: Likewise. * testsuite/gas/mips/bge.d: Likewise. * testsuite/gas/mips/mipsr6@bge.d: Likewise. * testsuite/gas/mips/bgeu.d: Likewise. * testsuite/gas/mips/mipsr6@bgeu.d: Likewise. * testsuite/gas/mips/blt.d: Likewise. * testsuite/gas/mips/mipsr6@blt.d: Likewise. * testsuite/gas/mips/bltu.d: Likewise. * testsuite/gas/mips/mipsr6@bltu.d: Likewise. * testsuite/gas/mips/branch-likely.d: Likewise. * testsuite/gas/mips/la.d: Likewise. * testsuite/gas/mips/lb.d: Likewise. * testsuite/gas/mips/lifloat.d: Likewise. * testsuite/gas/mips/sb.d: Likewise. * testsuite/gas/mips/uld.d: Likewise. * testsuite/gas/mips/ulh.d: Likewise. * testsuite/gas/mips/ulw.d: Likewise. * testsuite/gas/mips/usd.d: Likewise. * testsuite/gas/mips/ush.d: Likewise. * testsuite/gas/mips/usw.d: Likewise.
2016-07-02MIPS/GAS/testsuite: Split `branch-misc-2' tests into twoMaciej W. Rozycki24-148/+313
Move `branch-misc-2' tests for non locally-defined-global symbols into separate files. These tests have been introduced with: commit 6f171daac941741e5fa904f6e462adb75a595495 Author: Alexandre Oliva <aoliva@redhat.com> Date: Thu Dec 12 04:40:22 2002 +0000 <https://sourceware.org/ml/binutils/2002-11/msg00631.html>, ("mips: branches to external labels are broken"), and: commit d17b874b6c14caa2f2ed1b5544a48de9f39a1a65 Author: Alexandre Oliva <aoliva@redhat.com> Date: Wed Mar 12 23:07:22 2003 +0000 <https://sourceware.org/ml/binutils/2003-03/msg00136.html>, ("On resolving the MIPS gas branch reloc issue"), while the test case served a different purpose. With the original intent of the test case brought back with: commit bad36eacdad37042c4efb1c5fbf48476b47de82b Author: Daniel Jacobowitz <drow@false.org> Date: Wed Nov 23 14:04:18 2005 +0000 <https://sourceware.org/ml/binutils/2005-11/msg00324.html>, ("R_MIPS_PC16, again"), these stand in the way for linker testing. gas/ * testsuite/gas/mips/branch-misc-2.s: Move non locally-defined-global symbol tests... * testsuite/gas/mips/branch-misc-5.s: ... to this new test. * testsuite/gas/mips/branch-misc-2.d: Update accordingly. * testsuite/gas/mips/branch-misc-2-64.d: Likewise. * testsuite/gas/mips/branch-misc-2pic.d: Likewise. * testsuite/gas/mips/branch-misc-2pic-64.d: Likewise. * testsuite/gas/mips/mipsr6@branch-misc-2-64.d: Likewise. * testsuite/gas/mips/mipsr6@branch-misc-2pic-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-2.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-2-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-2pic.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-2pic-64.d: Likewise. * testsuite/gas/mips/branch-misc-5.d: New test. * testsuite/gas/mips/branch-misc-5pic.d: New test. * testsuite/gas/mips/branch-misc-5-64.d: New test. * testsuite/gas/mips/branch-misc-5pic-64.d: New test. * testsuite/gas/mips/mipsr6@branch-misc-5-64.d: New test. * testsuite/gas/mips/mipsr6@branch-misc-5pic-64.d: New test. * testsuite/gas/mips/micromips@branch-misc-5.d: New test. * testsuite/gas/mips/micromips@branch-misc-5pic.d: New test. * testsuite/gas/mips/micromips@branch-misc-5-64.d: New test. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-07-02MIPS/GAS/testsuite: Reenable disabled external BEQ testsMaciej W. Rozycki5-8/+27
Complement: commit bad36eacdad37042c4efb1c5fbf48476b47de82b Author: Daniel Jacobowitz <drow@false.org> Date: Wed Nov 23 14:04:18 2005 +0000 <https://sourceware.org/ml/binutils/2005-11/msg00324.html>, ("R_MIPS_PC16, again"), and reenable external BEQ tests, the remaining subset missed from the set of branch tests previously disabled with: commit 6f171daac941741e5fa904f6e462adb75a595495 Author: Alexandre Oliva <aoliva@redhat.com> Date: Thu Dec 12 04:40:22 2002 +0000 <https://sourceware.org/ml/binutils/2002-11/msg00631.html>, ("mips: branches to external labels are broken"). gas/ * testsuite/gas/mips/beq.s: Uncomment branches to undefined symbols. * testsuite/gas/mips/beq.d: Update accordingly. * testsuite/gas/mips/mipsr6@beq.d: Likewise. * testsuite/gas/mips/micromips@beq.d: Likewise.
2016-07-02MIPS/GAS/testsuite: Restrict 64-bit `branch-mips' tests to NewABI targetsMaciej W. Rozycki2-3/+13
... removing numerous `mips-sgi-irix5' failures. gas/ * testsuite/gas/mips/mips.exp: Restrict 64-bit `branch-mips' tests to NewABI targets.
2016-07-02MIPS/GAS/testsuite: Group `branch-misc' tests togetherMaciej W. Rozycki2-3/+7
gas/ * testsuite/gas/mips/mips.exp: Group `branch-misc' tests together.
2016-07-01[AArch64] Fix +nofp16 handlingSzabolcs Nagy5-17/+91
Feature flag handling was not perfect, +nofp16 disabled fp instructions too. New feature flag macros were added to check features with multiple bits set (matters for FP_F16 and SIMD_F16 opcode feature tests). The unused AARCH64_OPCODE_HAS_FEATURE was removed, all checks should use one of the AARCH64_CPU_HAS_* macros. AARCH64_CPU_HAS_FEATURE now checks all feature bits. The aarch64_features table now contains the dependencies as a separate field (so when the feature is enabled all dependencies are enabled and when it is disabled everything that depends on it is disabled). Note that armv8-a+foo+nofoo is not equivalent to armv8-a if +foo turns on dependent features that nofoo does not turn off. gas/ * config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add require field. (aarch64_features): Initialize require fields. (aarch64_parse_features): Handle dependencies. (aarch64_feature_enable_set, aarch64_feature_disable_set): New. (md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES. * testsuite/gas/aarch64/illegal-nofp16.s: New. * testsuite/gas/aarch64/illegal-nofp16.l: New. * testsuite/gas/aarch64/illegal-nofp16.d: New. include/ * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New. (AARCH64_CPU_HAS_ANY_FEATURES): New. (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES. (AARCH64_OPCODE_HAS_FEATURE): Remove.
2016-07-01Fix potential buffer overflows with sprintf and very large integer values.Nick Clifton2-1/+6
binutuils* prdbg.c (pr_enum_type): Use a buffer big enough to hold an extremely large decimal value. (pr_range_type): Likewise. (pr_array_type): Likewise. (pr_struct_field): Likewise. (pr_class_baseclass): Likewise. (pr_class_method_variant): Likewise. (pr_tag_type): Likewise. (pr_int_constant): Likewise. (pr_typed_constant): Likewise. (pr_variable): Likewise. (pr_function_parameter): Likewise. (pr_start_block): Likewise. (pr_lineno): Likewise. (pr_end_block): Likewise. (tg_enum_type): Likewise. (tg_int_constant): Likewise. (tg_typed_constant): Likewise. (tg_start_block): Likewise. gas * macro.c (macro_expand_body): Use a buffer big enough to hold an extremely large integer.
2016-07-01x86-64/MPX: relax no-RIP-relative-addressing testcaseJan Beulich2-4/+8
... for COFF targets.
2016-07-01Add marker for 2.27 branch.Tristan Gingold2-0/+7
binutils/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. gas/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. ld/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27.
2016-07-01x86-64/MPX: bndmk, bndldx, and bndstx don't allow RIP-relative addressingJan Beulich4-132/+227
Additionally warn about scaling factors other than 1 for the latter two, as those get ignored by the hardware.
2016-07-01x86/MPX: fix address size handlingJan Beulich5-4/+223
While address overrides are ignored in 64-bit mode (and hence shouldn't really result in an error, but upon v1 converting this to a warning I was told otherwise), trying to use 16-bit addressing is documented to result in #UD, and hence the assembler should reject the attempt. (The added test case at once also checks that bndc{l,n,u} won't accept 16-bit register operands.)
2016-07-01x86/Intel: don't accept bogus instructionsJan Beulich5-5/+72
... due to their last byte looking like a suffix, when after its stripping a matching instruction can be found. Since memory operand size specifiers in Intel mode get converted into suffix representation internally, we need to keep track of the actual mnemonic suffix which may have got trimmed off, and check its validity while looking for a matching template. I tripper over this quite some time again after support for AMD's SSE5 instructions got removed, as at that point some of the SSE5 mnemonics, other than expected, didn't fail to assemble. But the problem affects many more instructions, namely (almost) all MMX, SSE, and AVX ones as it looks. I don't think it makes sense to add a testcase covering all of them, nor do I think it makes sense to pick out some random examples for a new test case.
2016-07-01x86: allow suffix-less movzw and 64-bit movzbJan Beulich5-0/+94
... just like is already the case for 16- and 32-bit movzb: I can't see why omitting suffixes on this (and movs{b,w,l}) is not allowed, when it is allowed for all other instructions where the suffix is redundant with (one of) the operands.
2016-07-01x86/Intel: fix operand checking for MOVSDJan Beulich7-2/+134
The dual purpose mnemonic (string move vs scalar double move) breaks the assumption that the isstring flag would be set on both the first and last entry in the current set of templates, which results in bogus or missing diagnostics for the string move variant of the mnemonic. Short of mostly rewriting i386_index_check() and its interaction with the rest of the code, simply shrink the template set to just string instructions when encountering the second memory operand, and run i386_index_check() a second time for the first memory operand after that reduction.
2016-06-30MIPS/GAS: Fix a comment typo in `get_append_method'Maciej W. Rozycki2-1/+5
gas/ * config/tc-mips.c (get_append_method): Fix a comment typo.
2016-06-30ChangeLog entry for the --with-cpu patch for ARC configuration.Andrew Burgess1-0/+8
2016-06-30MIPS16/GAS: Fix delay slot filling across fragsMatthew Fortune10-7/+186
Fix an assertion failure like: test.s: Assembler messages: test.s:3: Internal error! Assertion failure in append_insn at .../gas/config/tc-mips.c:7523. Please report this bug. triggered by assembling MIPS16 code like: hello: addiu $4, $4, 4 jr $31 with the generation of a listing file enabled, e.g.: $ as -mips16 -O2 -aln=test.lst The cause of the problem is the lack of support for moving instructions across frags in MIPS16 jump swapping, which triggers more easily with listing enabled as in that case every instruction gets placed in its own frag. It would trigger even with listing disabled though if the instruction to swap a MIPS16 jump with was unfortunately enough placed as last in a frag that became full. This scenario is already handled correctly with branch swapping in regular MIPS and microMIPS code, so reuse it for MIPS16 code as well, and now that all MIPS16 handling has become the same as the regular MIPS and microMIPS cases remove MIPS16 special casing altogether. This effectively complements: commit 464ab0e55ade01d2bb0b4fa45c429af7a2f85a26 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Aug 6 20:33:00 2012 +0000 <https://sourceware.org/ml/binutils/2012-08/msg00043.html>, ("MIPS/GAS: Correct microMIPS branch swapping assertion") for the MIPS16 case. The assertion itself was introduced with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), but its introduction merely noted our existing lack of support for MIPS16 jump swapping across frags. gas/ * config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special case MIPS16 handling. * testsuite/gas/mips/branch-swap-3.d: New test. * testsuite/gas/mips/branch-swap-4.d: New test. * testsuite/gas/mips/mips16@branch-swap-3.d: New test. * testsuite/gas/mips/mips16@branch-swap-4.d: New test. * testsuite/gas/mips/micromips@branch-swap-3.d: New test. * testsuite/gas/mips/micromips@branch-swap-4.d: New test. * testsuite/gas/mips/branch-swap-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-30MIPS/GAS: Simplify non-MIPS16 branch swapping sequenceMaciej W. Rozycki2-3/+9
Simplify non-MIPS16 branch swapping by copying the MIPS16 variant, which sets the new position for the current instruction first and reduces the calculation of the new position of the previous instruction. Also refer to previous instruction's frag and position via `delay' for consistency. Reintroduce an explanatory comment, updated, previously removed with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"). gas/ * config/tc-mips.c (append_insn): Simplify non-MIPS16 branch swapping sequence.
2016-06-30PR gas/20312: Do not pad sections to alignment on failed assemblyMaciej W. Rozycki5-16/+33
Correct a regression from commit 85024cd8bcb9 ("Run write_object_file after errors") causing unsuccessful assembly, which may be due to any reason, such as supplying a valid source like this: .text .byte 0 .err to terminate with an assertion failure like: test.s: Assembler messages: test.s:3: Error: .err encountered ../as-new: BFD (GNU Binutils) 2.24.51.20140628 internal error, aborting at .../gas/write.c line 608 in size_seg ../as-new: Please report this bug. on targets whose default text section alignment is above 0, typically RISC machines. This is due to an attempt to set last text section's frag alignment to 0, requested from `subsegs_finish_section' where `frag_align_code (alignment, 0)' is called with `alignment' set to 0 rather than the section alignment if `had_errors' has returned true. The call to `subsegs_finish_section' is made from `subsegs_finish' from `write_object_file' at unsuccessful completion, which previously wasn't made. Always set last section's frag alignment from the section alignment then, forcing no section padding instead if completing unsuccessfully, so that in that case alignment padding is still suppressed from any listing generated, fixing assertion failures for these targets: alpha-linuxecoff -FAIL: all pr20312 arm-aout -FAIL: all pr20312 mips-freebsd -FAIL: all pr20312 mips-img-linux -FAIL: all pr20312 mips-linux -FAIL: all pr20312 mips-mti-linux -FAIL: all pr20312 mips-netbsd -FAIL: all pr20312 mips-sgi-irix5 -FAIL: all pr20312 mips-sgi-irix6 -FAIL: all pr20312 mips-vxworks -FAIL: all pr20312 mips64-freebsd -FAIL: all pr20312 mips64-img-linux -FAIL: all pr20312 mips64-linux -FAIL: all pr20312 mips64-mti-linux -FAIL: all pr20312 mips64-openbsd -FAIL: all pr20312 mips64el-freebsd -FAIL: all pr20312 mips64el-img-linux -FAIL: all pr20312 mips64el-linux -FAIL: all pr20312 mips64el-mti-linux -FAIL: all pr20312 mips64el-openbsd -FAIL: all pr20312 mipsel-freebsd -FAIL: all pr20312 mipsel-img-linux -FAIL: all pr20312 mipsel-linux -FAIL: all pr20312 mipsel-mti-linux -FAIL: all pr20312 mipsel-netbsd -FAIL: all pr20312 mipsel-vxworks -FAIL: all pr20312 mipsisa32-linux -FAIL: all pr20312 mipsisa32el-linux -FAIL: all pr20312 mipsisa64-linux -FAIL: all pr20312 mipsisa64el-linux -FAIL: all pr20312 sh-pe -FAIL: all pr20312 sparc-aout -FAIL: all pr20312 gas/ PR gas/20312 * write.c (subsegs_finish_section): Force no section padding to alignment on failed assembly, always set last frag's alignment from section. * testsuite/gas/all/pr20312.l: New list test. * testsuite/gas/all/pr20312.s: New test source. * testsuite/gas/all/gas.exp: Run the new test
2016-06-30Allow ARC target to be configured with --with-cpu=<cpu-name>.Andrew Burgess6-4/+46
gas * config.in (TARGET_WITH_CPU): Undefine. * configure.ac: Add --with-cpu support, and define in config.h. * configure: Regenerate. * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU. * NEWS: Mention new configure option.
2016-06-30[ARM][GAS] ARMv8.2 should enable ARMv8.1 NEON instructions.Matthew Wahab2-0/+83
GAS fails to recognize march=armv8.2-a as a superset of march=armv8.1-a when assembling NEON instructions. The patch corrects this, making -march=armv8.2-a -mfpu=neon-fp-armv8 enable the NEON intructions introduced with ARMv8.1-A. include/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set of enabled FPU features. gas/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/arm/armv8_2+rdma.d: New.
2016-06-29Default to --enable-compressed-debug-sections=gas for Linux/x86H.J. Lu3-0/+18
--enable-compressed-debug-sections=gas added to binutils 2.26. Make it default for Linux/x86 targets in 2.27. * NEWS: Mention --enable-compressed-debug-sections=gas is the default for Linux/x86 targets. * configure.tgt (ac_default_compressed_debug_sections): Default to yes for Linux/x86 targets.
2016-06-29Correct fix for typoNick Clifton1-1/+1
2016-06-29Fix typoNick Clifton1-1/+1
2016-06-29GAS: Fix `abort' expansion in write.cMaciej W. Rozycki2-1/+4
Remove an internal diagnostic regression introduced with the inclusion of "libbfd.h" from write.c, added with: commit e7ff5c732e7b95aafccd0910ea1a5cb8251a1033 Author: Alan Modra <amodra@gmail.com> Date: Fri Feb 16 03:40:17 2007 +0000 That change made "libbfd.h" override the `abort' definition provided by "as.h" earlier on, making the message produced by any calls reached from write.c, which is a part of the GAS proper, look like they came from BFD, e.g.: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets ../as-new: BFD (GNU Binutils) 2.26.51.20160628 internal error, aborting at .../gas/write.c:608 in size_seg ../as-new: Please report this bug. vs: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets .../gas/testsuite/gas/elf/type.s: Internal error, aborting at .../gas/write.c:602 in size_seg Please report this bug. With the removal of "libbfd.h" restore the latter message format. gas/ * write.c: Remove "libbfd.h" inclusion.
2016-06-28Use `supports_gnu_unique' with the `unique_symbol' and `type' testsMaciej W. Rozycki2-2/+7
Complement commit a43942db49b0 ("LD/ELF: Unify STB_GNU_UNIQUE handling") and use `supports_gnu_unique' with the `unique_symbol' and `type' tests, fixing failures like: .../binutils/testsuite/binutils-all/unique.s: Assembler messages: .../binutils/testsuite/binutils-all/unique.s:2: Error: symbol type "gnu_unique_object" is supported only by GNU targets ERROR: .../binutils/testsuite/binutils-all/unique.s: assembly failed UNRESOLVED: ar unique symbol in archive .../binutils/ar -s -r -c tmpdir/artest.a tmpdir/unique.o Executing on host: .../binutils/ar -s -r -c tmpdir/artest.a tmpdir/unique.o (timeout = 300) .../binutils/ar: tmpdir/unique.o: No such file or directory FAIL: ar unique symbol in archive and: .../gas/testsuite/gas/elf/type.s: Assembler messages: .../gas/testsuite/gas/elf/type.s:30: Error: symbol type "gnu_unique_object" is supported only by GNU targets ../as-new: BFD (GNU Binutils) 2.26.51.20160628 internal error, aborting at .../gas/write.c:608 in size_seg ../as-new: Please report this bug. .../gas/testsuite/../../binutils/readelf -s dump.o | grep "1 *\[FIONTCU\]" > dump.out Executing on host: sh -c {.../gas/testsuite/../../binutils/readelf -s dump.o >readelf.out 2>gas.stderr} /dev/null (timeout = 300) readelf: Error: dump.o: Failed to read file's magic number FAIL: elf type list on MIPS/FreeBSD targets: mips-freebsd -FAIL: ar unique symbol in archive mips-freebsd -FAIL: elf type list mips64-freebsd -FAIL: ar unique symbol in archive mips64-freebsd -FAIL: elf type list mips64el-freebsd -FAIL: ar unique symbol in archive mips64el-freebsd -FAIL: elf type list mipsel-freebsd -FAIL: ar unique symbol in archive mipsel-freebsd -FAIL: elf type list binutils/ * testsuite/binutils-all/ar.exp: Use `supports_gnu_unique' with the `unique_symbol' test. gas/ * testsuite/gas/elf/elf.exp: Use `supports_gnu_unique' with the `type' test.
2016-06-28Fix new testcase for hppa64Alan Modra2-12/+14
Anything in first column is a label on hppa64. PR gas/20247 * testsuite/gas/elf/section11.s: Don't start directives in first column.
2016-06-28[AArch64] Make register indices be full 64-bit valuesRichard Sandiford3-0/+77
aarch64_opnd_info used bitfields to hold vector element indices, but values were stored into those bitfields before their ranges had been checked. This meant large invalid indices could be silently truncated to smaller valid indices. The two obvious fixes were to do the range checking earlier or use a full 64-bit field for the index. I went for the latter for two reasons: - Doing the range checking in operand_general_constraint_met_p seems structurally cleaner than doing it while parsing. - The bitfields didn't really buy us anything. The imm field of the union is already 128 bits, so we can use a full int64_t index without growing the structure. The patch also adds missing range checks for the elements in a register list index. include/ * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t. opcodes/ * aarch64-opc.c (operand_general_constraint_met_p): Check the range of ldst_elemlist operands. (print_register_list): Use PRIi64 to print the index. (aarch64_print_operand): Likewise. gas/ * testsuite/gas/aarch64/diagnostic.s, testsuite/gas/aarch64/diagnostic.l: Add tests for out-of-range indices.
2016-06-28MIPS16: Add R_MIPS16_PC16_S1 branch relocation supportMaciej W. Rozycki17-45/+209
For R_MIPS16_PC16_S1 the calculation is `(sign_extend(A) + S - P) >> 1' and the usual MIPS16 bit shuffling applies to relocated field handling, as per the encoding of the branch target in the extended form of the MIPS16 B, BEQZ, BNEZ, BTEQZ and BTNEZ instructions. include/ * elf/mips.h (R_MIPS16_PC16_S1): New relocation. bfd/ * elf32-mips.c (elf_mips16_howto_table_rel): Add R_MIPS16_PC16_S1. (mips16_reloc_map): Likewise. * elf64-mips.c (mips16_elf64_howto_table_rel): Likewise. (mips16_elf64_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfn32-mips.c (elf_mips16_howto_table_rel): Likewise. (elf_mips16_howto_table_rela): Likewise. (mips16_reloc_map): Likewise. * elfxx-mips.c (mips16_branch_reloc_p): New function. (mips16_reloc_p): Handle R_MIPS16_PC16_S1. (b_reloc_p): Likewise. (mips_elf_calculate_relocation): Likewise. (_bfd_mips_elf_check_relocs): Likewise. * reloc.c (BFD_RELOC_MIPS16_16_PCREL_S1): New relocation. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. gas/ * config/tc-mips.c (mips16_reloc_p): Handle BFD_RELOC_MIPS16_16_PCREL_S1. (b_reloc_p): Likewise. (limited_pcrel_reloc_p): Likewise. (md_pcrel_from): Likewise. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise. (md_convert_frag): Likewise. (mips_fix_adjustable): Update comment. * testsuite/gas/mips/mips16-branch-reloc-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-2.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-addend-3.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-absolute.d: Remove error output, add dump patterns. * testsuite/gas/mips/mips16-branch-reloc-2.l: Remove file. * testsuite/gas/mips/mips16-branch-reloc-3.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-3.l: Remove file. * testsuite/gas/mips/mips16-branch-absolute.l: Remove file. * testsuite/gas/mips/mips16-branch-addend-2.s: Add padding. * testsuite/gas/mips/branch-weak.s: Adjust alignment, avoid implicit instruction padding, avoid MIPS16 JR->JRC conversion. * testsuite/gas/mips/branch-weak-6.d: New test. * testsuite/gas/mips/branch-weak-7.d: New test. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/mips16-branch-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-3.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-2.d: New test. * testsuite/ld-mips-elf/mips16-branch-addend-3.d: New test. * testsuite/ld-mips-elf/mips16-branch.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-06-27Make the kernel dwarf stack unwinder work for ARC targets.Vineet Gupta3-3/+8
* config//tc-arc.c (tc_arc_frame_initial_instructions): Use cfi_add_CFA_def_cfa to generate default CFA with offset * testsuite/gas/cfi/cfi-arc-1.d: Update expected output.
2016-06-27oops - omitted from previous deltaNick Clifton1-0/+15
2016-06-27Add command line option to stop the assembler from padding the end of ↵Nick Clifton8-6/+69
sections to their alignment boundary. PR gas/20247 * as.h (do_not_pad_sections_to_alignment): New global variable. * as.c (show_usage): Add --no-pad-sections. (parse_args): Likewise. * write.c (size_seg): Skip padding the end of the section if requested from the command line. (SUB_SEGMENT_ALIGN): Likewise. * doc/as.texinfo: Document the new option. * NEWS: Mention the new feature. * testsuite/gas/elf/section11.s: New test. * testsuite/gas/elf/section11.d: New test driver. * testsuite/gas/elf/elf.exp: Run the new test.
2016-06-27add ChangeLog entriesTrevor Saunders1-0/+5
2016-06-27dlx: move prototype of dlx_set_skip_hi16 to elf/dlx.hTrevor Saunders2-1/+2
bfd/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf32-dlx.h: New file. * elf32-dlx.c: Adjust. gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-dlx.c: Include bfd/elf32-dlx.h. * config/tc-dlx.h: Remove prototype of dlx_set_skip_hi16.
2016-06-27xtensa: remove a sentinalTrevor Saunders2-15/+21
gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c (xtensa_elf_suffix): Use ARRAY_SIZE instead of a sentinal element. (map_suffix_reloc_to_operator): Likewise. (map_operator_to_reloc): Likewise.
2016-06-27nds32: remove a sentinalTrevor Saunders2-14/+10
gas/ChangeLog: 2016-06-27 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-nds32.c (md_begin): Use ARRAY_SIZE instead of a sentinal element in relax_table.
2016-06-25aarch64: make the type of reg_entry::type aarch64_reg_typeTrevor Saunders2-10/+15
gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-aarch64.c: Make the type of reg_entry::type aarch_reg_type.
2016-06-25remove a few sentinalsTrevor Saunders5-30/+35
gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-bfin.c (bfin_cpus): Remove sentinal. (md_parse_option): Adjust. * config/tc-aarch64.c (aarch64_parse_abi): Replace use of a sentinal with iteration from 0 to ARRAY_SIZE. * config/tc-mcore.c (md_begin): Likewise. * config/tc-visium.c (visium_parse_arch): Likewise. opcodes/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * mcore-opc.h: Remove sentinal. * mcore-dis.c (print_insn_mcore): Adjust.
2016-06-25simplify tic54x_set_default_include ()Trevor Saunders2-14/+16
its only called with an argument of 0, so we might as well remove the code supporting other values. gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-tic54x.c (tic54x_set_default_include): remove argument and simplify accordingly. (tic54x_include): Adjust. (tic54x_mlib): Likewise.
2016-06-25xtensa: prototype xtensa_make_property_section in elf/xtensa.hTrevor Saunders2-4/+4
There's no reason to have multiple prototypes for the same function. include/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf/xtensa.h (xtensa_make_property_section): New prototype. gas/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * config/tc-xtensa.c (xtensa_make_property_section): Remove prototype. bfd/ChangeLog: 2016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * elf32-xtensa.c (xtensa_make_property_section): Remove prototype.
2016-06-25MIPS16/GAS: Restore unsupported relocation diagnosticsMaciej W. Rozycki77-63/+1227
Correct a MIPS16 relocation handling regression in GAS introduced with: commit 177b4a6ad0047c8995fbc55016bc4f4b68d53b4a Author: Alexandre Oliva <aoliva@redhat.com> Date: Mon Mar 18 18:56:18 2002 +0000 discussed at <https://sourceware.org/ml/binutils/2002-03/msg00345.html>, which removed a preparatory call to `mips16_extended_frag' previously made from `md_estimate_size_before_relax'. As a result the function is never called with its `sec' parameter non-NULL and consequently all the unsupported relocation checks within are dead and never trigger, causing any unhandled relocations to silently resolve to 0. Unfortunately there was no sufficient test suite coverage back then to catch this. Remove all dead code then, and all the associated comments. Update the remaining call to `mips16_extended_frag' from `mips_relax_frag' to pass the relocation section as the `sec' parameter and use it to mark frags which require an external relocation, as extended. Finally handle any outstanding MIPS16 relocations in `md_convert_frag' and report an error since we don't support any except with percent operators. gas/ * config/tc-mips.c (append_insn): Use any `O_symbol' expression unchanged with relaxed MIPS16 instructions. (mips16_extended_frag): Adjust accordingly. Return 1 right away if a relocation will be required for the symbol requested. Remove dead first relaxation pass code. (mips_relax_frag): Pass `sec' down to `mips16_extended_frag'. (md_convert_frag): Adjust symbol value calculation. Raise an error if a relocation is required for the symbol requested. * testsuite/gas/mips/mips16@relax-swap3.d: Remove dump patterns, add error output. * testsuite/gas/mips/mips16@relax-swap3.l: New error output. * testsuite/gas/mips/mips16-pcrel-relax-0.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-1.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-2.d: New test. * testsuite/gas/mips/mips16-pcrel-relax-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-0.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-1.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-0.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-1.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16-branch-reloc-0.d: New test. * testsuite/gas/mips/mips16-branch-reloc-1.d: New test. * testsuite/gas/mips/mips16-branch-reloc-2.d: New test. * testsuite/gas/mips/mips16-branch-reloc-3.d: New test. * testsuite/gas/mips/mips16-branch-addend-0.d: New test. * testsuite/gas/mips/mips16-branch-addend-1.d: New test. * testsuite/gas/mips/mips16-branch-addend-2.d: New test. * testsuite/gas/mips/mips16-branch-addend-3.d: New test. * testsuite/gas/mips/mips16-branch-absolute.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-0.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-1.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-2.d: New test. * testsuite/gas/mips/mips16-absolute-reloc-3.d: New test. * testsuite/gas/mips/mips16-pcrel-reloc-2.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-6.l: New error output. * testsuite/gas/mips/mips16-pcrel-reloc-7.l: New error output. * testsuite/gas/mips/mips16-pcrel-addend-2.l: New error output. * testsuite/gas/mips/mips16-pcrel-addend-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-absolute.l: New error output. * testsuite/gas/mips/mips16-branch-reloc-2.l: New error output. * testsuite/gas/mips/mips16-branch-reloc-3.l: New error output. * testsuite/gas/mips/mips16-branch-addend-2.l: New error output. * testsuite/gas/mips/mips16-branch-addend-3.l: New error output. * testsuite/gas/mips/mips16-branch-absolute.l: New error output. * testsuite/gas/mips/mips16-absolute-reloc-2.l: New error output. * testsuite/gas/mips/mips16-absolute-reloc-3.l: New error output. * testsuite/gas/mips/mips16-pcrel-relax-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-relax-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-4.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-5.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-6.s: New test source. * testsuite/gas/mips/mips16-pcrel-reloc-7.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-0.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-1.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-2.s: New test source. * testsuite/gas/mips/mips16-pcrel-addend-3.s: New test source. * testsuite/gas/mips/mips16-pcrel-absolute.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-0.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-1.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-2.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-3.s: New test source. * testsuite/gas/mips/mips16-branch-addend-0.s: New test source. * testsuite/gas/mips/mips16-branch-addend-1.s: New test source. * testsuite/gas/mips/mips16-branch-addend-2.s: New test source. * testsuite/gas/mips/mips16-branch-addend-3.s: New test source. * testsuite/gas/mips/mips16-branch-absolute.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-0.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-1.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-2.s: New test source. * testsuite/gas/mips/mips16-absolute-reloc-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-24alpha-openbsd build failureAlan Modra2-2/+5
This target doesn't build, due to a missing gas/config/te-obsd.h file. It's been that way since the commit switching to elf, in 2002. https://lists.gnu.org/archive/html/bug-gnu-utils/2002-07/msg00128.html * configure.tgt (alpha-*-openbsd*): Use em=nbsd.
2016-06-23MIPS/GAS: Keep the original microMIPS symbol reference in branch relocsMaciej W. Rozycki8-13/+161
Keep original microMIPS symbols in references from branch relocations so that the ISA bit is retained and can be verified for validity in static link. No need to update WRT MIPS16 symbols because we keep them all anyway for other reasons. gas/ * config/tc-mips.c (b_reloc_p): New function. (mips_fix_adjustable): Also keep the original microMIPS symbol referred from branch relocations. * testsuite/gas/mips/branch-local-1.d: New test. * testsuite/gas/mips/branch-local-n32-1.d: New test. * testsuite/gas/mips/branch-local-n64-1.d: New test. * testsuite/gas/mips/micromips@branch-misc-4-64.d: Update relocations. * testsuite/gas/mips/branch-local-1.s: New test source. * testsuite/gas/mips/mips.exp: Run the new cases.
2016-06-23[ARC] Misc minor edits/fixesGraham Markall2-36/+44
The code supporting -mspfp, -mdpfp, and -mfpuda options are in sections of code that are commented as being for backward compatibility only, and having no effect. However, they do have an effect, enabling the SPX, DPX, and DPA instruction subclasses respectively. This commit moves the code supporting these options away from the comments indicating that they are dummy options, and also fixes a small issue where -mnps400 had the additional effect of enabling SPX instructions. A couple of other minor edits (that make no functional change) are also included. gas/ChangeLog: * config/tc-arc.c (options, md_longopts, md_parse_option): Move -mspfp, -mdpfp and -mfpuda out of the sections for dummy options. Correct erroneous enabling of SPFP instructions when using -mnps400. include/ChangeLog: * opcode/arc.h: Make insn_class_t alphabetical again. opcodes/ChangeLog: * arc-opc.c: Correct description of availability of NPS400 features.
2016-06-23MIPS/GAS: Handle resolved R6 PC-relative relocations (ChangeLog)Maciej W. Rozycki1-0/+19
Add missing ChangeLog entry for commit 41947d9e38c4 ("MIPS/GAS: Handle resolved R6 PC-relative relocations").
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