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1996-09-13 * gas/h8300/macs.s: Add "stmac" instructions.Jeff Law1-0/+5
* gas/h8300/basic.exp: Test them. Somehow I forgot to test "stmac".
1996-09-12Thu Sep 12 10:25:45 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion2-0/+12
* config/tc-arm.c (md_apply_fix3): Update two thumb instruction slots when processing BL fixups. * config/tc-arm.c (output_inst): Ensure Thumb BL fixup is marked on the first half of the instruction. Thu Sep 12 10:28:44 1996 James G. Smith <jsmith@cygnus.co.uk> * gas/arm/thumb.s (back): Check assembly of Thumb BL.
1996-09-11 * ecoff.c (ecoff_stab): Create an expression symbol for a complexIan Lance Taylor1-0/+3
stabs expression, rather than giving an error.
1996-09-11 * ecoff.c (ecoff_new_file): Don't do anything if we are still inIan Lance Taylor2-0/+7
the same file. PR 10595.
1996-09-10 * config/tc-mips.c (append_insn): Fill in the value for a constantIan Lance Taylor1-0/+5
jump, rather than creating a reloc. PR 10589.
1996-09-10Don't set interlocks for r5000. Rely on -mips4 settings.Ian Lance Taylor2-8/+3
1996-09-09 * gas/mips/mips4.s, gas/mips/mips4.d: Use $fccN for condition codeIan Lance Taylor2-0/+56
registers.
1996-09-09 * config/tc-mips.c (append_insn): Don't swap an instruction whichIan Lance Taylor2-11/+26
sets a condition code with an instruction which uses a condition code. (mips_ip): In cases 'N' and 'M', look for $fccN rather than an immediate value.
1996-09-09 * config/tc-mips.c (md_begin): Recognize r5000 for cpu. IfIan Lance Taylor2-13/+52
mips_cpu is 5000, set interlocks and cop_interlocks. (mips_ip): Give a better error message if the ISA level is wrong. (md_parse_option): Recognize -mcpu=[v][r]5000.
1996-09-07Sat Sep 7 13:25:55 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-3/+132
* config/tc-mips.c (COUNT_TOP_ZEROES): Added macro to count leading zeroes. (load_register): Ensure hi32 bits are not lost during lo32bit processing. Fix shift offset that was overflowing into the next instruction field. Add code to generate shorter sequences for constants with a single contiguous seqeuence of ones. Fri Sep 6 18:23:54 1996 James G. Smith <jsmith@cygnus.co.uk> * gas/mips/dli.{s,d}: More test cases added. NOTE: The COUNT_TOP_ZEROES macro is a bit bulky, and the same result can be achieved by using a "standard" ffs() routine: count = ffs(~v); count = count == 0 ? 0 : 33 - count; However the following timings (VR4300 CPU clock ticks on a CMA101 board) show the performance gain. Number of ffs() for loop if/then/else conditional leading ?: zeroes ------------------------------------------------------------------------------- 0 167 179 266 251 1 1718 283 263 259 2 1670 379 287 295 3 1622 475 311 311 4 1574 571 295 287 5 1534 667 311 319 6 1478 763 307 299 7 1430 859 323 323 8 1382 962 287 295 9 1334 1051 319 311 10 1286 1154 299 307 11 1238 1250 323 331 12 1183 1346 299 307 13 1135 1442 331 323 14 1087 1546 311 319 15 1039 1642 335 343 16 991 1730 295 287 17 950 1834 311 319 18 895 1922 307 299 19 847 2026 331 323 20 799 2122 307 299 21 751 2218 323 323 22 703 2314 311 311 23 655 2417 343 335 24 599 2506 307 299 25 559 2602 331 331 26 511 2705 311 319 27 463 2801 343 335 28 407 2897 311 319 29 367 2993 343 335 30 311 3097 323 331 31 271 3185 355 355 32 215 3233 379 371
1996-09-07Fri Sep 6 17:07:12 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+9
* config/tc-d10v.c (d10v_dot_word): New function to support "@word" with the word pseudo-op. (md_apply_fix3): Cleanup and changes to support correct sizes for 16 and 18-bit relocs.
1996-09-06 * configure.in (sparc-*-aout): Set `em'.David Edelsohn4-39/+90
* configure: Regenerated. * config/te-sparcaout.h: New file. * config/tc-sparc.h (TARGET_BYTES_BIG_ENDIAN): Define. Ifdef TE_SPARCOUT define TARGET_FORMAT and SPARC_BIENDIAN. * config/tc-sparc.c (INSN_BIG_ENDIAN): New macro. (SPECIAL_CASE_{SETSW,SETX}): Define. ({NOP,OR,FMOVS,SETHI,SLLX,SRA}_INSN): Define. (md_begin): Delete setting of `target_big_endian'. (output_insn): New function. (md_assemble): Rewrite. Add `setx' support. (sparc_ip): Handle `0' operand char. Recognize setuw, setsw, setx special cases. (md_atof): Add little endian support. (md_number_to_chars): Likewise. (md_apply_fix): Likewise. (md_longopts): Recognize -EL,-EB ifdef SPARC_BIENDIAN. (md_parse_option): Likewise. (md_show_usage): Print -EL, -EB ifdef SPARC_BIENDIAN.
1996-09-05 * ecoff.c (ecoff_new_file): New function.Ian Lance Taylor2-32/+94
* ecoff.h (ecoff_new_file): Declare. * config/obj-ecoff.h (obj_app_file): Define. PR 10548.
1996-09-04 * config/tc-mips.c (load_register): Remove unused variable tmp.Ian Lance Taylor2-1/+5
1996-09-04Wed Sep 4 11:24:29 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion6-13/+92
* config/tc-mips.c (load_register): Remove unnecessary code that was causing the high 32bits of 64bit constants to be lost. Fixes PR10503. The compiler was producing the assembler code: dli $3,0xfffffffffffff when constructing the softfloat library. Unfortunately it was being incorrectly assembled.
1996-09-03 * config/tc-v850.c: Remove commented out and #if 0'd code.Jeff Law1-0/+9
(v850_reloc_prefix): Provide prototype. (postfix, get_reloc, build_insn): Remove prototypes for nonexistant functions. (md_begin, md_assemble, md_apply_fix3): Remove unused variables. (md_assemble): Add default to case statement. Minor cleanups.
1996-08-31 * config/tc-v850.c (md_assemble): Compute size of the instrctionJeff Law1-1/+6
from the opcode.
1996-08-31 * config/tc-v850.c (md_apply_fix3): Do simple byte, short andJeff Law2-0/+14
word fixups too. Fixes "difference between forward references".
1996-08-31 * gas/v850/basic.exp (do_branch): Check offsets in branch insns.Jeff Law2-32/+37
(do_jumps): Likewise. Now that we can resolve known branch targets.
1996-08-31 * config/tc-v850.c (md_apply_fix3): Use little endian get/putJeff Law2-4/+28
routines to fetch/store the updated instruction from/to memory. (v850_insert_operand): If the operand has a specialized insert routine, call it. Getting fixups closer. At least br <target> works now.
1996-08-31* config/tc-v850.c (reg_name_search): Align calling convention toJ.T. Conklin2-133/+195
be like identical function found in tc-ppc.c. (get_reloc): Removed. (v850_reloc_prefix): New function, parse lo(), hi() and hi0(). (md_assemble): emit fixups. (md_pcrel_from): renamed from md_pcrel_from_section, emit proper displacement. (md_apply_fix3): handle fixups/relocs. * config/tc-v850.h (MD_PCREL_FROM_SECTION): Removed definition.
1996-08-30 Add SH ELF support.Ian Lance Taylor1-0/+48
* configure.in (sh-*-elf*): New target. * config/tc-sh.h (TARGET_ARCH): Define. (WORKING_DOT_WORD): Define. (TC_COFF_FIX2RTYPE): Only define if OBJ_COFF. (BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise. (TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise. (DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise. (TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise. (SUB_SEGMENT_ALIGN): Likewise. (RELOC_32): Don't define. (tc_frob_file_before_adjust): Define if BFD_ASSEMBLER. (target_big_endian): Declare if OBJ_ELF. (TARGET_FORMAT): Define if OBJ_ELF. * config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc numbers throughout. (tc_crawl_symbol_chain): Only define if OBJ_COFF. (tc_headers_hook, tc_coff_sizemachdep): Likewise. (struct sh_count_relocs): Define. (sh_count_relocs): New static function, broken out of sh_frob_file. Add BFD_ASSEMBLER code. (sh_frob_section): Likewise. (sh_frob_file): Call sh_frob_section. (md_convert_frag): If BFD_ASSEMBLER, change type of headers, and call section_symbol rather than seg_info (seg)->dot. (md_section_align): Add OBJ_ELF version. (SWITCH_TABLE_CONS): Define. (SWITCH_TABLE): Use SWITCH_TABLE_CONS. (md_apply_fix): Change parameter types if BFD_ASSEMBLER. Only handle fx_r_type == 0 if not BFD_ASSEMBLER. Return 0 if BFD_ASSEMBLER. (struct reloc_map): Define if not BFD_ASSEMBLER. (coff_reloc_map): Likewise. (sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type. (tc_gen_reloc): New function if BFD_ASSEMBLER. * write.c (write_relocs): Ifdef out fx_where test which triggers inappropriately for SH ELF. (write_object_file): Call tc_frob_file_before_adjust and obj_frob_file_before_adjust if they are defined. * write.c (write_object_file): Use BFD_RELOC_16, not BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
1996-08-30Fri Aug 30 14:47:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c (find_opcode): Fix problem with calculating branch sizes in across sections.
1996-08-30 * gas/v850/misc.s: Tweak register numbers for better testing.Jeff Law2-2/+5
* gas/v850/basic.exp (misc_tests): Corresponding changes.
1996-08-30 * config/tc-850.c (md_assemble): Handle hi() correctly. HandleJeff Law2-5/+48
hi0() too. Bugfix.
1996-08-30 * gas/v850/hilo.s: New testfile.Jeff Law4-1/+45
* gas/v850/basic.exp: Run hilo tests.
1996-08-29Thu Aug 29 11:32:23 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-0/+7
* gas/arm/arm7t.d: Explicitly force little-endian assembly.
1996-08-29Wed Aug 28 19:20:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+8
* config/tc-d10v.c (find_opcode): Fix a bug which could generate the wrong opcode for cases like st2w where there are many forms of the same instruction.
1996-08-27 * expr.c (operand): If md_parse_name is defined, call it beforeIan Lance Taylor1-0/+15
calling symbol_find_or_make. * config/tc-ppc.h (md_parse_name): Define. (ppc_parse_name): Declare. * config/tc-ppc.c (reg_name_search): Add regs and regcount parameters. (register_name): Update call to reg_name_search. (cr_operand): New static variable. (cr_names): New static const array. (ppc_parse_name): New function. (md_assemble): If PPC_OPERAND_CR is set in the operand flags, set cr_operand before calling expression. PR 10460.
1996-08-27 * config/tc-hppa.c (tc_gen_reloc): Add new argument toJeff Law1-0/+5
hppa_gen_reloc_type call. Fixing a problem with -mlinker-opt.
1996-08-27Mon Aug 26 18:24:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-7/+26
* tc-d10v.c: Fixed ".word". Fixed problem with range checking on addresses. Improved error messages.
1996-08-27Mon Aug 26 18:24:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+6
* config/tc-d10v.c: Fixed ".word". Fixed problem with range checking on addresses. Improved error messages. * doc/c-d10v.texi: Added docs for register pairs.
1996-08-26Mon Aug 26 13:39:27 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-14/+16
* tc-d10v.c (parallel_ok): Fix bug in parallel checking code.
1996-08-26Mon Aug 26 13:39:27 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c (parallel_ok): Fix bug in parallel checking code.
1996-08-26 * ecoff.c (init_file): Initialize fMerge to 1.Ian Lance Taylor1-0/+11
(add_file): Restore old file merging code, but only merge files if fMerge is set. (ecoff_directive_loc): Clear fMerge field of current file. (ecoff_generate_asm_lineno): Likewise.
1996-08-23 * config/tc-v850.c (md_assemble): Rough cut at demandingJeff Law2-0/+29
"ep" or "r30" in sst and sld instructions. (md_apply_fix3): Don't abort. Just warn that we don't have relocs yet.
1996-08-23 * gas/v850/basic.exp (move_tests): Test instruction bit patterns.Jeff Law1-13/+13
* gas/v850/move.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (mem_tests): Test instruction bit patterns.Jeff Law3-13/+25
xfail sst and sld tests. (mov_tests): Remove bogus xfail. * gas/v850/mem.s: sst and sld instructions can only index from "ep" register.
1996-08-23 * gas/v850/basic.exp (logical_tests): Test instruction bit patterns.Jeff Law2-7/+11
Update addresses. * gas/v850/logical.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (jump_tests): Test instruction bit patterns,Jeff Law2-3/+6
but not displacements (yet).
1996-08-23 * config/tc-v850.c (CC_NAME_CNT): Define.Jeff Law2-0/+66
(cc_name): New function. (md_assemble): Handle V850_OPERAND_CC correctly. setf stuff
1996-08-23 * gas/v850/basic.exp (compare_tests): Test instruction bit patterns.Jeff Law2-24/+26
1996-08-23Fri Aug 23 11:40:47 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+6
* doc/c-d10v.texi: Fix typo.
1996-08-23 * gas/v850/basic.exp (branch_tests): Test instruction bit patters,Jeff Law2-20/+23
but not displacements (yet).
1996-08-23 * gas/v850/basic.exp (bit_tests): Test instruction bit patterns.Jeff Law2-4/+6
1996-08-23 * config/tc-v850.c (md_assemble): Don't forget to initializeJeff Law2-0/+4
"insn"!
1996-08-23 * gas/v850/basic.exp (arith_tests): Test instruction bit patterns.Jeff Law2-20/+23
* gas/v850/arith.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (misc_tests): No longer expect failuresJeff Law2-4/+8
assembling "ldsr" and "stsr" opcodes. * gas/v850/misc.s: Re-enable assembling of "ldsr" and "stsr" opcodes.
1996-08-23 * config/tc-v850.c (reg_name_search): Generalize to searchJeff Law3-18/+93
any given register table. (register_name): Pass appropriate table and size to reg_name_search. (system_register_name): New function. (SYSREG_NAME_CNT): Define. (md_assemble): Handle operands which are system registers. Still working on the parser..
1996-08-23 * gas/v850/basic.exp (misc_tests): No longer expect failuresJeff Law3-6/+9
assembling "trap" opcodes. * gas/v850/misc.s: Re-enable assembling of "trap" opcodes.
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