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2013-05-162013-05-16 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-1/+5
* gas/ppc/ppc.exp: Do not run simpshft on aix.
2013-05-16 * config/tc-msp430.c: Make -mmcu recognise more part numbers.Nick Clifton6-293/+652
Add -mcpu command to specify core type. * doc/c-msp430.c: Update documentation. * gas/msp430/opcodes.s: Use correct value for .arch pseudo. * gas/msp430/msp430x.d: Use correct value for -mcpu option.
2013-05-13Corrected the changelog entry in the previous commit.Yufeng Zhang2-7/+7
2013-05-13gas/Yufeng Zhang5-3/+18
* testsuite/gas/aarch64/diagnostic.s: Update. * testsuite/gas/aarch64/diagnostic.l: Ditto. * testsuite/gas/aarch64/movi.s: Add new tests. * testsuite/gas/aarch64/movi.d: Update. opcodes/ * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Remove assertion. * aarch64-opc.c (operand_general_constraint_met_p): Relax the range check from [0, 255] to [-128, 255].
2013-05-10binutils/ChangeLog:Andrew Pinski9-10/+190
* doc/binutils.texi: Document -Mvirt disassembler option. gas/ChangeLog: * config/tc-mips.c (struct mips_set_options): New ase_virt field. (mips_opts): Update for the new field. (file_ase_virt): New variable. (ISA_SUPPORTS_VIRT_ASE): New macro. (ISA_SUPPORTS_VIRT64_ASE): New macro. (MIPS_CPU_ASE_VIRT): New define. (is_opcode_valid): Handle ase_virt. (macro_build): Handle "+J". (validate_mips_insn): Likewise. (mips_ip): Likewise. (enum options): Add OPTION_VIRT and OPTION_NO_VIRT. (md_longopts): Add mvirt and mnovirt (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT. (mips_after_parse_args): Handle ase_virt field. (s_mipsset): Handle "virt" and "novirt". (mips_elf_final_processing): Add a comment about virt ASE might need a new flag. (md_show_usage): Print out the usage of -mvirt and mno-virt options. * doc/c-mips.texi: Document -mvirt and -mno-virt. Document ".set virt" and ".set novirt". gas/testsuite/ChangeLog: * gas/mips/mips.exp: Run virt and virt64 testcases. * gas/mips/virt.d: New file. * gas/mips/virt.s: New file. * gas/mips/virt64.d: New file. * gas/mips/virt64.s: New file. include/opcode/ChangeLog: * mips.h (OP_MASK_CODE10): Correct definition. (OP_SH_CODE10): Likewise. Add a comment that "+J" is used now for OP_*CODE10. (INSN_ASE_MASK): Update. (INSN_VIRT): New macro. (INSN_VIRT64): New macro opcodes/ChangeLog: * mips-dis.c (mips_arch_choices): Add INSN_VIRT to mips32r2 . Add INSN_VIRT and INSN_VIRT64 to mips64r2. (parse_mips_dis_option): Handle the virt option. (print_insn_args): Handle "+J". (print_mips_disassembler_options): Print out message about virt64. * mips-opc.c (IVIRT): New define. (IVIRT64): New define. (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp VIRT instructions. Move rfe to the bottom as it conflicts with tlbgp.
2013-05-09 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval underAlan Modra2-19/+21
control of operand flag bits.
2013-05-06 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.Alan Modra2-29/+25
(PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise. (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise. (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise. (md_apply_fix): Set fx_no_overflow for assorted relocations. Shift and sign-extend fieldval for use by some VLE reloc operand->insert functions.
2013-05-062013-05-06 Paul Brook <paul@codesourcery.com>Catherine Moore2-2/+21
include/elf/ * mips.h (R_MIPS_PC32): Update comment. * elf64-mips.c (elf_mips_gnu_pcrel32): New. (bfd_elf64_bfd_reloc_type_lookup, bfd_elf64_bfd_reloc_name_lookup, mips_elf64_rtype_to_howto): Handle R_MIPS_PC32. * elfn32-mips.c (elf_mips_gnu_pcrel32): New. (bfd_elfn32_bfd_reloc_type_lookup, bfd_elfn32_bfd_reloc_name_lookup, mips_elfn32_rtype_to_howto): Handle R_MIPS_PC32. 2013-05-06 Paul Brook <paul@codesourcery.com> Catherine Moore <clm@codesourcery.com> gas/ * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL. (limited_pcrel_reloc_p): Likewise. (md_apply_fix): Likewise. (tc_gen_reloc): Likewise.
2013-05-062013-05-06 Richard Sandiford <rdsandiford@googlemail.com>Catherine Moore2-4/+29
* config/tc-mips.c (limited_pcrel_reloc_p): New function. (mips_fix_adjustable): Adjust pc-relative check to use limited_pc_reloc_p.
2013-05-04gas/testsuite/Richard Sandiford2-15/+19
* gas/mips/micromips-warn-branch-delay.d: Use numeric registers.
2013-05-03oops - omitted from previous deltaNick Clifton3-0/+486
2013-05-02gas/Richard Sandiford6-8/+41
* config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries. (s_mips_stab): Do not restrict to stabn only. gas/testsuite/ * gas/mips/mips16-stabs.s, gas/mips/mips16-stabs.d: New test. * gas/mips/mips.exp: Run it.
2013-05-02 * archures.c: Add some more MSP430 machine numbers.Nick Clifton13-331/+1898
* config.bfd (msp430): Define targ_selvecs. * configure.in: Add bfd_elf32_msp430_ti_vec. * cpu-msp430.c: Add some more MSP430 machine numbers. * elf32-msp430.c Add support for MSP430X relocations. Add support for TI compiler generated relocations. Add support for sym_diff relocations. Add support for relaxing out of range short branches into long branches. Add support for MSP430 attribute section. * reloc.c: Add MSP430X relocations. * targets.c: Add bfd_elf32_msp430_ti_vec. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * readelf.c: Add support for MSP430X architecture. * readelf.exp: Expect -wi test to fail for the MSP430. * config/tc-msp430.c: Add support for the MSP430X architecture. Add code to insert a NOP instruction after any instruction that might change the interrupt state. Add support for the LARGE memory model. Add code to initialise the .MSP430.attributes section. * config/tc-msp430.h: Add support for the MSP430X architecture. * doc/c-msp430.texi: Document the new -mL and -mN command line options. * NEWS: Mention support for the MSP430X architecture. * gas/all/gas.exp: Skip the DIFF1 test for the MSP430. Expect the FORWARD test to pass for the MSP430. Skip the REDEF tests for the MSP430. Expect the 930509A test to fail for the MSP430. * gas/all/sleb128-4.d: Skip for the MSP430. * gas/elf/elf.exp: Set target_machine to msp430 for the MSP430. Skip the EHOPT0 test for the MSP430. Skip the REDEF and EQU-RELOC tests for the MSP430. * gas/elf/section2.e-msp430: New file. * gas/lns/lns-big-delta.d: Remove expectation of 20-bit addresses. * gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430. * gas/msp430/msp430x.s: New test. * gas/msp430/msp430x.d: Expected disassembly. * gas/msp430/msp430.exp: Run new test. * gas/msp430/opcode.d: Update expected disassembly. * msp430.h: Add MSP430X relocs. Add some more MSP430 machine numbers. Add values used by .MSP430.attributes section. * msp430.h: Add patterns for MSP430X instructions. * Makefile.am: Add emsp430X.c * Makefine.in: Regenerate. * configure.tgt (msp430): Add msp430X emulation. * ldmain.c (multiple_definition): Only disable relaxation if it was enabled by the user. * ldmain.h (RELAXATION_ENABLED_BY_USER): New macro. * emulparams/msp430all.sh: Add support for MSP430X. * emultempl/generic.em: (before_parse): Enable relaxation for the MSP430. * scripttempl/msp430.sc: Reorganize sections. Add .rodata section. * scripttempl/msp430_3.sc: Likewise. * NEWS: Mention support for MSP430X. * ld-elf/flags1.d: Expect this test to pass on the MSP430. * ld-elf/init-fini-arrays.d: Expect this test to fail on the MSP430. * ld-elf/merge.d: Expect this test to pass on the MSP430. * ld-elf/sec64k.exp: Skip these tests for the MSP430. * ld-gc/pr13683.d: Expect this test to fail on the MSP430. * ld-srec/srec.exp: Expect these tests to fail on the MSP430. * ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to fail on the MSP430. * msp430-dis.c: Add support for MSP430X instructions.
2013-05-01 bfd/Maciej W. Rozycki2-1/+6
* config.bfd: Replace alpha*-*-linuxecoff* pattern with alpha*-*-linux*ecoff*. binutils/testsuite/ * lib/binutils-common.exp (is_elf_format): Also exclude *-*-linux*ecoff*. gas/ * configure.tgt: Replace alpha*-*-linuxecoff* pattern with alpha*-*-linux*ecoff*. ld/ * configure.tgt: Replace alpha*-*-linuxecoff* pattern with alpha*-*-linux*ecoff*. Update the `sed' pattern used to convert from alpha*-*-linux-* to alpha*-*-linux*ecoff*.
2013-05-012013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu4-0/+23
* gas/mips/ext-ill.s: New file. * gas/mips/ext-ill.l: New file. * gas/mips/mips.exp: Run new tests.
2013-05-012013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu2-5/+13
* config/tc-mips.c (mips_ip): Add sizelo. For "+C", "+G", and "+H", set sizelo and compare against it.
2013-04-29 * elflink.c (_bfd_elf_gc_mark_extra_sections): Remove mark fromNick Clifton8-24/+94
fragmented .debug_line sections associated with unmarked code sections. * dwarf.c (read_debug_line_header): New function. Reads in a header in a .debug_line section. (display_debug_lines_raw): Use new function. Handle fragmentary .debug_line sections. (display_debug_lines_decoded): Likewise. * readelf.c (process_section_headers): Handle fragmenatry .debug_line sections. (display_debug_section): Likewise. * as.c (Options): Add -gdwarf-sections. (parse_args): Likewise. * as.h (flag_dwarf_sections): Declare. * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes. (process_entries): When -gdwarf-sections is enabled generate fragmentary .debug_line sections. (out_debug_line): Set the section for the .debug_line section end symbol. * doc/as.texinfo: Document -gdwarf-sections. * NEWS: Mention -gdwarf-sections. * gas/elf/dwarf2-3.d: Fix expected readelf output. * scripttempl/DWARF.sc: Add support for .debug_line.* and .debug_line_end.
2013-04-26fix changelog entry: we still have 2013, not 2014Christian Groessler1-1/+1
2013-04-26 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdlineChristian Groessler2-7/+15
according to the target parameter. Don't call s_segm since s_segm calls bfd_set_arch_mach using stdoutput, but stdoutput isn't initialized yet. (md_begin): Call s_segm according to target parameter from command line.
2013-04-26Add missing test files from 2013-03-21 commit.Will Newton3-0/+22
2013-04-25bfd/Alan Modra3-12/+5
* config.bfd: Add powerpc64le-linux. gas/ * configure.in: Allow little-endian linux. * configure: Regenerate. gold/ * configure.tgt: Add powerpcle and powerpc64le. ld/ * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32lppclinux.c. (eelf32lppclinux.c): New rule. * Makefile.in: Regenerate. * configure.tgt: Merge powerpc-linux and other powerpc-elf targets with corresponding little-endian targets. * emulparams/elf32lppc.sh: Update comment. * emulparams/elf32lppclinux.sh: New.
2013-04-242013-04-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2-1/+6
gas/ * config/tc-nios2.c (nios2_control_register_arg_p): Rename "fstatus" control register to "eccinj". opcodes/ * nios2-opc.c (nios2_builtin_reg): Rename "fstatus" control register to "eccinj".
2013-04-24Enable x32 for x86_64-*-elf*H.J. Lu3-0/+7
This patch enables x32 for x86_64-*-elf* for embedded target and disables rex tests since it uses '/' as prefix separator which is `\' for x86_64-*-elf*. bfd/ * config.bfd (targ_selvecs): Add bfd_elf32_x86_64_vec for x86_64-*-elf*. gas/testsuite/ * gas/i386/rex.d: Skip x86_64-*-elf*. * gas/i386/ilp32/rex.d: Likewise. ld/ * configure.tgt (targ_extra_emuls): Adds elf32_x86_64 for x86_64-*-elf*. (targ_extra_libpath): Likewise. (tdir_elf_i386): Replace x86_64 with i386 for x86_64-*-elf*.
2013-04-19 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.Kai Tietz2-1/+9
2013-04-15 gas/Julian Brown16-75/+91
* expr.c (add_to_result, subtract_from_result): Make global. * expr.h (add_to_result, subtract_from_result): Add prototypes. * config/tc-sh.c (sh_optimize_expr): Use add_to_result, subtract_from_result to handle extra bit of precision for .sleb128 directive operands. gas/testsuite/ * gas/all/gas.exp (sleb128-7): Don't run for tic4x, tic54x. * gas/all/sleb128-2.s: Reformat, use _ at start of labels, remove cruft. * gas/all/sleb128-3.s: Likewise. * gas/all/sleb128-4.s: Likewise. * gas/all/sleb128-5.s: Likewise. * gas/all/sleb128-7.s: Likewise. * gas/all/sleb128-2.d: Handle data sections named $DATA$. * gas/all/sleb128-3.d: Likewise. * gas/all/sleb128-4.d: Likewise. * gas/all/sleb128-5.d: Likewise. * gas/all/sleb128-7.d: Likewise.
2013-04-11 gas/Julian Brown16-17/+202
* read.c (convert_to_bignum): Add sign parameter. Use it instead of X_unsigned to determine sign of resulting bignum. (emit_expr): Pass extra argument to convert_to_bignum. (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass X_extrabit to convert_to_bignum. (parse_bitfield_cons): Set X_extrabit. * expr.c (make_expr_symbol, expr_build_uconstant, operand): Initialise X_extrabit field as appropriate. (add_to_result): New. (subtract_from_result): New. (expr): Use above. * expr.h (expressionS): Add X_extrabit field. gas/testsuite/ * gas/all/sleb128-2.s: New test. * gas/all/sleb128-3.s: Likewise. * gas/all/sleb128-4.s: Likewise. * gas/all/sleb128-5.s: Likewise. * gas/all/sleb128-7.s: Likewise. * gas/all/sleb128-2.d: New. * gas/all/sleb128-3.d: New. * gas/all/sleb123-4.d: New. * gas/all/sleb123-5.d: New. * gas/all/sleb123-7.d: New. * gas/all/gas.exp (sleb128-2, sleb128-3, sleb128-4, sleb128-5) (sleb128-7): Run new tests.
2013-04-10gas/Jan Beulich6-20/+52
2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base register being PC when is_t or writeback, and use distinct diagnostic for the latter case. gas/testsuite/ 2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/testsuite/gas/arm/ldst-pc.s: Add index, non-writeback forms of various loads and stores with PC as base. * gas/testsuite/gas/arm/ldst-pc.d: Update accordingly.
2013-04-10gas/Jan Beulich11-139/+48
2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (parse_operands): Re-write po_barrier_or_imm(). (do_barrier): Remove bogus constraint(). (do_t_barrier): Remove. gas/testsuite/ 2013-04-10 Jan Beulich <jbeulich@suse.com> * gas/arm/barrier-bad.d: Change title. * gas/arm/barrier-bad.s: Add immediate form of ISB and DSB as well as one symbolic form of DSB. * gas/arm/barrier-bad.l: Update accordingly. * gas/arm/barrier-bad-thumb.d: Adjust title. Use barrier-bad.s as source. Pass -mthumb to gas. * gas/arm/barrier-bad-thumb.l: Remove. * gas/arm/barrier-bad-thumb.s: Remove. * gas/arm/barrier-thumb.d: Adjust title. Use barrier.s as source. Pass -mthumb to gas. * gas/arm/barrier-thumb.s: Remove.
2013-04-09 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,Nick Clifton3-17/+34
ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2, ATmega2564RFR2 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
2013-04-09gas/Jan Beulich5-34/+40
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_vmrs): Accept all control registers. Use local variable Rt in more places. (do_vmsr): Accept all control registers. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/vfp1xD.s: Add VMRS/VMSR tests with FPINST, FPINST2, and C15. * gas/arm/vfp1xD.d: Update accordingly.
2013-04-09gas/Jan Beulich5-0/+38
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix if there was none specified for moves between scalar and core register. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-omit.s: Add tests for suffix less VMOV. * gas/arm/neon-omit.d: Update accordingly.
2013-04-09gas/Jan Beulich5-9/+33
2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the NEON_ALL_LANES case. gas/testsuite/ 2013-04-09 Jan Beulich <jbeulich@suse.com> * gas/arm/neon-addressing-bad.s: Add test for further invalid VST operands. * gas/arm/neon-addressing-bad.l: Update accordingly.
2013-04-08gas/testsuite/Jan Beulich4-7/+24
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-opcode.s: Flesh out LOOP and J*CXZ sections. Correct comments in Jcc section. * gas/i386/x86-64-opcode.d: Refresh. * gas/i386/ilp32/x86-64-opcode.d: Refresh. opcodes/ 2013-04-08 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Fold 64-bit and non-64-bit jecxz entries. * i386-tbl.h: Re-generate.
2013-04-08gas/Jan Beulich2-3/+8
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for PC-relative VSTR.
2013-04-08gas/Jan Beulich2-1/+6
2013-04-08 Jan Beulich <jbeulich@suse.com> * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq entry to sp_fiq.
2013-04-06Increase the accuracy of sparc instruction aliases.David S. Miller15-103/+274
Make current with UA2011 specification. Add an F_PREFERRED opcode flag that indicates a preferred alias when multiple aliases for the same opcode exists. For 'lzd': Add 'lzcnt' as primary instruction, and make 'lzd' an alias. Add 'ldtw', 'ldtwa', 'sttw', 'sttwa': The modern opcode for for 'ldd', 'ldda', 'std', and 'stda' on integer registers. Mark the latter now as aliases. For 'flush': Support "[address]" syntax as well as plain "address". Rework 'mov' aliases for 'wr': Eliminate bogus three operand moves, and encode the instructions properly for the "mov REG, %ASR" cases, specifically we should encode the register in rs2 not rs1 as per The SPARC V8 Architecture Manual. Add missing cbcond aliases: c{w,x}bz, c{w,x}blu, c{w,x}bnz, c{w,x}bgeu Add 'd' suffix VIS logical ops: The primary opcode for 'fzero' is now 'fzerod' (compare with 'fzeros'), for example. And thus 'fzero' is now an alias. Add modern opcodes for condition code setting edge instructions: They are now edgeN{,l}cc instead of plain edgeN{,l}. Add modern opcodes for VIS comparisons: All VIS comparisons now start with prefix "fp", retain the older variants as aliases. The signed variants for equal and not-equal have "u" aliases to show that these comparisons are equally suited for unsigned compares. Update existing test cases as needed, and add several new ones. include/opcode/ * sparc.h (F_PREFERRED): Define. (F_PREF_ALIAS): Define. opcodes/ * sparc-dis.c (compare_opcodes): When encountering multiple aliases of an opcode, prefer the one with F_PREFERRED set. * sparc-opc.c (sparc_opcodes): Add ldtw, ldtwa, sttw, sttwa, lzcnt, flush with '[address]' syntax, and missing cbcond pseudo ops. Make 64-bit VIS logical ops have "d" suffix in their names, mark existing mnenomics as aliases. Add "cc" suffix to edge instructions generating condition codes, mark existing mnenomics as aliases. Add "fp" prefix to VIS compare instructions, mark existing mnenomics as aliases. gas/testsuite/ * gas/sparc/cbcond.s: Add tests for new opcode aliases. * gas/sparc/cbcond.d: Updated. * gas/sparc/hpcvis3.s: Add tests for new opcode aliases. * gas/sparc/hpcvis3.d: Updated. * gas/sparc/v8-movwr-imm.d: Fix expected disassembly. * gas/sparc/edge.s: New test. * gas/sparc/edge.d: Expected disassembly. * gas/sparc/flush.s: New test. * gas/sparc/flush.d: Expected disassembly. * gas/sparc/ldd_std.s: New test. * gas/sparc/ldd_std.d: Expected disassembly. * gas/sparc/ldtw_sttw.s: New test. * gas/sparc/ldtw_sttw.d: Expected disassembly. * gas/sparc/sparc.exp: Run new tests.
2013-04-04oops - omitted from previous deltaNick Clifton1-0/+5
2013-04-03 * doc/as.texinfo: Add support to generate man options for h8300.Alan Modra3-1/+27
* doc/c-h8300.texi: Likewise.
2013-03-28Add support for Cortex-A53 and Cortex-A57.Ramana Radhakrishnan2-0/+9
2013-03-28 PR binutils/15068Nick Clifton3-22/+29
* tic6x-opcode-table.h: Fix patterns for add, ldnw and xor. * gas/tic6x/insns16-lsd-unit.s: Correct bit patterns for mvk, add and xor. * gas/tic6x/insns16-lsd-unit.d: Update expected output.
2013-03-27Properly check address mode for SIBH.J. Lu3-0/+7
gas/testsuite/ * gas/i386/addr32.s: Add an SIB test. * gas/i386/addr32.d: Updated. opcodes/ * i386-dis.c (get_sib): Add the sizeflag argument. Properly check address mode. (print_insn): Pass sizeflag to get_sib.
2013-03-27 PR binutils/15068Nick Clifton23-24/+2827
* tic6x-dis.c: Add support for displaying 16-bit insns. * tic6xc-insn-formats.h (FLD): Add use of bitfield array. Add 16-bit opcodes. * tic6xc-opcode-table.h: Add 16-bit insns. * tic6x.h: Add support for 16-bit insns. * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array. * gas/tic6x/insns16-d-unit.s: New test. * gas/tic6x/insns16-d-unit.d: Expected disassembly. * gas/tic6x/insns16-ddec.s: New test. * gas/tic6x/insns16-ddec.d: Expected disassembly. * gas/tic6x/insns16-dinc.s: New test. * gas/tic6x/insns16-dinc.d: Expected disassembly. * gas/tic6x/insns16-dind.s: New test. * gas/tic6x/insns16-dind.d: Expected disassembly. * gas/tic6x/insns16-doff4.s: New test. * gas/tic6x/insns16-doff4.d: Expected disassembly. * gas/tic6x/insns16-l-unit.s: New test. * gas/tic6x/insns16-l-unit.d: Expected disassembly. * gas/tic6x/insns16-lsd-unit.s: New test. * gas/tic6x/insns16-lsd-unit.d: Expected disassembly. * gas/tic6x/insns16-m-unit.s: New test. * gas/tic6x/insns16-m-unit.d: Expected disassembly. * gas/tic6x/insns16-s-unit-pcrel.s: New test. * gas/tic6x/insns16-s-unit-pcrel.d: Expected disassembly. * gas/tic6x/insns16-s-unit: New test. * gas/tic6x/insns16-s-unit.d: Expected disassembly.
2013-03-26 PR gas/15295Nick Clifton2-25/+65
* listing.c (rebuffer_line): Rewrite to avoid seeking back to the start of the file each time.
2013-03-26 PR gas/15178Nick Clifton2-1/+7
* config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for FreeBSD targets.
2013-03-26Fix typo in added CL entry.Tristan Gingold1-1/+1
2013-03-26gas/Tristan Gingold7-14/+43
2013-03-26 Douglas B Rupp <rupp@gnat.com> * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment after fixup. gas/testsuite/ 2013-03-26 Douglas B Rupp <rupp@adacore.com * gas/ia64/ia64.exp: Add new test reloc-mlx * gas/ia64/reloc-mlx.[sd]: New test for X-unit reloc. * gas/ia64/pcrel.d: Fix output for X-unit reloc.
2013-03-21gas/ChangeLog:Will Newton8-96/+53
2013-03-21 Will Newton <will.newton@linaro.org> * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all pc-relative str instructions in Thumb mode. gas/testsuite/ChangeLog: 2013-03-21 Will Newton <will.newton@linaro.org> * gas/arm/thumb2_relax.d: Strip out invalid pc-relative strs. * gas/arm/thumb2_relax.s: Likewise. * gas/arm/thumb32.d: Likewise. * gas/arm/thumb32.l: Likewise. * gas/arm/thumb32.s: Likewise. * gas/arm/thumb2_str-bad.d: New file. * gas/arm/thumb2_str-bad.l: Likewise. * gas/arm/thumb2_str-bad.s: Likewise.
2013-03-21 * elf32-h8300 (h8_relax_section): Add new relaxation of movNick Clifton3-14/+32
@(disp:32,ERx) to mov @(disp:16,ERx). (R_H8_DISP32A16): New reloc. Comments added and corrected. * reloc.c (BFD_RELOC_H8_DISP32A16): New reloc. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * ld.texinfo (H8/300): Add description of relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx). * ld-h8300/h8300.exp: Add new relax-7 test on ELF. * ld-h8300/relax-2.s: Add other direction and .w/.l variants of mov insns. * ld-h8300/relax-2.d: Update expected disassembly. * ld-h8300/relax-7a.s: New: tests for mov @(disp:32,ERx) -> mov @(disp:16,ERx). * ld-h8300/relax-7b.s: New: Likewise. * ld-h8300/relax-7.d: New: expected disassembly. * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc R_H8_DISP32A16. * config/tc-h8300.h: Remove duplicated defines.
2013-03-21 PR gas/15282Nick Clifton2-3/+19
* tc-avr.c (mcu_has_3_byte_pc): New function. (tc_cfi_frame_initial_instructions): Call it to find return address size.
2013-03-20 PR gas/15082Nick Clifton5-2/+13
* tic6x-opcode-table.h: Rename mpydp's specific operand type macro from ORREGD1324 to ORXREGD1324 and make it cross-path-able through tic6x_operand_xregpair operand coding type. Make mpydp instruction cross-path-able, ie: remove the FIXed 'x' opcode field, usu ORXREGD1324 for the src2 operand and remove the TIC6X_FLAG_NO_CROSS. * gas/tic6x/insns-bad-1.s: Remove test-case for mpydp with cross-path. * gas/tic6x/insns-bad-1.l: Update expected output. * gas/tic6x/insns-c674x.s: Add a test-case for mpydp with cross-path. * gas/tic6x/insns-c674x.d: Update expected output.
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