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2014-11-20[AArch64] Fix mis-detection of unpredictable load/store operations with FP regs.Richard Earnshaw3-11/+25
* config/tc-aarch64.c (warn_unpredictable_ldst): Check that transfer registers are in the GP register set. Adjust warnings. Use correct field member for address register. * testsuite/gas/aarch64/diagnostic.l: Update.
2014-11-19[AArch64] Warn on load pair to same registerJiong Wang5-0/+68
2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * config/tc-aarch64.c (md_assemble): Call warn_unpredictable_ldst. (warn_unpredictable_ldst): New. 2014-11-19 Ryan Mansfield <rmansfield@qnx.com> * gas/aarch64/diagnostic.s: Add new warnings test patterns. * gas/aarch64/diagnostic.l: Update expected diagnostic output.
2014-11-18Add -z bndplt to generate BND prefix in PLT entriesIgor Zamyatin6-64/+58
This patch adds "-z bndplt" option Linux/x86-64 linker to generate BND prefix in PLT entries. It also updated Linux/x86-64 assembler not to generate R_X86_64_PLT32_BND nor R_X86_64_PC32_BND relocations. bfd/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * elf64-x86-64.c (elf_x86_64_check_relocs): Enable MPX PLT only for -z bndplt. gas/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * config/tc-i386-intel.c (i386_operator): Remove last argument from lex_got call. * config/tc-i386.c (reloc): Remove bnd_prefix from parameters' list. Return always BFD_RELOC_32_PCREL. * (output_branch): Remove condition for BFD_RELOC_X86_64_PC32_BND. * (output_jump): Update call to reloc accordingly. * (output_interseg_jump): Likewise. * (output_disp): Likewise. * (output_imm): Likewise. * (x86_cons_fix_new): Likewise. * (lex_got): Remove bnd_prefix from parameters' list in macro and declarations. Don't use BFD_RELOC_X86_64_PLT32_BND. * (x86_cons): Update call to lex_got accordingly. * (i386_immediate): Likewise. * (i386_displacement): Likewise. * (md_apply_fix): Don't use BFD_RELOC_X86_64_PLT32_BND nor BFD_RELOC_X86_64_PC32_BND. * (tc_gen_reloc): Likewise. include/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * bfdlink.h (struct bfd_link_info): Add bndplt. ld/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * emulparams/elf_x86_64.sh (BNDPLT): Set to yes for x86_64. * emultempl/elf32.em (gld${EMULATION_NAME}_handle_option): Handle "-z bndplt" if BNDPLT is yes. (gld${EMULATION_NAME}_list_options): Add "-z bndplt" entry. * ld.texinfo: Add description for bndplt. ld/testsuite/ 2014-11-18 Igor Zamyatin <igor.zamyatin@intel.com> * testsuite/ld-x86-64/bnd-ifunc-1.d: Add bndplt option. * testsuite/ld-x86-64/bnd-ifunc-2.d: Likewise. * testsuite/ld-x86-64/bnd-plt-1.d: Likewise. Update dissassembly sections. * testsuite/ld-x86-64/mpx.exp: Handle mpx3 and mpx4 tests. * testsuite/ld-x86-64/mpx1a.rd: Remove _BND from relocation name. * testsuite/ld-x86-64/mpx1c.rd: Likewise. * testsuite/ld-x86-64/mpx2a.rd: Likewise. * testsuite/ld-x86-64/mpx2c.rd: Likewise. * testsuite/ld-x86-64/mpx3.dd: New file. * testsuite/ld-x86-64/mpx3a.s: Likewise. * testsuite/ld-x86-64/mpx3b.s: Likewise. * testsuite/ld-x86-64/mpx4.dd: Likewise. * testsuite/ld-x86-64/mpx4a.s: Likewise. * testsuite/ld-x86-64/mpx4b.s: Likewise.
2014-11-18aarch64: allow adding/removing just feature flags via .arch_extensionJan Beulich7-12/+111
Rather than requiring to always also set/change the base architecture, allow just en-/disabling of architecture extensions, matching what ARM has.
2014-11-18[AArch64] Add xgene2.Philipp Tomsich3-1/+9
2014-11-18[AArch64] Add xgene1.Philipp Tomsich3-1/+10
The name xgene1 superceeds xgene-1. We retain support for the original xgene-1 for compatibility but drop it from documentation.
2014-11-17Add AVX512VBMI instructionsIlya Tocar17-1/+1585
gas/ * config/tc-i386.c (cpu_arch): Add .avx512vbmi. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpermi2b, vpermt2b, vpermb, vpmultishiftqb. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F3883, EVEX_W_0F3883_P_2. * i386-gen.c (cpu_flag_init): Add CPU_AVX512VBMI_FLAGS. (cpu_flags): Add CpuAVX512VBMI. * i386-opc.h (enum): Add CpuAVX512VBMI. (i386_cpu_flags): Add cpuavx512vbmi. * i386-opc.tbl: Add vpmadd52luq, vpmultishiftqb, vpermb, vpermi2b, vpermt2b. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512vbmi-intel.d: New file. * gas/i386/avx512vbmi.d: Likewise. * gas/i386/avx512vbmi.s: Likewise. * gas/i386/avx512vbmi_vl-intel.d: Likewise. * gas/i386/avx512vbmi_vl.d: Likewise. * gas/i386/avx512vbmi_vl.s: Likewise. * gas/i386/x86-64-avx512vbmi-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi.d: Likewise. * gas/i386/x86-64-avx512vbmi.s: Likewise. * gas/i386/x86-64-avx512vbmi_vl-intel.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.d: Likewise. * gas/i386/x86-64-avx512vbmi_vl.s: Likewise.
2014-11-17Add AVX512IFMA instructionsIlya Tocar17-1/+1141
gas/ * config/tc-i386.c (cpu_arch): Add .avx512ifma. * doc/c-i386.texi: Document it. opcodes/ * i386-dis-evex.c (evex_table): Add vpmadd52luq, vpmadd52huq. * i386-dis.c (PREFIX enum): Add PREFIX_EVEX_0F38B4, PREFIX_EVEX_0F38B5. * i386-gen.c (cpu_flag_init): Add CPU_AVX512IFMA_FLAGS. (cpu_flags): Add CpuAVX512IFMA. * i386-opc.h (enum): Add CpuAVX512IFMA. (i386_cpu_flags): Add cpuavx512ifma. * i386-opc.tbl: Add vpmadd52huq, vpmadd52luq. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/avx512ifma-intel.d: New file. * gas/i386/avx512ifma.d: Likewise. * gas/i386/avx512ifma.s: Likewise. * gas/i386/avx512ifma_vl-intel.d: Likewise. * gas/i386/avx512ifma_vl.d: Likewise. * gas/i386/avx512ifma_vl.s: Likewise. * gas/i386/x86-64-avx512ifma-intel.d: Likewise. * gas/i386/x86-64-avx512ifma.d: Likewise. * gas/i386/x86-64-avx512ifma.s: Likewise. * gas/i386/x86-64-avx512ifma_vl-intel.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.d: Likewise. * gas/i386/x86-64-avx512ifma_vl.s: Likewise.
2014-11-17Add pcommit instructionIlya Tocar11-2/+99
gas/ * config/tc-i386.c (cpu_arch): Add .pcommit. * doc/c-i386.texi: Document it. /opcodes * i386-dis.c (PREFIX enum): Add PREFIX_RM_0_0FAE_REG_7. (prefix_table): Add pcommit. * i386-gen.c (cpu_flag_init): Add CPU_PCOMMIT_FLAGS. (cpu_flags): Add CpuPCOMMIT. * i386-opc.h (enum): Add CpuPCOMMIT. (i386_cpu_flags): Add cpupcommit. * i386-opc.tbl: Add pcommit. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. /gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/pcommit-intel.d: New file. * gas/i386/pcommit.d: Likewise. * gas/i386/pcommit.s: Likewise. * gas/i386/x86-64-pcommit-intel.d: Likewise. * gas/i386/x86-64-pcommit.d: Likewise. * gas/i386/x86-64-pcommit.s: Likewise.
2014-11-17Add clwb instructionIlya Tocar11-0/+111
gas/ * config/tc-i386.c (cpu_arch): Add .clwb. * doc/c-i386.texi: Document it. opcodes/ * i386-dis.c (PREFIX enum): Add PREFIX_0FAE_REG_6. (prefix_table): Add clwb. * i386-gen.c (cpu_flag_init): Add CPU_CLWB_FLAGS. (cpu_flags): Add CpuCLWB. * i386-opc.h (enum): Add CpuCLWB. (i386_cpu_flags): Add cpuclwb. * i386-opc.tbl: Add clwb. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. gas/testsuite/ * gas/i386/i386.exp: Run new tests. * gas/i386/clwb-intel.d: New file. * gas/i386/clwb.d: Likewise. * gas/i386/clwb.s: Likewise. * gas/i386/x86-64-clwb-intel.d: Likewise. * gas/i386/x86-64-clwb.d: Likewise. * gas/i386/x86-64-clwb.s: Likewise.
2014-11-14Correct x86 assembler manualH.J. Lu3-23/+30
* config/tc-i386.c (cpu_arch): Re-arrange avx512* and xsave* items. * doc/c-i386.texi: Re-arrange avx512* and xsave*. Add clflushopt and se1. Remove duplicated entries.
2014-11-14[AArch64] Enable CRC feature in GAS for cortex-a53 and cortex-a57.Marcus Shawcroft2-3/+10
2014-11-13Add assembler support for @gotpltH.J. Lu6-0/+44
Obsolete R_X86_64_GOTPLT64 and treat it the same as R_X86_64_GOT64. bfd/ PR gas/17598 * elf64-x86-64.c (elf_x86_64_check_relocs): Treat R_X86_64_GOTPLT64 the same as R_X86_64_GOT64. (elf_x86_64_relocate_section): Likewise. gas/ PR gas/17598 * config/tc-i386.c (reloc): Support BFD_RELOC_X86_64_GOTPLT64. gas/testsuite/ PR gas/17598 * gas/i386/reloc64.s: Add @gotplt check. * gas/i386/reloc64.d: Updated. * gas/i386/reloc64.l: Likewise. ld/testsuite/ PR gas/17598 * ld-x86-64/x86-64.exp: Run gotplt1. * ld-x86-64/gotplt1.d: New file. * ld-x86-64/gotplt1.s: Likewise.
2014-11-13More fixes for memory access violations whilst scanning corrupt binaries.Nick Clifton2-0/+7
PR binutils/17512 * config/obj-coff.c (coff_obj_symbol_new_hook): Set the is_sym field. * coffcode.h (coff_ptr_struct): Add is_sym field. (coff_new_section_hook): Set the is_sym field. (coff_pointerize_aux_hook): Check the is_sym field. (coff_print_aux): Likewise. (coff_compute_section_file_positions): Likewise. (coff_write_object_contents): Likewise. (coff_slurp_line_table): Likewise. (coff_slurp_symbol_table): Likewise. (CALC_ADDEND): Likewise. * coffgen.c (coff_renumber_symbols): Likewise. (coff_mangle_symbols): Likewise. (coff_fix_symbol_name): Likewise. (coff_write_symbol): Likewise. (coff_write_alien_symbol): Likewise. (coff_write_native_symbol): Likewise. (coff_write_symbols): Likewise. (coff_write_linenumbers): Likewise. (coff_pointerize_aux): Likewise. (coff_get_normalized_symtab): Likewise. (coff_get_symbol_info): Likewise. (bfd_coff_get_syment): Likewise. (bfd_coff_get_auxent): Likewise. (coff_print_symbol): Likewise. (coff_find_nearest_line_with_names): Likewise. (bfd_coff_set_symbol_class): Likewise. (coff_make_empty_symbol): Set the is_sym field. (coff_bfd_make_debug_symbol): Likewise. * peicode.h (pe_ILF_make_a_symbol): Likewise. * libcoff.h: Regenerate. * libcoff-in.h: Regenerate.
2014-11-13[AArch64] Remove example processors from GAS.Marcus Shawcroft2-5/+4
2014-11-12Fix z80-coff build breakageAlan Modra2-0/+8
* config/tc-z80.c (parse_exp_not_indexed, parse_exp): Warning fixes.
2014-11-12Fix x86 non-ELF build breakageAlan Modra2-0/+8
PR ld/17482 * config/tc-i386.c (output_insn): Don't test x86_elf_abi when not ELF.
2014-11-11Updated French and Ukranian translations supplied by the Translation Project.Nick Clifton2-109/+144
* po/uk.po: Updated Ukranian translation. * po/fr.po: Updated French translation.
2014-11-07Fix a typo in gas/ChangeLogH.J. Lu1-1/+2
2014-11-07X32: Add REX prefix to encode R_X86_64_GOTTPOFFH.J. Lu5-0/+47
Structions with R_X86_64_GOTTPOFF relocation must be encoded with REX prefix even if it isn't required by destination register. Otherwise linker can't safely perform IE -> LE optimization. bfd/ PR ld/17482 * elf64-x86-64.c (elf_x86_64_relocate_section): Update comments for IE->LE transition. gas/ PR ld/17482 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix for structions with R_X86_64_GOTTPOFF relocation for x32 if needed. gas/testsuite/ PR ld/17482 * gas/i386/ilp32/x32-tls.d: New file. * gas/i386/ilp32/x32-tls.s: Likewise. ld/testsuite/ PR ld/17482 * ld-x86-64/tlsie4.dd: Updated.
2014-11-06Add mach parameter to nios2_find_opcode_hash.Sandra Loosemore2-1/+6
2014-11-06 Sandra Loosemore <sandra@codesourcery.com> include/opcode/ * nios2.h (nios2_find_opcode_hash): Add mach parameter to declaration. Fix obsolete comment. opcodes/ * nios2-dis.c (nios2_find_opcode_hash): Add mach parameter. (nios2_disassemble): Adjust call to nios2_find_opcode_hash. gas/ * config/tc-nios2.c (nios2_diagnose_overflow): Adjust call to nios2_find_opcode_hash.
2014-11-05Update .MIPS.abiflags to support MIPS R6Matthew Fortune6-0/+63
bfd/ * elfxx-mips.c (update_mips_abiflags_isa): Add E_MIPS_ARCH_32R6 and E_MIPS_ARCH_64R6 support. ld/testsuite/ * ld-mips-elf/abiflags-strip10-ph.d: New file. * ld-mips-elf/mips-eld.exp: Run the new test. gas/ * config/tc-mips.c (mips_elf_final_processing): Add INSN_ISA32R6 and INSN_ISA64R6 support. gas/testsuite/ * gas/mips/elf_arch_mips32r6.d: New file. * gas/mips/elf_arch_mips64r6.d: New file. * gas/mips/mips.exp: Run the new tests.
2014-11-04Don't use register keywordAlan Modra24-4044/+4308
* expr.c (expr_symbol_where): Don't use register keyword. * app.c (app_push, app_pop, do_scrub_chars): Likewise. * ecoff.c (add_string, add_ecoff_symbol, add_aux_sym_symint, add_aux_sym_rndx, add_aux_sym_tir, add_procedure, add_file, ecoff_build_lineno, ecoff_setup_ext, allocate_cluster. allocate_scope, allocate_vlinks, allocate_shash, allocate_thash, allocate_tag, allocate_forward, allocate_thead, allocate_lineno_list): Likewise. * frags.c (frag_more, frag_var, frag_variant, frag_wane): Likewise. * input-file.c (input_file_push, input_file_pop): Likewise. * input-scrub.c (input_scrub_push, input_scrub_next_buffer): Likewise. * subsegs.c (subseg_change): Likewise. * symbols.c (colon, symbol_table_insert, symbol_find_or_make) (dollar_label_name, fb_label_name): Likewise. * write.c (relax_align): Likewise. * config/tc-alpha.c (s_alpha_pdesc): Likewise. * config/tc-bfin.c (bfin_s_bss): Likewise. * config/tc-i860.c (md_estimate_size_before_relax): Likewise. * config/tc-m68hc11.c (md_convert_frag): Likewise. * config/tc-m68k.c (m68k_ip, crack_operand): Likewise. (md_convert_frag_1, s_even): Likewise. * config/tc-mips.c (mips_clear_insn_labels): Likewise. * config/tc-mn10200.c (md_begin): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-sh.c (sh_elf_cons): Likewise. * config/tc-tic4x.c (tic4x_cons, tic4x_stringer): Likewise. * config/m68k-parse.y (m68k_reg_parse): Likewise. Convert from K&R. (yylex, m68k_ip_op, yyerror): Convert from K&R.
2014-11-04Use frag_now_fix_octets in gas d10v, d30vAlan Modra3-7/+9
obstack_next_free is supposed to return a void* rather than the char* it does currently, so expressions involving pointer arithmetic need a cast. Avoid the issue. * config/tc-d10v.c (find_opcode): Call frag_now_fix_octets rather than equivalent obstack_next_free expression. * config/tc-d30v.c (find_format): Likewise.
2014-11-03Fixes a snafu checking the size of 20-bit immedaite values.Nick Clifton2-1/+6
* config/tc-msp430.c (msp430_srcoperand): Fix range test for 20-bit values.
2014-10-31MIPS: Add Octeon 3 supportNaveen H.S7-1/+66
binutils: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * readelf.c (print_mips_isa_ext): Print the value of Octeon3. gas: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * config/tc-mips.c (CPU_IS_OCTEON): Handle CPU_OCTEON3. (mips_cpu_info_table): Octeon3 enables virt ase. * doc/c-mips.texi: Document octeon3 as an acceptable value for -march=. gas/testsuite: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gas/mips/mips.exp: Add support for Octeon3 architecture. Also add in support for running Octeon3 tests. * gas/mips/octeon3.d: New test. * gas/mips/octeon3.s: New test source. opcodes: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * mips-dis.c (mips_arch_choices): Add octeon3. * mips-opc.c (IOCT): Include INSN_OCTEON3. (IOCT2): Likewise. (IOCT3): New define. (IVIRT): New define. (mips_builtin_opcodes): Add dmfgc0, dmtgc0, hypcall, mfgc0, mtgc0, tlbinv, tlbinvf, tlbgr, tlbgwi, tlbginv, tlbginvf, tlbgwr, tlbgp, tlti IVIRT instructions. Extend mtm0, mtm1, mtm2, mtp0, mtp1, mtp2 instructions to take another operand for IOCT3. bfd: 2014-10-31 Andrew Pinski <apinski@cavium.com> Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * archures.c: Add octeon3 for mips target. * bfd-in2.h: Regenerate. * bfd/cpu-mips.c: Define I_mipsocteon3. nfo_struct): Add octeon3 support. * bfd/elfxx-mips.c: (_bfd_elf_mips_mach): Add support for octeon3. (mips_set_isa_flags): Add support for octeon3. (bfd_mips_isa_ext): Add bfd_mach_mips_octeon3. (mips_mach_extensions): Make bfd_mach_mips_octeon3 an extension of bfd_mach_mips_octeon2. (print_mips_isa_ext): Print the value of Octeon3.
2014-10-31Add forgotten changelog entry.Andrew Pinski1-0/+7
2014-10-21 Andrew Pinski <apinski@cavium.com> * config/tc-aarch64.c (aarch64_cpus): Add thunderx. * doc/c-aarch64.texi: Document that thunderx is a valid processor name.
2014-10-30Remove the artificial limit on code alignment through the use of theDr Philipp Tomsich3-46/+35
fixed part of a fragment for output generation only, which required MAX_MEM_FOR_RS_ALIGN_CODE to be large enough to hold the maximum pad. * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define to 7. * config/tc-aarch64.c (aarch64_handle_align): Rewrite to handle large alignments with a constant fragment size of MAX_MEM_FOR_RS_ALIGN_CODE.
2014-10-29Updated/new translations provided by the Translations Project.Nick Clifton2-1/+19699
2014-10-23Refactoring/cleanup of nios2 opcodes and assembler code.Sandra Loosemore2-666/+508
2014-10-23 Sandra Loosemore <sandra@codesourcery.com> include/opcode/ * nios2.h (enum iw_format_type): New. (struct nios2_opcode): Update comments. Add size and format fields. (NIOS2_INSN_OPTARG): New. (REG_NORMAL, REG_CONTROL, REG_COPROCESSOR): New. (struct nios2_reg): Add regtype field. (GET_INSN_FIELD, SET_INSN_FIELD): Delete. (IW_A_LSB, IW_A_MSB, IW_A_SZ, IW_A_MASK): Delete. (IW_B_LSB, IW_B_MSB, IW_B_SZ, IW_B_MASK): Delete. (IW_C_LSB, IW_C_MSB, IW_C_SZ, IW_C_MASK): Delete. (IW_IMM16_LSB, IW_IMM16_MSB, IW_IMM16_SZ, IW_IMM16_MASK): Delete. (IW_IMM26_LSB, IW_IMM26_MSB, IW_IMM26_SZ, IW_IMM26_MASK): Delete. (IW_OP_LSB, IW_OP_MSB, IW_OP_SZ, IW_OP_MASK): Delete. (IW_OPX_LSB, IW_OPX_MSB, IW_OPX_SZ, IW_OPX_MASK): Delete. (IW_SHIFT_IMM5_LSB, IW_SHIFT_IMM5_MSB): Delete. (IW_SHIFT_IMM5_SZ, IW_SHIFT_IMM5_MASK): Delete. (IW_CONTROL_REGNUM_LSB, IW_CONTROL_REGNUM_MSB): Delete. (IW_CONTROL_REGNUM_SZ, IW_CONTROL_REGNUM_MASK): Delete. (OP_MASK_OP, OP_SH_OP): Delete. (OP_MASK_IOP, OP_SH_IOP): Delete. (OP_MASK_IRD, OP_SH_IRD): Delete. (OP_MASK_IRT, OP_SH_IRT): Delete. (OP_MASK_IRS, OP_SH_IRS): Delete. (OP_MASK_ROP, OP_SH_ROP): Delete. (OP_MASK_RRD, OP_SH_RRD): Delete. (OP_MASK_RRT, OP_SH_RRT): Delete. (OP_MASK_RRS, OP_SH_RRS): Delete. (OP_MASK_JOP, OP_SH_JOP): Delete. (OP_MASK_IMM26, OP_SH_IMM26): Delete. (OP_MASK_RCTL, OP_SH_RCTL): Delete. (OP_MASK_IMM5, OP_SH_IMM5): Delete. (OP_MASK_CACHE_OPX, OP_SH_CACHE_OPX): Delete. (OP_MASK_CACHE_RRS, OP_SH_CACHE_RRS): Delete. (OP_MASK_CUSTOM_A, OP_SH_CUSTOM_A): Delete. (OP_MASK_CUSTOM_B, OP_SH_CUSTOM_B): Delete. (OP_MASK_CUSTOM_C, OP_SH_CUSTOM_C): Delete. (OP_MASK_CUSTOM_N, OP_SH_CUSTOM_N): Delete. (OP_<insn>, OPX_<insn>, OP_MATCH_<insn>, OPX_MATCH_<insn>): Delete. (OP_MASK_<insn>, OP_MASK): Delete. (GET_IW_A, GET_IW_B, GET_IW_C, GET_IW_CONTROL_REGNUM): Delete. (GET_IW_IMM16, GET_IW_IMM26, GET_IW_OP, GET_IW_OPX): Delete. Include nios2r1.h to define new instruction opcode constants and accessors. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. (NUMOPCODES, NUMREGISTERS): Delete. * nios2r1.h: New file. opcodes/ * nios2-opc.c (nios2_builtin_regs): Add regtype field initializers. (nios2_builtin_opcodes): Rename to nios2_r1_opcodes. Use new MATCH_R1_<insn> and MASK_R1_<insn> macros in initializers. Add size and format initializers. Merge 'b' arguments into 'j'. (NIOS2_NUM_OPCODES): Adjust definition. (bfd_nios2_num_builtin_opcodes): Rename to nios2_num_r1_opcodes. (nios2_opcodes): Adjust. (bfd_nios2_num_opcodes): Rename to nios2_num_opcodes. * nios2-dis.c (INSNLEN): Update comment. (nios2_hash_init, nios2_hash): Delete. (OPCODE_HASH_SIZE): New. (nios2_r1_extract_opcode): New. (nios2_disassembler_state): New. (nios2_r1_disassembler_state): New. (nios2_init_opcode_hash): Add state parameter. Adjust to use it. (nios2_find_opcode_hash): Use state object. (bad_opcode): New. (nios2_print_insn_arg): Add op parameter. Use it to access format. Remove 'b' case. (nios2_disassemble): Remove special case for nop. Remove hard-coded instruction size. gas/ * config/tc-nios2.c (nios2_insn_infoS): Add constant_bits field. (nios2_arg_infoS, nios2_arg_hash, nios2_arg_lookup): Delete. (nios2_control_register_arg_p): Delete. (nios2_coproc_reg): Delete. (nios2_relax_frag): Remove hard-coded instruction size. (md_convert_frag): Use new insn accessor macros. (nios2_diagnose_overflow): Remove hard-coded instruction size. (md_apply_fix): Likewise. (bad_opcode): New. (nios2_parse_reg): New. (nios2_assemble_expression): Remove prev_reloc parameter. Adjust uses and callers. (nios2_assemble_arg_c): New. (nios2_assemble_arg_d): New. (nios2_assemble_arg_s): New. (nios2_assemble_arg_t): New. (nios2_assemble_arg_i): New. (nios2_assemble_arg_u): New. (nios2_assemble_arg_o): New. (nios2_assemble_arg_j): New. (nios2_assemble_arg_l): New. (nios2_assemble_arg_m): New. (nios2_assemble_args): New. (nios2_assemble_args_dst): Delete. (nios2_assemble_args_tsi): Delete. (nios2_assemble_args_tsu): Delete. (nios2_assemble_args_sto): Delete. (nios2_assemble_args_o): Delete. (nios2_assemble_args_is): Delete. (nios2_assemble_args_m): Delete. (nios2_assemble_args_s): Delete. (nios2_assemble_args_tis): Delete. (nios2_assemble_args_dc): Delete. (nios2_assemble_args_cs): Delete. (nios2_assemble_args_ds): Delete. (nios2_assemble_args_ldst): Delete. (nios2_assemble_args_none): Delete. (nios2_assemble_args_dsj): Delete. (nios2_assemble_args_d): Delete. (nios2_assemble_args_b): Delete. (nios2_arg_info_structs): Delete. (NIOS2_NUM_ARGS): Delete. (nios2_consume_arg): Remove insn parameter. Use new macros. Don't check register arguments here. Remove 'b' case. (nios2_consume_separator): Move check for missing separators to... (nios2_parse_args): ...here. Remove special case for optional arguments. (output_insn): Avoid using hard-coded insn size. (output_ubranch): Likewise. (output_cbranch): Likewise. (output_call): Use new macros. (output_addi): Likewise. (output_ori): Likewise. (output_xori): Likewise. (output_movia): Likewise. (md_begin): Remove nios2_arg_info_structs initialization. (md_assemble): Initialize constant_bits field. Use nios2_parse_args instead of looking up parse function in hash table. gdb/ * nios2-tdep.c (nios2_analyze_prologue): Use new instruction field accessors and constants from nios2 opcodes update. (nios2_get_next_pc): Likewise.
2014-10-22MIPS Documentation fixesMatthew Fortune3-10/+26
gas/ * doc/as.texinfo: Update the MIPS FP ABI descriptions. * doc/c-mips.texi: Spell check and correct throughout.
2014-10-21MIPS/GAS: Correct file option settings with `.insn'Maciej W. Rozycki6-0/+56
This makes sure `HAVE_CODE_COMPRESSION' evaluates correctly when the `.insn' directive is used at the beginning of a source file before any instructions have been produced and that ELF file header's MIPS16 and microMIPS ASE flags are set correctly in the case where no instructions have been produced other than with the said directive. gas/ * config/tc-mips.c (s_insn): Set file options. gas/testsuite/ * gas/mips/insn-opts.d: New test. * gas/mips/insn-opts.s: New test source. * gas/mips/mips.exp: Run the new test.
2014-10-21[AARCH64] Add thunderx support to gasAndrew Pinski2-0/+2
This patch adds -mcpu=thunderx support to gas. OK? Tested with no regressions. ChangeLog: * config/tc-aarch64.c (aarch64_cpus): Add thunderx. * doc/c-aarch64.texi: Document that thunderx is a valid processor name.
2014-10-21gas: avoid bogus warnings in false branches of conditionalJan Beulich5-7/+36
The construct being added to the cond.s test case otherwise triggered both the "missing closing ..." and the "stray ..." (twice) warnings in _find_end_of_line(). As that code fragments suggests, this is needed to support (include) files that can be used for both assembler .include and compiler #include directives.
2014-10-21ppc: enable msgclr and msgsnd on Power8Jan Beulich3-0/+9
According to my reading of the spec it was an oversight for them to not having got enabled when Power8 support got added.
2014-10-21aarch64: move bogus assertionJan Beulich2-12/+20
Asserting "idx" to be non-negative when subsequent code handles this case is bogus. In fact the assertion triggers e.g. when mistakenly using the arm32 comment character @ following an instruction. While doing this I also noticed that despite there being local variables "detail" and "idx", not all places where they could be used did actually make use of them, so this is being adjusted at once. Finally, for the code to be slightly more robust, also change comparisons against -1 to such checking for a (non-)negative value.
2014-10-18Fix PR17493, attempted output of *GAS `reg' section* symbolAlan Modra5-8/+21
The write.c change is to make gas report an error if reg_section symbols should leak in future. The tc-i386.c change is the real fix. Note that the error isn't the most helpful, "redefined symbol cannot be used on reloc", but I'm not inclined to improve what is really an internal gas error. reg_section symbols shouldn't leak.. gas/ PR 17493 * write.c (adjust_reloc_syms): Don't allow symbols in reg_section to be reduced to reg_section section symbol. * gas/config/tc-i386.c (i386_finalize_immediate): Reject all reg_section immediates. gas/testsuite/ * gas/i386/inval-equ-2.l: Adjust.
2014-10-17Fix bad @value references in MIPS documentationMatthew Fortune2-1/+5
gas/ * doc/c-mips.texi: Fix bad @value references.
2014-10-15Bump bfd version.Tristan Gingold2-10/+14
bfd/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.25.51 * configure: Regenerate. binutils/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2014-10-15 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2014-10-15ChangeLog typo fixAlan Modra1-1/+1
2014-10-15Fix memory overflow issue about strncatChen Gang2-1/+5
If src contains n or more bytes, strncat() writes n+1 bytes to dest (n from src plus the terminating null byte). Therefore, the size of dest must be at least strlen(dest)+n+1. * config/tc-tic4x.c (md_assemble): Correct strncat size.
2014-10-14Add NEWS markers for 2.25.Tristan Gingold2-0/+6
binutils/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25. gas/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25. ld/ 2014-10-14 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.25.
2014-10-14Avoid undefined behaviour with signed expressionsAlan Modra5-16/+26
PR 17453 bfd/ * libbfd.c (COERCE16, COERCE32, COERCE64): Use unsigned types. (EIGHT_GAZILLION): Delete. binutils/ * dwarf.c (read_leb128): Avoid signed overflow. (read_debug_line_header): Likewise. gas/ * config/tc-i386.c (fits_in_signed_long): Use unsigned param and expression to avoid signed overflow. (fits_in_signed_byte, fits_in_unsigned_byte, fits_in_unsigned_word, fits_in_signed_word, fits_in_unsigned_long): Similarly. * expr.c (operand <'-'>): Avoid signed overflow. * read.c (s_comm_internal): Likewise.
2014-10-14sparc-aout and sparc-coff breakageAlan Modra2-1/+7
* config/tc-sparc.c (sparc_md_end): Fix unused variable warnings.
2014-10-09This is a series of patches that add support for the SPARC M7 cpu toJose E. Marchesi15-66/+522
binutils. They were discussed and approved here: https://sourceware.org/ml/binutils/2014-10/msg00038.html
2014-09-292014-09-29 Terry Guo <terry.guo@arm.com>Terry Guo3-73/+88
* as.c (create_obj_attrs_section): Move it and call it from ... * write.c (create_obj_attrs_section): ... here. (subsegs_finish_section): Refactored.
2014-09-27Do away with hash table line lookup in dwarf2dbg.cAlan Modra7-18/+39
Hash lookup is silly when we can attach the line table info directly to sections instead. Worse, hash lookup fails when we have multiple sections with the same name. gas/ * dwarf2dbg.c (all_segs_hash): Delete. (get_line_subseg): Delete last_seg, last_subseg, last_line_subseg. Retrieve line_seg for section via seg_info. * subsegs.h (segment_info_typet): Add dwarf2_line_seg. gas/testsuite/ * gas/elf/group2.d, * gas/elf/group2.s: New test. * gas/elf/elf.exp: Run it.
2014-09-23Disallow VEX/EVEX encoded instructions in 16-bit modeH.J. Lu6-4/+57
gas/ PR gas/17421 * config/tc-i386.c (md_assemble): Disallow VEX/EVEX encoded instructions in 16-bit mode. gas/testsuite/ PR gas/17421 * gas/i386/i386.exp: Run inval-16. * gas/i386/inval-16.l: New file. * gas/i386/inval-16.s: Likewise.
2014-09-22Ignore MOD field for control/debug register moveH.J. Lu5-0/+51
This patch ignores the MOD field in control/debug register move instructions. gas/testsuite/ * gas/i386/cdr.d: New file. * gas/i386/cdr.s: Likewise. * gas/i386/x86-64-cdr.d: Likewise. * gas/i386/i386.exp: Run cdr and x86-64-cdr. opcodes/ * i386-dis.c (MOD_0F20): Removed. (MOD_0F21): Likewise. (MOD_0F22): Likewise. (MOD_0F23): Likewise. (dis386_twobyte): Replace MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23 with "movZ". (mod_table): Remove MOD_0F20, MOD_0F21, MOD_0F22 and MOD_0F23. (OP_R): Check mod/rm byte and call OP_E_register.
2014-09-22Fix various warnings seen when using gcc-5.0Alan Modra4-3/+11
* config/tc-m68k.c (md_assemble): Add assert to work around bogus trunk gcc warning. * config/tc-pj.h (md_convert_frag): Warning fix. * config/tc-xtensa.c (xg_assemble_vliw_tokens): Warning fix.
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