Age | Commit message (Collapse) | Author | Files | Lines |
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* gas/elf/groupautoa.d: Change test name.
* gas/elf/groupautob.d: Change test name.
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* gas/all/gas.exp: Don't run byte test on s390.
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* gas/i386/x86-64-relax-1.d: Remove label match, match pe output.
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* gas/i386/relax-2.s: Likewise.
* gas/i386/relax-1.d: Remove label match.
* gas/i386/relax-2.d: Likewise. Correct test name.
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* i386/relax-2.d: Likewise.
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* config/tc-mips.c (macro2): Delete.
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* gas/mips/mips32-dsp.d, gas/mips/mips32-dsp.s: Add madd, maddu, msub,
msubu, mult, multu.
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* elf32-tic6x.c: Add attribution.
gas/
* config/tc-tic6x.c: Add attribution.
opcodes/
* tic6x-dis.c: Add attribution.
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* config/obj-multi.h (obj_adjust_symtab): Define.
* config/obj-aout.c (aout_format_ops): Init new field.
* config/obj-coff.c (coff_format_ops): Likewise.
* config/obj-ecoff.c (ecoff_format_ops): Likewise.
* config/obj-elf.c (elf_format_ops): Likewise.
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2010-10-25 H.J. Lu <hongjiu.lu@intel.com>
PR gas/12049
* gas/i386/i386.exp: Run relax-1 and relax-2 for all 32bit
targets. Run x86-64-relax-1.
* gas/i386/x86-64-relax-1.d: New.
* gas/i386/x86-64-relax-1.s: Likewise.
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* write.c (relax_frag): Don't allow forward branches to temporarily
becomde backward branches.
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* gas/mips/eret-1.d: Handle ECOFF.
* gas/mips/eret-2.d: Likewise.
* gas/mips/eret-3.d: Likewise.
* gas/mips/mips.exp: Only run "aent" for ELF.
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macros to be tested, according to the "tsd", "tl_d", "ts_d",
"tldc1" and "tsdc1" symbols.
* gas/mips/sd.d: New test.
* gas/mips/ecoff@sd.d: Likewise, ECOFF version.
* gas/mips/mips1@ecoff@sd.d: Likewise, MIPS I/ECOFF version.
* gas/mips/r3000@ecoff@sd.d: Likewise, R3000/ECOFF version.
* gas/mips/r3900@ecoff@sd.d: Likewise, R3900/ECOFF version.
* gas/mips/mips2@ecoff@sd.d: Likewise, MIPS II/ECOFF version.
* gas/mips/mips32@ecoff@sd.d: Likewise, MIPS32/ECOFF version.
* gas/mips/mips32r2@ecoff@sd.d: Likewise, MIPS32r2/ECOFF
version.
* gas/mips/sd-forward.d: New test.
* gas/mips/ecoff@sd-forward.d: Likewise, ECOFF version.
* gas/mips/mips1@ecoff@sd-forward.d: Likewise, MIPS I/ECOFF
version.
* gas/mips/r3000@ecoff@sd-forward.d: Likewise, R3000/ECOFF
version.
* gas/mips/r3900@ecoff@sd-forward.d: Likewise, R3900/ECOFF
version.
* gas/mips/mips2@ecoff@sd-forward.d: Likewise, MIPS II/ECOFF
version.
* gas/mips/mips32@ecoff@sd-forward.d: Likewise, MIPS32/ECOFF
version.
* gas/mips/mips32r2@ecoff@sd-forward.d: Likewise, MIPS32r2/ECOFF
version.
* gas/mips/l_d.d: New test.
* gas/mips/mips1@l_d.d: Likewise, MIPS I version.
* gas/mips/r3000@l_d.d: Likewise, R3000 version.
* gas/mips/r3900@l_d.d: Likewise, R3900 version.
* gas/mips/l_d-forward.d: New test.
* gas/mips/mips1@l_d-forward.d: Likewise, MIPS I version.
* gas/mips/r3000@l_d-forward.d: Likewise, R3000 version.
* gas/mips/r3900@l_d-forward.d: Likewise, R3900 version.
* gas/mips/s_d.d: New test.
* gas/mips/mips1@s_d.d: Likewise, MIPS I version.
* gas/mips/r3000@s_d.d: Likewise, R3000 version.
* gas/mips/r3900@s_d.d: Likewise, R3900 version.
* gas/mips/s_d-forward.d: New test.
* gas/mips/mips1@s_d-forward.d: Likewise, MIPS I version.
* gas/mips/r3000@s_d-forward.d: Likewise, R3000 version.
* gas/mips/r3900@s_d-forward.d: Likewise, R3900 version.
* gas/mips/ldc1.d: New test.
* gas/mips/ldc1-forward.d: Likewise.
* gas/mips/sdc1.d: Likewise.
* gas/mips/sdc1-forward.d: Likewise.
* gas/mips/sd-n32.d: Likewise.
* gas/mips/sd-n64.d: Likewise.
* gas/mips/sd-f-n32.d: Likewise.
* gas/mips/sd-f-n64.d: Likewise.
* gas/mips/l_d-n32.d: Likewise.
* gas/mips/l_d-n64.d: Likewise.
* gas/mips/l_d-f-n32.d: Likewise.
* gas/mips/l_d-f-n64.d: Likewise.
* gas/mips/s_d-n32.d: Likewise.
* gas/mips/s_d-n64.d: Likewise.
* gas/mips/s_d-f-n32.d: Likewise.
* gas/mips/s_d-f-n64.d: Likewise.
* gas/mips/ldc1-n32.d: Likewise.
* gas/mips/ldc1-n64.d: Likewise.
* gas/mips/ldc1-f-n32.d: Likewise.
* gas/mips/ldc1-f-n64.d: Likewise.
* gas/mips/sdc1-n32.d: Likewise.
* gas/mips/sdc1-n64.d: Likewise.
* gas/mips/sdc1-f-n32.d: Likewise.
* gas/mips/sdc1-f-n64.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
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defined/declared (as appropriate) at the end of assembly, based
on the presence or not of the "forward" symbol.
* gas/mips/ld-forward.d: New test.
* gas/mips/mips1@ld-forward.d: Likewise. MIPS I version.
* gas/mips/r3000@ld-forward.d: Likewise, R3000 version.
* gas/mips/ecoff@ld-forward.d: Likewise, ECOFF version.
* gas/mips/r3900@ecoff@ld-forward.d: Likewise, R3900/ECOFF
version.
* gas/mips/mips2@ecoff@ld-forward.d: Likewise, MIPS II/ECOFF
version.
* gas/mips/mips32@ecoff@ld-forward.d: Likewise, MIPS32/ECOFF
version.
* gas/mips/mips32r2@ecoff@ld-forward.d: Likewise, MIPS32r2/ECOFF
version.
* gas/mips/ld-n32-forward.d: New test.
* gas/mips/ld-n64-forward.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
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* gas/mips/ld-n64.d: Likewise.
* gas/mips/mips.exp: Run the new tests.
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* gas/mips/mips1@ld.d: ... this.
* gas/mips/ld-ilocks.d: Rename to...
* gas/mips/ld.d: ... this.
* gas/mips/r3000@ld.d: New test, R3000 version.
* gas/mips/ecoff@ld.d: Likewise, ECOFF version.
* gas/mips/r3900@ecoff@ld.d: Likewise, R3900/ECOFF version.
* gas/mips/mips2@ecoff@ld.d: Likewise, MIPS II/ECOFF version.
* gas/mips/mips32@ecoff@ld.d: Likewise, MIPS32/ECOFF version.
* gas/mips/mips32r2@ecoff@ld.d: Likewise, MIPS32r2/ECOFF version.
* gas/mips/mips.exp: Remove "ld-ilocks" and run "ld" over all
architectures matching "mips1".
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of a file-format-specific test too.
(run_dump_test_arches): Pull elf, ecoff and aout variables for
use by the above.
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* gas/mips/ld.d: Adjust accordingly.
* gas/mips/ld-ilocks.d: Likewise
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* gas/mips/ld.d: Remove "-march=r4000" and "-mmips:4000" from
gas/objdump options.
* gas/mips/ld-ilocks.d: Add "-32" to gas options.
* gas/mips/mips.exp: Run the two cases with run_dump_test_arches.
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* gas/mips/ld.d: Adjust accordingly.
* gas/mips/ld-ilocks.d: Likewise.
* gas/mips/ld-ilocks-addr32.d: Remove file.
* gas/mips/mips.exp: Adjust accordingly.
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* gas/mips/ld-ilocks.d: Likewise.
* gas/mips/ld-ilocks-addr32.d: Likewise.
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* config/obj-elf.c (elf_adjust_symtab): New. Move group section
processing here from elf_frob_file. Ensure that group signature
symbols have the name of the group.
(elf_frob_file): Move group section processing to
elf_adjust_symtab.
* config/obj-elf.h (elf_adjust_symtab): Declare.
(obj_adjust_symtab): Define.
* config/tc-arm.c (arm_adjust_symtab): Call elf_adjust_symtab.
2010-10-23 Mark Mitchell <mark@codesourcery.com>
* gas/elf/elf.exp: Add group0c test.
* gas/elf/group0c.d: New.
* gas/elf/group0a.d: Expect ".group" for the name of group
sections.
* gas/elf/group0b.d: Likewise.
* gas/elf/group1a.d: Likewise.
* gas/elf/group1b.d: Likewise.
* gas/elf/groupautoa.d: Likewise.
* gas/elf/groupautob.d: Likewise.
* gas/elf/section4.d: Likewise.
* gas/ia64/group-1.d: Likewise. Adjust hard-coded constants.
2010-10-22 Mark Mitchell <mark@codesourcery.com>
* binutils-all/group-5.d: Expect ".group" for the name of group
sections.
* binutils-all/strip-2.d: Likewise.
2010-10-23 Mark Mitchell <mark@codesourcery.com>
* ld-elf/group10.d: Expect ".group" for the name of group
sections.
* ld-elf/group2.d: Likewise.
* ld-elf/group7.d: Likewise.
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* emulparams/elf32_sparc_sol2.sh (OUTPUT_FORMAT): Set to
elf32-sparc-sol2.
* emulparams/elf64_sparc_sol2.sh (OUTPUT_FORMAT): Set to
elf64-sparc-sol2.
gas:
* config/tc-sparc.h [TE_SOLARIS] (ELF_TARGET_FORMAT): Define as
elf32-sparc-sol2.
(ELF64_TARGET_FORMAT): Define as elf64-sparc-sol2.
bfd:
* elfxx-sparc.c (tpoff): Define bed, static_tls_size.
Consider static_tls_alignment.
* elf32-sparc.c (TARGET_BIG_SYM): Redefine to
bfd_elf32_sparc_sol2_vec.
(TARGET_BIG_NAME): Redefine to elf32-sparc-sol2.
(elf32_bed): Redefine to elf32_sparc_sol2_bed.
(elf_backend_static_tls_alignment): Redefine to 8.
Include elf32-target.h.
(elf_backend_static_tls_alignment): Undef again for VxWorks.
* elf64-sparc.c (TARGET_BIG_SYM): Redefine to
bfd_elf64_sparc_sol2_vec.
(TARGET_BIG_NAME): Redefine to elf64-sparc-sol2.
(ELF_OSABI): Undef.
(elf64_bed): Redefine to elf64_sparc_sol2_bed.
(elf_backend_static_tls_alignment): Redefine to 16.
Include elf64-target.h.
* config.bfd (sparc-*-solaris2.[0-6]): Split from sparc-*-elf*.
Set targ_defvec to bfd_elf32_sparc_sol2_vec.
[BFD64] (sparc-*-solaris2*): Set targ_defvec to
bfd_elf32_sparc_sol2_vec.
Replace bfd_elf64_sparc_vec by bfd_elf64_sparc_sol2_vec in
targ_selvecs.
* configure.in: Handle bfd_elf32_sparc_sol2_vec,
bfd_elf64_sparc_sol2_vec.
* configure: Regenerate.
* targets.c (bfd_elf32_sparc_sol2_vec): Declare.
(bfd_elf64_sparc_sol2_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_sparc_sol2_vec,
bfd_elf64_sparc_sol2_vec.
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* gas/arm/msr-reg-thumb.d: Skip for non-ELF based targets.
* gas/arm/vldr.d: Likewise.
* gas/arm/thumb2_ldmstm.d: Allow for extra NOPs at the end of the disassembly.
* gas/cfi/cfi.exp (cfi-arm-1): Only run for ELF based ARM targets.
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* elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for
attribute renaming.
(elf_backend_obj_attrs_section): Change to ".c6xabi.attributes".
binutils:
* readelf.c (display_tic6x_attribute): Update for attribute
renaming.
gas:
* config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches,
md_assemble, tic6x_set_attributes): Update for attribute renaming.
* doc/c-tic6x.texi: Update for attribute renaming.
gas/testsuite:
* gas/tic6x/attr-arch-directive-1.d,
gas/tic6x/attr-arch-directive-2.d,
gas/tic6x/attr-arch-directive-3.d,
gas/tic6x/attr-arch-directive-4.d,
gas/tic6x/attr-arch-directive-4.s,
gas/tic6x/attr-arch-directive-5.d,
gas/tic6x/attr-arch-directive-5.s,
gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d,
gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d,
gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d,
gas/tic6x/attr-arch-opts-none-1.d,
gas/tic6x/attr-arch-opts-none-2.d,
gas/tic6x/attr-arch-opts-override-1.d,
gas/tic6x/attr-arch-opts-override-2.d: Update for attribute
renaming and renumbering.
include/elf:
* tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA,
value 4.
* tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for
attribute renaming.
ld:
* emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use
.c6xabi.attributes, not __TI_build_attributes.
ld/testsuite:
* ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d,
ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d,
ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d,
ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d,
ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d,
ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d,
ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d,
ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d,
ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d,
ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d,
ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d,
ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d,
ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d,
ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d,
ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d,
ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d,
ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d,
ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d:
Update for attribute renaming.
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2010-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR gas/12049
* gas/i386/i386.exp: Run relax-1 and relax-2.
* gas/i386/relax-1.d: New.
* gas/i386/relax-1.s: Likewise.
* gas/i386/relax-2.d: Likewise.
* gas/i386/relax-2.s: Likewise.
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leb128/align frags bouncing.
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* frags.h (struct frag): Add "region" field.
* write.c (relax_frag): Don't add "stretch" to forward reference
target if there is an intervening org or align.
(relax_segment): Set region.
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* gas/i386/disp32.d: Adjust initial symbol check.
* gas/i386/x86-64-disp32.d: Likewise.
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explicitly. Clean up some regexps.
* gas/mips/ld-ilocks.d: Likewise. Add missing "$" prefixes to
the names of FP registers.
* gas/mips/ld-ilocks-addr32.d: Likewise.
* gas/mips/ld.s: Align sections to 4k, adjust padding.
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* gas/mips/ld-ilocks.d: Likewise.
* gas/mips/ld-ilocks-addr32.d: Likewise.
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architecture to check against for an architecture-specific test
from the properties instead of the name passed.
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for absolute addressing.
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* mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB
macros before their corresponding MIPS III hardware instructions.
gas/
* config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Handle 64-bit ABIs.
gas/testsuite/
* gas/mips/lineno.s: Convert to o32.
* gas/mips/lineno.d: Adjust patterns accordingly. Force the o32
ABI.
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(s_change_sec): Handle it.
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gas/testsuite/
2010-10-16 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run x86-64-nops-1-g64.
* gas/i386/x86-64-nops-1.d: Remove -mtune=generic64.
* gas/i386/x86-64-nops-1-g64.d: New.
opcodes/
2010-10-16 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS.
* i386-init.h: Regenerated.
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Signed-off-by: David Gibson <david.gibson@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure all illegal insns get assembled & decoded correctly.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BYTEOP2M parser incorrectly calls BYTEOP2P to generate the opcode.
Once we've fixed that, it's easy to see that the disassembler also likes
to decode this insn incorrectly. So fix that and then add some tests.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The exact symbol addresses are not important to these tests. We only
care about the opcodes and the disassembly output. This makes adding
more insns to these tests easier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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gas/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (match_template): Check checkregsize
instead of w for register size check.
gas/testsuite/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run inval-reg.
* gas/i386/inval-reg.l: New.
* gas/i386/inval-reg.s: Likewise.
opcodes/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Add CheckRegSize.
* i386-opc.h (CheckRegSize): New.
(i386_opcode_modifier): Add checkregsize.
* i386-opc.tbl: Add CheckRegSize to instructions which
require register size check.
* i386-tbl.h: Regenerated.
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gas/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (_i386_insn): Add disp32_encoding.
(md_assemble): Don't call optimize_disp if disp32_encoding is
set.
(parse_insn): Support .d32 to force 32bit displacement.
(output_branch): Use BIG if disp32_encoding is set.
* doc/c-i386.texi: Document .d32 encoding suffix.
gas/testsuite/
2010-10-14 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/disp32.d: New.
* gas/i386/disp32.s: Likewise.
* gas/i386/x86-64-disp32.d: Likewise.
* gas/i386/x86-64-disp32.s: Likewise.
* gas/i386/i386.exp: Run disp32 and x86-64-disp32.
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* s390-opc.c: Make the instruction masks for the load/store on
condition instructions to cover the condition code mask as well.
* s390-opc.txt: lgoc -> locg and stgoc -> stocg.
2010-10-11 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/zarch-z196.d: Adjust the load/store on condition
instructions.
* gas/s390/zarch-z196.s: Likewise.
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Currently, trying to declare single letter variables in Blackfin assembly
can sometimes lead to parser errors if that letter is used for insn flags.
For example, X, Z, S, M, and T are used to change the behavior of insns:
R0 = 1; R0 = 1 (X); R0 = 1 (Z);
But the current parser just looks for single letter tokens rather than
ones that show up in the (FLAGS) field. So only match these letters as
flags when they're in parentheses.
Not a complete fix, but it at least lets gcc tests pass now (the test
gcc/testsuite/gcc.c-torture/compile/mangle-1.c to be exact). A complete
fix would require a significant parser rewrite in order to handle:
R0 = (x) (x); /* zero extend the address of the symbol "x" */
R0 = W; R0 = W[P0];
Signed-off-by: Steve Kilbane <steve.kilbane@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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insns
The current LOOP_BEGIN/LOOP_END pseudo insns hit parser errors when trying
to use numeric local labels. So add support for them.
Signed-off-by: David Gibson <david.gibson@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The current LOOP_BEGIN/LOOP_END pseudo insns hit "Internal errors" when
using local labels as the loop names due to attempts at removing them.
Signed-off-by: David Gibson <david.gibson@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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