aboutsummaryrefslogtreecommitdiff
path: root/gas
AgeCommit message (Collapse)AuthorFilesLines
2013-01-18Support size relocation only for ELFH.J. Lu2-0/+13
* config/tc-i386.c (reloc): Support size relocation only for ELF. (tc_i386_fix_adjustable): Likewise. (lex_got): Likewise. (tc_gen_reloc): Likewise.
2013-01-17include/opcode/Yufeng Zhang7-29/+553
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64.h (aarch64_op): Remove OP_V_MOVI_B. opcodes/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-asm.c (aarch64_ins_advsimd_imm_modified): Handle 8-bit MOVI. * aarch64-dis.c (aarch64_ext_advsimd_imm_modified): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): For AARCH64_MOD_LSL, move the range check on the shift amount before the alignment check; change to call set_sft_amount_out_of_range_error instead of set_imm_out_of_range_error. * aarch64-tbl.h (QL_SIMD_IMM_B): Replace NIL with LSL. (aarch64_opcode_table): Remove the OP enumerator from the asimdimm 8-bit MOVI entry; change the 2nd operand from SIMD_IMM to SIMD_IMM_SFT. gas/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (output_operand_error_record): Change to output the out-of-range error message as value-expected message if there is only one single value in the expected range. (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with LSL #0 as a programmer-friendly feature. gas/testsuite/ 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/diagnostic.l: Update. * gas/aarch64/movi.s: Add tests. * gas/aarch64/movi.d: Update. * gas/aarch64/programmer-friendly.s: Add comment.
2013-01-17Add x86 size relocation support to gasH.J. Lu25-3/+508
gas/ * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32. (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and BFD_RELOC_64_SIZE relocations. (lex_got): Support "symbol@SIZE" and don't create GOT symbol for it. (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64 relocations against local symbols. gas/testsuite/ * gas/i386/i386.exp: Run size-1, size-2, size-3, size-4, x86-64-size-1, x86-64-size-2, x86-64-size-3, x86-64-size-4, x86-64-size-5 and x86-64-size-inval-1. * gas/i386/size-1.d: New file. * gas/i386/size-1.s: Likewise. * gas/i386/size-2.d: Likewise. * gas/i386/size-2.s: Likewise. * gas/i386/size-3.d: Likewise. * gas/i386/size-3.s: Likewise. * gas/i386/size-4.d: Likewise. * gas/i386/size-4.s: Likewise. * gas/i386/x86-64-size-1.d: Likewise. * gas/i386/x86-64-size-2.d: Likewise. * gas/i386/x86-64-size-3.d: Likewise. * gas/i386/x86-64-size-4.d: Likewise. * gas/i386/x86-64-size-5.d: Likewise. * gas/i386/x86-64-size-5.s: Likewise. * gas/i386/x86-64-size-inval-1.l: Likewise. * gas/i386/x86-64-size-inval-1.s: Likewise. * gas/i386/ilp32/x86-64-size-1.d: Likewise. * gas/i386/ilp32/x86-64-size-2.d: Likewise. * gas/i386/ilp32/x86-64-size-3.d: Likewise. * gas/i386/ilp32/x86-64-size-4.d: Likewise. * gas/i386/ilp32/x86-64-size-5.d: Likewise. ld/testsuite/ * ld-size/size.exp: New file. * ld-size/size32-1-i386.d: Likewise. * ld-size/size32-1-x32.d: Likewise. * ld-size/size32-1-x86-64.d: Likewise. * ld-size/size32-1.s: Likewise. * ld-size/size32-2-i386.d: Likewise. * ld-size/size32-2-x32.d: Likewise. * ld-size/size32-2-x86-64.d: Likewise. * ld-size/size32-2.s: Likewise. * ld-size/size64-1-x32.d: Likewise. * ld-size/size64-1-x86-64.d: Likewise. * ld-size/size64-1.s: Likewise. * ld-size/size64-2-x32.d: Likewise. * ld-size/size64-2-x86-64.d: Likewise. * ld-size/size64-2.s: Likewise. * ld-size/size-3.c: Likewise. * ld-size/size-3.out: Likewise. * ld-size/size-3a.c: Likewise. * ld-size/size-3b.c: Likewise. * ld-size/size-3c.c: Likewise. * ld-size/size-4.out: Likewise. * ld-size/size-4a.c: Likewise. * ld-size/size-4b.c: Likewise. * ld-size/size-5.out: Likewise. * ld-size/size-5a.c: Likewise. * ld-size/size-5b.c: Likewise. * ld-size/size-6.out: Likewise. * ld-size/size-6a.c: Likewise. * ld-size/size-6b.c: Likewise. * ld-size/size-7.rd: Likewise. * ld-size/size-7a.c: Likewise. * ld-size/size-7b.c: Likewise. * ld-size/size-8.rd: Likewise. * ld-size/size-8a.c: Likewise. * ld-size/size-8b.c: Likewise.
2013-01-16 * gas/ppc/htm.d: Ignore padding at end of section.Alan Modra2-0/+5
2013-01-16 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line afterAlan Modra2-3/+8
finding some sort of toc syntax error, and break to avoid compiler uninit warning.
2013-01-15Increment length by 1 if the relocation token is removedH.J. Lu9-4/+40
gas/ PR gas/15019 * config/tc-i386.c (lex_got): Increment length by 1 if the relocation token is removed. gas/testsuite/ PR gas/15019 * gas/i386/reloc32.s: Add tests for "xtrn@got -/+ 4". * gas/i386/reloc64.s: Likewise. * gas/i386/ilp32/reloc64.s: Likewise. * gas/i386/reloc32.d: Updated. * gas/i386/reloc64.d: Likewise. * gas/i386/ilp32/reloc64.d: Likewise.
2013-01-15 * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton7-11/+27
V850E_IMMEDIATE. * gas/v850/basic.exp: Allow for variations in reloc names. * gas/v850/split-lo16.d: Likewise. * gas/v850/v850e1.s: Add more tests of the PREPARE insn. * gas/v850/v850e1.d: Update expected disassembly. * v850-dis.c (get_operand_value): Sign extend V850E_IMMEDIATE values. * v850-opc.c (IMM16LO): Add V850_OPERAND_SIGNED attribute.
2013-01-14 * gas/v850/basic.exp (reloc part 1): Pass -mgcc-abi to gas.Alan Modra3-3/+8
* gas/v850/split-lo16.d: Likewise.
2013-01-14 * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2-6/+10
* gas/metag/metadsp21.d: Fix expected MMOV disassembly.
2013-01-14 * gas/ppc/htm.s: Use .text rather than .section ".text".Alan Modra5-4/+11
* gas/ppc/power8.s: Likewise. * gas/ppc/htm.d: Don't match file format. * gas/ppc/power8.d: Likewise.
2013-01-11* config/tc-xgate.c (md_begin): Fix mistake made when going fromSean Keys2-1/+6
git to cvs.
2013-01-11oops - omitted from previous deltaNick Clifton23-0/+87155
2013-01-11include/opcode/Peter Bergner10-6/+129
* ppc.h (PPC_OPCODE_POWER8): New define. (PPC_OPCODE_HTM): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power8", "pwr8" and "htm" entries. * ppc-opc.c (HTM_R, HTM_SI, XRTRB_MASK, XRTRARB_MASK, XRTLRARB_MASK, XRTARARB_MASK, XRTBFRARB_MASK, XRCL, POWER8, PPCHTM): New defines. (SH6): Update. <"tabort.", "tabortdc.", "tabortdci.", "tabortwc.", "tabortwci.", "tbegin.", "tcheck", "tend.", "trechkpt.", "treclaim.", "tsr.">: Add POWER8 HTM opcodes. <"tendall.", "tresume.", "tsuspend.">: Add POWER8 HTM extended opcodes. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (ppc_handle_align): Handle power8's group ending nop. gas/testsuite/ * gas/ppc/htm.d: New test. * gas/ppc/htm.s: Likewise. * gas/ppc/power8.d: Likewise. * gas/ppc/power8.s: Likewise. * gas/ppc/ppc.exp: Run them.
2013-01-10* config/tc-xgate.c (md_begin): Fix the printing of opcodes soSean Keys2-2/+10
that the assember exits after the opcodes have been printed.
2013-01-10Remove trailing white spaces on gasH.J. Lu53-455/+510
* app.c: Remove trailing white spaces. * as.c: Likewise. * as.h: Likewise. * cond.c: Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.h: Likewise. * ecoff.c: Likewise. * input-file.c: Likewise. * itbl-lex.h: Likewise. * output-file.c: Likewise. * read.c: Likewise. * sb.c: Likewise. * subsegs.c: Likewise. * symbols.c: Likewise. * write.c: Likewise. * config/tc-i386.c: Likewise. * doc/Makefile.am: Likewise. * doc/Makefile.in: Likewise. * doc/c-aarch64.texi: Likewise. * doc/c-alpha.texi: Likewise. * doc/c-arc.texi: Likewise. * doc/c-arm.texi: Likewise. * doc/c-avr.texi: Likewise. * doc/c-bfin.texi: Likewise. * doc/c-cr16.texi: Likewise. * doc/c-d10v.texi: Likewise. * doc/c-d30v.texi: Likewise. * doc/c-h8300.texi: Likewise. * doc/c-hppa.texi: Likewise. * doc/c-i370.texi: Likewise. * doc/c-i386.texi: Likewise. * doc/c-i860.texi: Likewise. * doc/c-m32c.texi: Likewise. * doc/c-m32r.texi: Likewise. * doc/c-m68hc11.texi: Likewise. * doc/c-m68k.texi: Likewise. * doc/c-microblaze.texi: Likewise. * doc/c-mips.texi: Likewise. * doc/c-msp430.texi: Likewise. * doc/c-mt.texi: Likewise. * doc/c-s390.texi: Likewise. * doc/c-score.texi: Likewise. * doc/c-sh.texi: Likewise. * doc/c-sh64.texi: Likewise. * doc/c-tic54x.texi: Likewise. * doc/c-tic6x.texi: Likewise. * doc/c-v850.texi: Likewise. * doc/c-xc16x.texi: Likewise. * doc/c-xgate.texi: Likewise. * doc/c-xtensa.texi: Likewise. * doc/c-z80.texi: Likewise. * doc/internals.texi: Likewise.
2013-01-10gas/Roland McGrath4-16/+24
* hash.c (hash_new_sized): Make it global. * hash.h: Declare it. * macro.c (define_macro): Use hash_new_sized instead of hash_new, pass a small size.
2013-01-10 * common.h: Fix case of "Meta".Nick Clifton13-0/+7368
* metag.h: New file. * dis-asm.h (print_insn_metag): New declaration. * metag.h: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure: Regenerate. * configure.in: Add Meta. * disassemble.c: Add Meta support. * metag-dis.c: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * archures.c (bfd_mach_metag): New. * bfd-in2.h: Regenerate. * config.bfd: Add Meta. * configure: Regenerate. * configure.in: Add Meta. * cpu-metag.c: New file. * elf-bfd.h: Add Meta. * elf32-metag.c: New file. * elf32-metag.h: New file. * libbfd.h: Regenerate. * reloc.c: Add Meta relocations. * targets.c: Add Meta. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * config/tc-metag.c: New file. * config/tc-metag.h: New file. * configure.tgt: Add Meta. * doc/Makefile.am: Add Meta. * doc/Makefile.in: Regenerate. * doc/all.texi: Add Meta. * doc/as.texiinfo: Document Meta options. * doc/c-metag.texi: New file. * gas/metag/labelarithmetic.d: New file. * gas/metag/labelarithmetic.s: New file. * gas/metag/metacore12.d: New file. * gas/metag/metacore12.s: New file. * gas/metag/metacore21-invalid.l: New file. * gas/metag/metacore21-invalid.s: New file. * gas/metag/metacore21.d: New file. * gas/metag/metacore21.s: New file. * gas/metag/metacore21ext.d: New file. * gas/metag/metacore21ext.s: New file. * gas/metag/metadsp21-invalid.l: New file. * gas/metag/metadsp21-invalid.s: New file. * gas/metag/metadsp21.d: New file. * gas/metag/metadsp21.s: New file. * gas/metag/metadsp21ext.d: New file. * gas/metag/metadsp21ext.s: New file. * gas/metag/metafpu21.d: New file. * gas/metag/metafpu21.s: New file. * gas/metag/metafpu21ext.d: New file. * gas/metag/metafpu21ext.s: New file. * gas/metag/metag.exp: New file. * gas/metag/tls.d: New file. * gas/metag/tls.s: New file. * Makefile.am: Add Meta. * Makefile.in: Regenerate. * configure.tgt: Add Meta. * emulparams/elf32metag.sh: New file. * emultempl/metagelf.em: New file. * ld-elf/merge.d: Mark Meta as xfail. * ld-gc/start.d: Skip this test on Meta. * ld-gc/personality.d: Skip this test on Meta. * ld-metag/external.s: New file. * ld-metag/metag.exp: New file. * ld-metag/pcrel.d: New file. * ld-metag/pcrel.s: New file. * ld-metag/shared.d: New file. * ld-metag/shared.r: New file. * ld-metag/shared.s: New file. * ld-metag/stub.d: New file. * ld-metag/stub.s: New file. * ld-metag/stub_pic_app.d: New file. * ld-metag/stub_pic_app.r: New file. * ld-metag/stub_pic_app.s: New file. * ld-metag/stub_pic_shared.d: New file. * ld-metag/stub_pic_shared.s: New file. * ld-metag/stub_shared.d: New file. * ld-metag/stub_shared.r: New file. * ld-metag/stub_shared.s: New file. * binutils/readelf.c: (guess_is_rela): Add EM_METAG. (dump_relocations): Add EM_METAG. (get_machine_name): Correct case for Meta. (is_32bit_abs_reloc): Add support for Meta ADDR32 reloc. (is_none_reloc): Add support for Meta NONE reloc.
2013-01-092013-01-09 Steve Ellcey <sellcey@mips.com>Steve Ellcey3-17/+20
* config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal calls. * config/tc-mips.c (internalError): Remove, replace with abort.
2013-01-08gas/Yufeng Zhang5-3/+18
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (parse_operands): Change to compare the result of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'. gas/testsuite/ 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/diagnostic.s: Add test. * gas/aarch64/diagnostic.l: Update.
2013-01-07 PR gas/14887Nick Clifton4-6/+22
* config/tc-arm.c (skip_past_char): Skip whitespace before the anticipated character. * config/tc-arm.c (parse_address_main): Delete skip of whitespace here as it is no longer needed. PR gas/14887 * gas/arm/neon-ldst-es.s: Add more whitespace.
2013-01-06* doc/c-mips.texi (MIPS Opts): Fix use of @itemx.Andreas Schwab4-8/+14
* doc/c-score.texi (SCORE-Opts): Likewise. * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2013-01-04 * archures.c: Add support for MIPS r5900Nick Clifton10-47/+1190
* bfd-in2.h: Add support for MIPS r5900 * config.bfd: Add support for Sony Playstation 2 * cpu-mips.c: Add support for MIPS r5900 * elfxx-mips.c: Add support for MIPS r5900 (extension of r4000) * config/tc-mips.c: Add support for MIPS r5900 Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq. * config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot. * config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900. * config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I. * config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900. * configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu). * config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900. * elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software. * opcode/mips.h: Add support for r5900 instructions including lq and sq. * configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk). * emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32. * emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32. * Makefile.am: Add linker scripts for Sony Playstation 2 ELF files. * opcodes/mips-dis.c: Add names for CP0 registers of r5900. * opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq. * opcodes/mips-opc.c: Add support for MIPS r5900 CPU. Add support for 128 bit MMI (Multimedia Instructions). Add support for EE instructions (Emotion Engine). Disable unsupported floating point instructions (64 bit and undefined compare operations). Enable instructions of MIPS ISA IV which are supported by r5900. Disable 64 bit co processor instructions. Disable 64 bit multiplication and division instructions. Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)). Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900. Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04opcodes/Yufeng Zhang4-30/+35
2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-opc.c (aarch64_print_operand): Change to print AARCH64_OPND_IMM_MOV in hexadecimal in the instruction and in decimal in comment. * aarch64-tbl.h (aarch64_opcode_table): Remove the 'F_PSEUDO' flag from the opcode entries of OP_MOV_IMM_LOG, OP_MOV_IMM_WIDEN and OP_MOV_IMM_WIDE. gas/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/int-insns.d: Update. * gas/aarch64/mov.d: Update. * gas/aarch64/reloc-insn.d: Update. ld/testsuite/ 2013-01-04 Yufeng Zhang <yufeng.zhang@arm.com> * ld-aarch64/emit-relocs-264.d: Append the '-Mno-aliases' option to the objdump directive. * ld-aarch64/emit-relocs-266.d: Ditto. * ld-aarch64/emit-relocs-268.d: Ditto. * ld-aarch64/emit-relocs-269.d: Ditto. * ld-aarch64/emit-relocs-270.d: Ditto. * ld-aarch64/emit-relocs-271.d: Ditto. * ld-aarch64/emit-relocs-272.d: Ditto.
2013-01-04 * aarch64-opc.c (aarch64_prfops): Update to support PLIL1KEEP,Nick Clifton2-24/+28
PLIL1STRM, PLIL2KEEP, PLIL2STRM, PLIL3KEEP and PLIL3STRM. * gas/aarch64/system.d: Update.
2013-01-02Update copyright year to 2013H.J. Lu2-2/+6
binutils/ 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> * version.c (print_version): Update copyright year to 2013. gas/ 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> * as.c (parse_args): Update copyright year to 2013. ld/ 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> * ldver.c (ldversion): Update copyright year to 2013. opcodes/ 2013-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (process_copyright): Update copyright year to 2013.
2013-01-02gas/ Yufeng Zhang2-0/+7
2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53" and "cortex57".
2013-01-02 PR gas/14987Nick Clifton7-3735/+3782
* gas/arm/neon-ldst-es.s: Add whitespace test. * gas/arm/neon-ldst-es.d: Update expected disassembly. * config/tc-arm.c (parse_address_main): Skip whitespace before a closing bracket.
2012-12-20Fix commit date in previous commit.Richard Earnshaw1-1/+1
2012-12-202012-12-20 Greta Yorsh <Greta.Yorsh@arm.com>Richard Earnshaw9-198/+253
* config/tc-arm.c (rfefa,rfeea,rfeed): Fix encoding. (rfe,srs,srsea,srsfa,srsed,srsfd): Add missing mnemonics. * gas/arm/srs-t2.s: Add tests for missing srs modes. * gas/arm/srs-t2.l: Update expected output. * gas/arm/srs-arm.s: Add tests for missing srs modes. * gas/arm/srs-arm.l: Update expected output. * gas/arm/archv6.s: Add tests for missing rfe modes. * gas/arm/archv6.d: Update expected output.
2012-12-18PR ld/14736Michael Eager6-0/+118
bfd: * elf32-microblaze.c (calc_fixup): Add end range. gas/testsuite: * gas/microblaze/relax_size.exp: New file - test object size after linker relaxation * gas/microblaze/relax_size.s: Likewise * gas/microblaze/relax_size.elf: Likewise * gas/microblaze/relax_size2.s: Likewise * gas/microblaze/relax_size2.elf: Likewise
2012-12-17Add copyright noticesNick Clifton122-0/+2098
2012-12-11Microblaze: Add support for handling TLS symbol suffixes and generatingMichael Eager2-45/+165
TLS relocs for General Dynamic and Local Dynamic models. bfd/Changelog * reloc.c: Add new relocations * bfd-in2.h: Regenerated * libbfd.h: Regenerated * elf32-microblaze.c (microblaze_elf_howto_raw): Add TLS relocations (microblaze_elf_reloc_type_lookup): Likewise (elf32_mb_link_hash_entry): define TLS reference types (elf32_mb_link_hash_table): add TLS Local dynamic GOT entry #define has_tls_reloc if section has TLS relocs (dtprel_base), (check_unique_offset): New (microblaze_elf_output_dynamic_relocation): output simple dynamic relocation into SRELOC. (microblaze_elf_relocate_section): Accommodate TLS relocations. (microblaze_elf_check_relocs): Likewise (update_local_sym_info): New (microblaze_elf_copy_indirect_symbol): Add tls_mask. (allocate_dynrelocs): Handle TLS symbol (microblaze_elf_size_dynamic_sections): Set size and offset (microblaze_elf_finish_dynamic_symbol): Use microblaze_elf_output_dynamic_relocation gas/Changelog * config/tc-microblaze.c: Define TLS offsets (md_relax_table): Add TLS offsets (imm_types), (match_imm), (get_imm_otype): New to support TLS offsets. (tc_microblaze_fix_adjustable): Add TLS relocs. (md_convert_frag): Support TLS offsets. (md_apply_fix), (md_estimate_size_before_relax), (tc_gen_reloc): Add TLS relocs include/Changelog * elf/microblaze.h: Add TLS relocs to START_RELOC_NUMBERS
2012-12-10Add copyright noticesNick Clifton24-52/+196
2012-12-06gas/Yufeng Zhang7-39/+50
2012-12-06 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (exp_has_bignum_p): Remove. (my_get_expression): Not get rid of bignums. (s_ltorg): Increase the range of 'align'. (programmer_friendly_fixup): Allow bignum expression. gas/testsuite/ 2012-12-06 Yufeng Zhang <yufeng.zhang@arm.com> * gas/aarch64/illegal.s: Add test for unaccepted LDR literal. * gas/aarch64/illegal.l: Update. * gas/aarch64/programmer-friendly.s: Add tests for LDR literal with the auto-generation of literal in pool. * gas/aarch64/programmer-friendly.d: Update.
2012-11-29opcodes/Changelog:Michael Eager2-4/+8
* microblaze-opc.h: Rename INST_TYPE_RD_R1_SPECIAL to INST_TYPE_R1_R2_SPECIAL * microblaze-dis.c (print_insn_microblaze): Same. gas/Changelog * gas/config/tc-microblaze.c: Rename INST_TYPE_RD_R1_SPECIAL to INST_TYPE_R1_R2_SPECIAL, don't set RD for wic.
2012-11-28 gas/Julian Brown5-7/+79
* config/tc-arm.c (md_apply_fix): Fix conversion of BL to BLX for local targets in Thumb mode. gas/testsuite/ * gas/arm/bl-local-2.s: New test. * gas/arm/bl-local-2.d: New.
2012-11-27binutils/testsuite/Roland McGrath2-7/+19
* lib/binutils-common.exp (is_zlib_supported): New function. * lib/utils-lib.exp (run_dump_test): If as options include --compress-debug-sections and zlib is not available, report the test as unsupported. * binutils-all/compress.exp: Bail out if zlib is not available. * binutils-all/objdump.exp (objdump compressed debug): Mark unsupported if zlib is not available. * binutils-all/readelf.exp (readelf_compressed_wa_test): Likewise. gas/testsuite/ * lib/gas-defs.exp (run_dump_test): If as options include --compress-debug-sections and zlib is not available, report the test as unsupported. ld/testsuite/ * ld-elf/compress.exp: Bail out if zlib is not supported. * lib/ld-lib.exp (run_dump_test): If as options include --compress-debug-sections and zlib is not available, report the test as unsupported.
2012-11-23include/opcode/Alan Modra4-3/+13
* ppc.h (ppc_parse_cpu): Update prototype. opcodes/ * ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits set from ppc_opts.sticky in it. Delete "retain_mask". (powerpc_init_dialect): Choose default dialect from info->mach before parsing -M options. Handle more bfd_mach_ppc variants. Update common default to power7. gas/ * config/tc-ppc.c (sticky): New var. (md_parse_option, ppc_machine): Update ppc_parse_cpu calls. gas/testsuite/ * gas/ppc/astest2.d: Pass -Mppc to objdump. ld/testsuite/ * ld-powerpc/plt1.d: Update for default "at" branch hints. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlstocso.d: Likewise.
2012-11-21Add swap byte (swapb) and swap halfword (swaph) opcodes.Michael Eager3-0/+19
binutils/opcodes * microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES. * microblaze-opcm.h (microblaze_instr): Likewise binutils/gas/testsuite * gas/microblaze/allinsn.s: Add swapb, swaph * gas/microblaze/allinsn.d: Likewise
2012-11-21Add stack high register and stack low register for MicroBlazeMichael Eager5-0/+49
hardware assisted stack protection, stores stack low / stack high limits for detecting stack overflow / underflow binutils/opcodes * microblaze-opcm.h: Add REG_SLR_MASK, REG_SHR_MASK, REG_SHR and REG_SLR * microblaze-dis.c (get_field_special): Handle REG_SLR_MASK and REG_SHR_MASK binutils/gas * config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR binutils/gas * gas/microblaze/allinsn.s: Test use of SHR, SLR * gas/microblaze/allinsn.d: Likewise
2012-11-20gas/Roland McGrath6-6/+36
* config/tc-arm.c (arm_symbol_chars): New variable. * config/tc-arm.h (tc_symbol_chars): New macro, defined to that. gas/testsuite/ * gas/arm/macro-pld.s: New file. * gas/arm/macro-pld.d: New file.
2012-11-20Fix opcode for 64-bit jecxzH.J. Lu3-0/+9
gas/testsuite/ PR gas/14859 * gas/i386/x86-64-opcode.s: Add jecxz. * gas/i386/x86-64-opcode.d: Updated. opcodes/ PR gas/14859 * i386-opc.tbl: Fix opcode for 64-bit jecxz. * i386-tbl.h: Regenerated.
2012-11-202012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel3-3/+8
* s390-opc.txt: Fix srstu and strag opcodes. 2012-11-20 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/zarch-z9-109.d: Fix srstu opcode. * gas/s390/zarch-z900.d: Replace lasp with strag.
2012-11-20gas/ChangeLogYufeng Zhang2-1/+6
2012-11-20 Yufeng Zhang <yufeng.zhang@arm.com> * config/tc-aarch64.c (first_error_fmt): Add ATTRIBUTE_UNUSED to the local variable "ret".
2012-11-20Fix sparc bitness overrides in GAS. Noticed by Eric Botcazou.David S. Miller2-3/+17
gas/ * config/tc-sparc.c (md_parse_option): Only certain arch specifications should override the object to be 32-bit or 64-bit.
2012-11-14opcodes/Michael Eager5-1/+42
* microblaze-opc.h: Define new instruction type INST_TYPE_IMM5, update OPCODE_MASK_H13S, add OPCODE_MASK_HN, define MIN_IMM5 / MAX_IMM5, and increase MAX_OPCODES. (op_code_struct): add mbar and sleep * microblaze-opcm.h (microblaze_instr): add mbar Define IMM_MBAR and IMM5_MBAR_MASK * microblaze-dis.c: Add get_field_imm5_mbar (print_insn_microblaze): Add support for INST_TYPE_IMM5 and INST_TYPE_NONE gas/ * config/tc-microblaze.c (md_assemble): Add support for INST_TYPE_IMM5 gas/testsuite/ * gas/microblaze/allinsn.s: Add mbar and sleep * gas/microblaze/allinsn.d: Likewise
2012-11-14Add clz opcode.Michael Eager3-0/+12
opcodes/ * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add clz insn * microblaze-opcm.h (microblaze_instr): add clz gas/testsuite/ * gas/microblaze/allinsn.s: Add clz insn * gas/microblaze/allinsn.d: Likewise
2012-11-14Add the endian reversing versions of load/store instructions;Michael Eager4-0/+62
2012-11-14 Edgar E. Iglesias <edgar.iglesias@gmail.com> * microblaze-opc.h: Increase MAX_OPCODES (op_code_struct): add lbur, lhur, lwr, sbr, shr, swr * microblaze-opcm.h (microblaze_instr): add lbur, lhur, lwr, sbr, shr, swr 2012-11-14 David Holsgrove <david.holsgrove@xilinx.com> * gas/microblaze/allinsn.exp: New file - test newly added opcodes * gas/microblaze/allinsn.s: Likewise * gas/microblaze/allinsn.d: Likewise
2012-11-14gas/ChangeLog:Ulrich Weigand9-99/+59
* config/tc-ppc.c (md_apply_fix): Leave field zero when emitting an ELF reloc on data as well. gas/testsuite/ChangeLog: * gas/ppc/astest.d: Update for fixup changes. * gas/ppc/astest64.d: Likewise. * gas/ppc/astest2.d: Likewise. * gas/ppc/astest2_64.d: Likewise. * gas/ppc/test1elf32.d: Likewise. * gas/ppc/test1elf64.d: Likewise.
2012-11-12Correct gas microblaze ChangeLog entryH.J. Lu1-7/+6