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2010-03-052010-03-05 Paul Brook <paul@codesourcery.com>Paul Brook2-0/+5
gas/ * config/tc-arm.c (arm_cpu_option_table): Add cortex-m4.
2010-03-022010-03-02 Andrew Stubbs <ams@codesourcery.com>Andrew Stubbs2-31/+37
* config/tc-sh.c (get_specific): Move overflow checking code to avoid reading uninitialized data.
2010-03-012010-03-01 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-1/+5
* config/tc-score7.c (s7_frag_check): Add ATTRIBUTE_UNUSED.
2010-02-26 * configure.tgt: Fix mep cpu case.Doug Evans10-24/+61
testsuite/ * gas/mep/allinsn.be.d: Renamed from allinsn.d. Pass -EB. * gas/mep/allinsn.exp: branch1 is now bi-endian. * gas/mep/branch1.be.d: Renamed from branch1.d. Pass -EB. * gas/mep/branch1.le.d: New file. * gas/mep/dj1.be.d: Renamed from dj1.d. Pass -EB. * gas/mep/dj2.be.d: Renamed from dj2.d. Pass -EB.
2010-02-26 * config/tc-arm.c (do_t_strexd): RemoveJie Zhang6-26/+38
operand[1] != operand[2] contraint. testsuite/ * gas/arm/thumb32.s, gas/arm/thumb32.d: Add a new test for strexd. * gas/arm/thumb32.l: Adjust.
2010-02-26 * config/tc-arm.c (neon_select_shape): No need to matchJie Zhang2-0/+8
the remaining operands in the shape when one operand does not match.
2010-02-262010-02-26 Jie Zhang <jie@codesourcery.com>Jie Zhang6-2/+22
* config/tc-arm.c (do_neon_ld_st_interleave): Reject bad alignment. testsuite/ * gas/arm/neon-ldst-align-bad.d: New test. * gas/arm/neon-ldst-align-bad.l: New test. * gas/arm/neon-ldst-align-bad.s: New test.
2010-02-26 * cgen.c: Whitespace fixes.Doug Evans2-34/+40
(weak_operand_overflow_check): Formatting fix.
2010-02-25Update x86 assembler error messages.H.J. Lu2-2/+6
2010-02-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Update error messages.
2010-02-25Improve x86 assembler error message.H.J. Lu2-25/+51
2010-02-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Add err_msg. (operand_size_match): Set err_msg on failure. (operand_type_match): Likewise. (operand_type_register_match): Likewise. (VEX_check_operands): Likewise. (match_template): Likewise. Use i.err_msg with as_bad.
2010-02-25 * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,Nick Clifton10-16/+249
mips_fix_loongson2f_jump): New variables. (md_longopts): Add New options -mfix-loongson2f-nop/jump, -mno-fix-loongson2f-nop/jump. (md_parse_option): Initialize variables via above options. (options): New enums for the above options. (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN. (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump): New functions. (append_insn): call fix_loongson2f(). (mips_handle_align): Replace the implicit nops. * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified for the new mips_handle_align(). * doc/c-mips.texi: Document the new options. * gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop. * gas/mips/loongson-2f-2.d: Likewise. * gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump. * gas/mips/loongson-2f-3.d: Likewise. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
2010-02-24 PR binutils/6773Nick Clifton4-75/+84
* arm-dis.c (arm_opcodes): Replace <prefix>addsubx with <prefix>asx. Replace <prefix>subaddx with <prefix>sax. (thumb32_opcodes): Likewise. * gas/arm/arch7em.d: Replace expected disassembly of <prefix>addsubx with <prefix>asx. Also replace <prefix>subaddx with <prefix>sax. * gas/arm/archv6.d: Likewise. * gas/arm/thumb32.d: Likewise.
2010-02-23 gas/Daniel Gutson6-2/+34
* config/tc-arm.c (do_rd_rm_rn): Added warning. gas/testsuite/ * gas/arm/depr-swp.d: New test case. * gas/arm/depr-swp.s: New file. * gas/arm/depr-swp.l: New file.
2010-02-23 * gas/arm/thumb2_bcond.d: Allow for varying number of nops at theNick Clifton2-2/+8
end of the section depending upon the target of the arm assembler being tested.
2010-02-23PR 11297: Add support for 8-bit relocations to the AVR toolchain.Nick Clifton2-3/+18
2010-02-22 PR 9861Matthew Gretton-Dann2-7/+12
* gas/config/tc-arm.c (CPU_DEFAULT): Do not define based upon build compiler's predefines.
2010-02-19 * configure.tgt: Whiltespace. Sort moxie entry.Alan Modra2-15/+19
2010-02-18 * bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support forMatthew Gretton-Dann5-3/+16
merging Tag_DIV_use, Tag_MPextension_use, and Tag_MPextension_use_legacy tags. * binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add description of newly permitted attribute values. (arm_attr_tag_Virtualization_use): Likewise. (arm_attr_tag_DIV_use): Add description of new attribute. (arm_attr_tag_MPextension_use_legacy): Likewise. * gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use. * gas/doc/c-arm.texi: Likewise. * gas/testsuite/gas/arm/attr-order.d: Fix test for new names for attribute values. * include/elf/arm.h (Tag_MPextension_use): Renumber. (Tag_DIV_use): Add. (Tag_MPextension_use_legacy): Likewise. * ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute values. * ld/testsuite/ld-arm/attr-merge-3b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42 is a recognised attribute ID. * ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: New test. * ld/testsuite/ld-arm/attr-merge-6a.s: Likewise. * ld/testsuite/ld-arm/attr-merge-6b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-7a.s: Likewise. * ld/testsuite/ld-arm/attr-merge-7b.s: Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
2010-02-12*** empty log message ***Daniel Gutson2-0/+42
2010-02-12 gas/Daniel Gutson13-119/+1259
* config/tc-arm.c (asm_opcode): operands type change. (BAD_PC_ADDRESSING): New macro message. (BAD_PC_WRITEBACK): Likewise. (MIX_ARM_THUMB_OPERANDS): New macro. (operand_parse_code): Added enum values. (parse_operands): Added thumb/arm distinction, plus new enum values handling. (encode_arm_addr_mode_2): Validations enhanced. (encode_arm_addr_mode_3): Likewise. (do_rm_rd_rn): Likewise. (encode_thumb32_addr_mode): Likewise. (do_t_ldrex): Likewise. (do_t_ldst): Likewise. (do_t_strex): Likewise. (md_assemble): Call parse_operands with a new parameter. (OPS_1): New macro. (OPS_2): Likewise. (OPS_3): Likewise. (OPS_4): Likewise. (OPS_5): Likewise. (OPS_6): Likewise. (insns): Updated insns operands. gas/testsuite/ * gas/arm/sp-pc-validations-bad.d: New testcase. * gas/arm/sp-pc-validations-bad.l: New file. * gas/arm/sp-pc-validations-bad.s: New file. * gas/arm/sp-pc-validations-bad-t.d: New testcase. * gas/arm/sp-pc-validations-bad-t.l: New file. * gas/arm/sp-pc-validations-bad-t.s: New file. * gas/arm/sp-pc-usage-t.d: Removed invalid insns. * gas/arm/sp-pc-usage-t.s: Likewise. * gas/arm/unpredictable.d: Likewise. * gas/arm/unpredictable.s: Likewise. * gas/arm/thumb2_bcond.d: Added test. * gas/arm/thumb2_bcond.s: Likewise.
2010-02-12gas/Tristan Gingold7-1/+166
2010-02-12 Tristan Gingold <gingold@adacore.com> Douglas B Rupp <rupp@gnat.com> * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC. (DUMMY_RELOC_IA64_SLOTCOUNT): Added. (pseudo_func): Add an entry for slotcount. (md_begin): Initialize slotcount pseudo symbol. (ia64_parse_name): Handle @slotcount parameter. (ia64_gen_real_reloc_type): Handle slotcount. (md_apply_fix): Ditto. * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount. gas/testsuite/ 2010-02-12 Tristan Gingold <gingold@adacore.com> * gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test. * gas/ia64/ia64.exp: Add slotcount test (vms only).
2010-02-112010-02-11 Sterling Augustine <sterling@jaw.hq.tensilica.com>Sterling Augustine2-2/+5
* config/tc-xtensa.c (istack_init): Don't call memset.
2010-02-11Fix as obvious a merge errorSterling Augustine1-1/+0
2010-02-112010-02-11 Sterling Augustine <sterling@tensilica.com>Sterling Augustine2-5/+25
* config/tc-xtensa.c (cache_literal_section): Handle prefixes as well as suffixes.
2010-02-11Reformat build_modrm_byte.H.J. Lu2-6/+14
2010-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_modrm_byte): Reformat.
2010-02-11Update copyright.H.J. Lu2-1/+5
gas/ 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Update copyright. opcodes/ 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Update copyright. * i386-gen.c: Likewise. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise.
2010-02-112010-02-10 Quentin Neill <quentin.neill@amd.com>Sebastian Pop7-42/+432
Sebastian Pop <sebastian.pop@amd.com> gas: * config/tc-i386.c (vec_imm4) New operand type. (fits_in_imm4): New. (VEX_check_operands): New. (check_reverse): Call VEX_check_operands. (build_modrm_byte): Reintroduce code for 5 operand insns. Fix whitespace. gas/testsuite: * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests. * gas/i386/x86-64-xop.s: Likewise. * gas/i386/xop.d: Likewise. * gas/i386/xop.s: Likewise. opcodes: * i386-dis.c (OP_EX_VexImmW): Reintroduced function to handle 5th imm8 operand. (PREFIX_VEX_3A48): Added. (PREFIX_VEX_3A49): Added. (VEX_W_3A48_P_2): Added. (VEX_W_3A49_P_2): Added. (prefix table): Added entries for PREFIX_VEX_3A48 and PREFIX_VEX_3A49. (vex table): Added entries for VEX_W_3A48_P_2 and and VEX_W_3A49_P_2. * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4 for Vec_Imm4 operands. * i386-opc.h (enum): Added Vec_Imm4. (i386_operand_type): Added vec_imm4. * i386-opc.tbl: Add entries for vpermilp[ds]. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated.
2010-02-102010-02-10 Sterling Augustine <sterling@tensilica.com>Sterling Augustine1-10/+16
* config/tc-xtensa.c (xtensa_find_unaligned_loops): Rewrite.
2010-02-10gas/Richard Sandiford2-4/+10
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x, -mpwr6 and -mpwr7. opcodes/ * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6" and "pwr7". Move "a2" into alphabetical order.
2010-02-092010-02-09 Sterling Augustine <sterling@tensilica.com>Sterling Augustine2-3/+42
* config/tc-xtensa.c (RELAXED_LOOP_INSN_BYTES): New. (next_frag_pre_opcode_bytes): Use RELAXED_LOOP_INSN_BYTES. (xtensa_mark_zcl_first_insns): Rewrite to handle corner case.
2010-02-092010-02-08 Christophe Lyon <christophe.lyon@st.com>Christophe Lyon6-8/+209
gas/ * config/tc-arm.c (md_pcrel_from_section): Keep base to zero for non-local branches (BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX, BFD_RELOC_ARM_PCREL_CALL) gas/testsuite/ * gas/arm/branch-reloc.s, gas/arm/branch-reloc.d, gas/arm/branch-reloc.l: New tests and expected results with all variants of call: ARM/Thumb, local/global, inter/intra-section, using BL/BLX.
2010-02-082010-02-08 Sterling Augustine <sterling@tensilica.com>Sterling Augustine2-137/+113
* config/tc-xtensa.c (frag_format_size): Generalize logic to handle more instruction sizes and fetch widths. (branch_align_power): Likewise. (text_align_power): Likewise. (bytes_to_stretch): Likewise.
2010-02-08 * objdump.c (disassemble_bytes): Clear aux->reloc before printingNick Clifton6-33/+41
a new address, so as not to reuse a previous, non-related reloc. * gas/arm/arm-it-auto.d, gas/arm/bl-local-v4t.d, gas/arm/blx-local.d, gas/arm/thumb-w-good.d: Update expected results.
2010-02-08include/Alan Modra7-44/+590
* opcode/ppc.h (PPC_OPCODE_TITAN): Define. bfd/ * archures.c (bfd_mach_ppc_titan): Define. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add titan entry. opcodes/ * ppc-dis.c (ppc_opts): Add titan entry. * ppc-opc.c (TITAN, MULHW): Define. (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). gas/ * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs. (ppc_mach): Handle titan. * doc/c-ppc.texi: Mention -mtitan. gas/testsuite/ * gas/ppc/titan.d, * gas/ppc/titan.s: New test. * gas/ppc/ppc.exp: Run it.
2010-02-0510-02-05 Sterling Augustine <sterling@tensilica.com>Sterling Augustine1-7/+5
* config/tc-xtensa.c (UNREACHABLE_MAX_WIDTH): Delete and replace with... (xtensa_fetch_width) ...this.
2010-02-05 * Makefile.am (CPU_TYPES, OBJ_FORMATS, CPU_OBJ_VALID,Joseph Myers3-272/+6
MULTI_CPU_TYPES, MULTI_CPU_OBJ_VALID): Remove. * Makefile.in: Regenerate.
2010-02-032010-02-03 Quentin Neill <quentin.neill@amd.com>Sebastian Pop8-14/+29
gas/ * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1. (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1. * config/tc-i386.h (processor_type): Same. * doc/c-i386.texi: Change amdfam15 to bdver1. opcodes/ * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS to CPU_BDVER1_FLAGS * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Rename amdfam15 test cases to bdver1. * gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to gas/i386/x86-64-nops-1-bdver1.d. * gas/i386/nops-1-amdfam15.d: Renamed test case to gas/i386/nops-1-bdver1.d.
2010-01-29 gas/testsuite/Daniel Jacobowitz6-4/+48
* gas/arm/dis-data.d: Update test name. Do not expect .word output. * gas/arm/dis-data2.d, gas/arm/dis-data2.s, gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests. opcodes/ * opcodes/arm-dis.c (struct arm_private_data): New. (print_insn_coprocessor, print_insn_arm): Update to use struct arm_private_data. (is_mapping_symbol, get_map_sym_type): New functions. (get_sym_code_type): Check the symbol's section. Do not check mapping symbols. (print_insn): Default to disassembling ARM mode code. Check for mapping symbols separately from other symbols. Use struct arm_private_data.
2010-01-29 PR 11136Nick Clifton5-5/+29
* config/tc-arm.c (neon_check_type): Handle a neon_shape value of NS_NULL. * gas/arm/neon-omit.s: Add instruction that causes crash. * gas/arm/neon-omit.d: Add expected disassembly.
2010-01-28 * gas/pe/section-align-1.d: Don't test section flags.Dave Korn3-25/+30
* gas/pe/section-align-2.d: Likewise.
2010-01-28Allow VL=1 on scalar FMA instructions.H.J. Lu8-0/+812
gas/testsuite/ 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/fma-scalar-intel.d: New. * gas/i386/fma-scalar.d: Likewise. * gas/i386/fma-scalar.s: Likewise. * gas/i386/x86-64-fma-scalar-intel.d: Likewise. * gas/i386/x86-64-fma-scalar.d: Likewise. * gas/i386/x86-64-fma-scalar.s: Likewise. * gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel, x86-64-fma-scalar and x86-64-fma-scalar-intel. opcodes/ 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EXVexWdqScalar): New. (vex_scalar_w_dq_mode): Likewise. (prefix_table): Update entries for PREFIX_VEX_3899, PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F, PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD, PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB, PREFIX_VEX_38BD and PREFIX_VEX_38BF. (intel_operand_size): Handle vex_scalar_w_dq_mode. (OP_EX): Likewise.
2010-01-28 PR 11225Nick Clifton3-8/+16
* objdump.c (only): Replace with linked list. (only_size, only_used): Replace with only_list. (process_section_p): Set seen field on matches sections. (add_only): New function. (free_only_list): New function. (disassemble_section): Check only_list. (main): Use add_only and free_only_list. * gas/pe/aligncomm-c.d: Dump all sections. * ld-sh/refdbg-0-dso.d: Dump all sections.
2010-01-27gas/ChangeLog:Dave Korn10-0/+143
* NEWS: Mention new feature. * config/obj-coff.c (obj_coff_section): Accept digits and use to override default section alignment power if specified. * doc/as.texinfo (.section directive): Update documentation. gas/testsuite/ChangeLog: * gas/pe/section-align-1.s: New test source file. * gas/pe/section-align-1.d: Likewise control script. * gas/pe/section-align-2.s: Likewise ... * gas/pe/section-align-2.d: ... and likewise. * gas/pe/pe.exp: Invoke new testcases.
2010-01-27Allow VL=1 on AVX scalar instructions.H.J. Lu11-1/+3831
gas/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (avxscalar): New. (OPTION_MAVXSCALAR): Likewise. (build_vex_prefix): Select vector_length for scalar instructions based on avxscalar. (md_longopts): Add OPTION_MAVXSCALAR. (md_parse_option): Handle OPTION_MAVXSCALAR. (md_show_usage): Add -mavxscalar=. * doc/c-i386.texi: Document -mavxscalar=. gas/testsuite/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/avx-scalar-intel.d: New. * gas/i386/avx-scalar.d: Likewise. * gas/i386/avx-scalar.s: Likewise. * gas/i386/x86-64-avx-scalar-intel.d: Likewise. * gas/i386/x86-64-avx-scalar.d: Likewise. * gas/i386/x86-64-avx-scalar.s: Likewise. * gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel, x86-64-avx-scalar and x86-64-avx-scalar-intel. opcodes/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMScalar): New. (EXdScalar): Likewise. (EXqScalar): Likewise. (EXqScalarS): Likewise. (VexScalar): Likewise. (EXdVexScalarS): Likewise. (EXqVexScalarS): Likewise. (XMVexScalar): Likewise. (scalar_mode): Likewise. (d_scalar_mode): Likewise. (d_scalar_swap_mode): Likewise. (q_scalar_mode): Likewise. (q_scalar_swap_mode): Likewise. (vex_scalar_mode): Likewise. (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode, q_scalar_swap_mode. (OP_XMM): Handle scalar_mode. (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode and q_scalar_swap_mode. (OP_VEX): Handle vex_scalar_mode.
2010-01-24Set the first 3byte VEX prefix individually.H.J. Lu2-1/+8
2010-01-24 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (build_vex_prefix): Set i.vex.bytes[0] to 0xc4 individually.
2010-01-23Add more AVX tests.H.J. Lu7-84/+282
2010-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/avx.s: Add more tests. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/avx-intel.d: Updated. * gas/i386/avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise.
2010-01-23bfd/Richard Sandiford9-26/+124
* coff-rs6000.c (xcoff_howto_table): Change size to 0 and bitsize to 1. (_bfd_xcoff_reloc_type_lookup): Handle BFD_RELOC_NONE. * coff64-rs6000.c (xcoff64_howto_table): Change size to 0 and bitsize to 1. (xcoff64_reloc_type_lookup): Handle BFD_RELOC_NONE. gas/ * write.h (fix_at_start): Declare. * write.c (fix_new_internal): Add at_beginning parameter. Use it instead of REVERSE_SORT_RELOCS. Fix the handling of seg_fix_tailP for the at_beginning/REVERSE_SORT_RELOCS case. (fix_new, fix_new_exp): Update accordingly. (fix_at_start): New function. * config/tc-ppc.c (md_pseudo_table): Add .ref to the OBJ_XCOFF section. (ppc_ref): New function, for OBJ_XCOFF. (md_apply_fix): Handle BFD_RELOC_NONE for OBJ_XCOFF. * config/te-i386aix.h (REVERSE_SORT_RELOCS): Remove #undef. gas/testsuite/ * gas/ppc/xcoff-ref-1.s, gas/ppc/xcoff-ref-1.l: New test. * gas/ppc/aix.exp: Run it. ld/testsuite/ * ld-powerpc/aix-ref-1-32.od, ld-powerpc/aix-ref-1-64.od, ld-powerpc/aix-ref-1.s: New tests. * ld-powerpc/aix52.exp: Run them.
2010-01-21 * config/te-solaris.h (DWARF2_EH_FRAME_READ_ONLY): Make read-onlyRainer Orth2-6/+22
on 64-bit Solaris/x86. Include obj-format.h earlier.
2010-01-21Correct month.H.J. Lu1-1/+1
2010-01-21Add xsave64 and xrstor64.H.J. Lu4-12/+122
gas/testsuite/ 2010-02-21 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64. * gas/i386/x86-64-xsave-intel.d: Updated. * gas/i386/x86-64-xsave.d: Likewise. opcodes/ 2010-02-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor. * i386-opc.tbl: Add xsave64 and xrstor64. * i386-tbl.h: Regenerated.
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