aboutsummaryrefslogtreecommitdiff
path: root/gas
AgeCommit message (Collapse)AuthorFilesLines
2008-02-122002-02-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu4-3/+50
* gas/i386/i386.exp: Run x86-64-arch-2 instead of x86-64-arch-10. * gas/i386/x86-64-arch-10.d: Removed. * gas/i386/x86-64-arch-2.d: New. * gas/i386/x86-64-arch-2.s: Likewise.
2008-02-122008-02-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* gas/i386/x86-64-xsave.d: Remove prefix.
2008-02-12* config/tc-tic4x.c (tic4x_insn_insert): Add const qualifier toNick Clifton3-13/+19
argument. (tic4x_insn_add): Likewise. (md_begin): Drop cast that was discarding a const qualifier. * config/tc-d30v.c (get_reloc): Add const qualifier to op argument. (build_insn): Drop cast that was discarding a const qualifier.
2008-02-12gas/H.J. Lu11-60/+97
2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add .xsave. (md_show_usage): Add .xsave. * doc/c-i386.texi: Add xsave to -march=. gas/testsuite/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.s: Add xgetbv. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS. * i386-init.h: Updated.
2008-02-12gas/testsuite/H.J. Lu8-0/+102
2002-02-11 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run xsave, xsave-intel, x86-64-xsave and x86-64-xsave-intel. * gas/i386/x86-64-xsave-intel.d: New file. * gas/i386/x86-64-xsave.d: Likewise. * gas/i386/x86-64-xsave.s: Likewise. * gas/i386/xsave-intel.d: Likewise. * gas/i386/xsave.d: Likewise. * gas/i386/xsave.s: Likewise. opcodes/ 2008-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flags): Add CpuXsave. * i386-opc.h (CpuXsave): New. (Cpu64): Updated. (i386_cpu_flags): Add cpuxsave. * i386-dis.c (MOD_0FAE_REG_4): New. (RM_0F01_REG_2): Likewise. (MOD_0FAE_REG_5): Updated. (RM_0F01_REG_3): Likewise. (reg_table): Use MOD_0FAE_REG_4. (mod_table): Use RM_0F01_REG_2. Add MOD_0FAE_REG_4. Updated for xrstor. (rm_table): Add RM_0F01_REG_2. * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-02-07 * read.c (s_weakref): Don't pass unadorned NULL to concat.Alan Modra3-4/+10
* config/tc-i386.c (set_cpu_arch, md_parse_option): Likewise.
2008-02-06 * gas/mips/mips.exp: Invoke the tests smartmips, mips32-dsp,Adam Nemet7-10/+21
mips32-dspr2, mips64-dsp and mips32-mt with run_dump_test instead of run_dump_test_arches. * gas/mips/smartmips.d: Pass -mips32. * gas/mips/mips64-dsp.d: Pass -mips64r2. * gas/mips/mips32-dsp.d: Pass -mips32r2. * gas/mips/mips32-dspr2.d: Likewise. * gas/mips/mips32-mt.d: Likewise.
2008-02-052008-02-05 Sterling Augustine <sterling@tensilica.com>Bob Wilson2-21/+38
* config/tc-xtensa.c (relax_frag_immed): Change internal consistency checks into assertions. When relaxation produces an operation that does not fit in the current FLIX instruction, make sure that the operation is relaxed as needed to account for being placed following the current instruction.
2008-02-04bfd/H.J. Lu2-0/+15
2008-02-04 Kai Tietz <kai.tietz@onevision.com> H.J. Lu <hongjiu.lu@intel.com> PR 5715 * warning.m4: Enable -Wno-format by default when using gcc on mingw. * configure: Regenerated. binutils/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. gas/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. ld/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated. opcodes/ 2008-02-04 H.J. Lu <hongjiu.lu@intel.com> PR 5715 * configure: Regenerated.
2008-02-04 * config/tc-mips.c (mips_cpu_info_table): Add Octeon.Adam Nemet2-0/+7
2008-02-04 * gas/mips/mips.exp: Call mips_arch_create for Octeon. InvokeAdam Nemet4-0/+28
Octeon tests. * gas/mips/octeon.s, gas/mips/octeon.d: New test.
2008-02-012008-01-31 Marc Gauthier <marc@tensilica.com>Bob Wilson6-4/+14
bfd/ * config.bfd (xtensa*-*-*): Recognize processor variants. gas/ * configure.tgt (xtensa*-*-*): Recognize processor variants. gas/testsuite/ * gas/all/gas.exp: Recognize Xtensa processor variants. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. ld/ * configure.tgt (xtensa*-*-*): Recognize processor variants. ld/testsuite/ * ld-elf/merge.d: Recognize Xtensa processor variants. * ld-xtensa/coalesce.exp: Likewise. * ld-xtensa/lcall.exp: Likewise.
2008-01-28binutils/H.J. Lu14-39/+60
2008-01-28 H.J. Lu <hongjiu.lu@intel.com> * dwarf.c: Include "elf/common.h". (eh_addr_size): Changed to int. (dwarf_regnames_i386): New. (dwarf_regnames_x86_64): Likewise. (dwarf_regnames): Likewise. (dwarf_regnames_count): Likewise. (init_dwarf_regnames): Likewise. (regname): Likewise. (frame_display_row): Properly support different address size. Call regname to get register name. (display_debug_frames): Call regname to get register name. Display DW_CFA_def_cfa_register as DW_CFA_def_cfa_register instead of DW_CFA_def_cfa_reg. * dwarf.h (init_dwarf_regnames): New. * objdump.c: Include "elf-bfd.h". (dump_dwarf): Call init_dwarf_regnames on ELF input. * readelf.c (guess_is_rela): Change argument to int. (parse_args): Remove the undocumented upper case options for -wX. (process_file_header): Call init_dwarf_regnames if do_dwarf_register is true. gas/testsuite/ 2008-01-28 H.J. Lu <hongjiu.lu@intel.com> * gas/cfi/cfi-alpha-1.d: Replace DW_CFA_def_cfa_reg with DW_CFA_def_cfa_register. * gas/cfi/cfi-alpha-3.d: Likewise. * gas/cfi/cfi-hppa-1.d: Likewise. * gas/cfi/cfi-i386.d: Likewise. * gas/cfi/cfi-m68k.d: Likewise. * gas/cfi/cfi-mips-1.d: Likewise. * gas/cfi/cfi-sh-1.d: Likewise. * gas/cfi/cfi-sparc-1.d: Likewise. * gas/cfi/cfi-sparc64-1.d: Likewise. * gas/cfi/cfi-x86_64.d: Likewise. * gas/cfi/cfi-common-1.d: Updated for i386/x86-64 register names. * gas/cfi/cfi-common-2.d: Likewise. * gas/cfi/cfi-common-5.d: Likewise. * gas/cfi/cfi-i386.d: Likewise. * gas/cfi/cfi-x86_64.d: Likewise. ld/testsuite/ 2008-01-28 H.J. Lu <hongjiu.lu@intel.com> * ld-elf/eh1.d: Replace DW_CFA_def_cfa_reg with DW_CFA_def_cfa_register. Updated for i386/x86-64 register names. * ld-elf/eh2.d: Likewise. * ld-elf/eh3.d: Likewise. * ld-elf/eh4.d: Likewise. * ld-elf/eh5.d: Likewise.
2008-01-25Add mingw I64 support for printing long and long long valuesNick Clifton2-0/+10
2008-01-25 * doc/c-xtensa.texi (Xtensa Syntax): Clarify handling of opcodes thatBob Wilson2-7/+12
can only be encoded in FLIX instructions but are not specified as such. (Xtensa Automatic Alignment): Remove obsolete comment about debugging labels.
2008-01-242008-01-24 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-0/+8
* NEWS: Mention new command line options for x86 targets.
2008-01-24gas/testsuite/H.J. Lu4-1/+46
2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-sib.s: Add tests for r12. * gas/i386/x86-64-sib-intel.d: Updated. * gas/i386/x86-64-sib.d: Likewise. opcodes/ 2008-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (OP_E_extended): Handle r12 like rsp.
2008-01-23gas/H.J. Lu7-4/+70
2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_show_usage): Replace tabs with spaces. gas/testsuite/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp : Run x86-64-arch-1 and x86-64-arch-10. * gas/i386/x86-64-arch-1.d: New. * gas/i386/x86-64-arch-1.s: Likewise. * gas/i386/x86-64-arch-10.d: Likewise. opcodes/ 2008-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS. * i386-init.h: Regenerated.
2008-01-23/gas:Eric B. Weddington2-1/+5
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Change opcode set for at86rf401. /include: 2008-01-23 Eric B. Weddington <eric.weddington@atmel.com> * opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-232008-01-23 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-5/+14
* config/tc-i386.c (md_show_usage): Show more processors for -march=/-mtune=.
2008-01-232008-01-23 Tristan Gingold <gingold@adacore.com>Tristan Gingold2-8/+13
* gas/ia64/regs.d: Updated as the ia64 disassembler now displays symbolic names for all ar registers.
2008-01-22gas/H.J. Lu8-2/+47
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (i386_target_format): Remove cpummx2. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10.d: New. * gas/i386/arch-11.s: Likewise. * gas/i386/arch-12.d: Likewise. * gas/i386/arch-12.s: Likewise. * gas/i386/i386.exp: Run arch-11 and arch-12. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuMMX2. (cpu_flags): Likewise. * i386-opc.h (CpuMMX2): Removed. (CpuSSE): Updated. * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-22gas/H.J. Lu22-235/+669
2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (XXX_PREFIX): Moved from tc-i386.h. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. (cpu_sub_arch_name): Remove const. (cpu_arch): Add .vmx and .smx. (set_cpu_arch): Append cpu_sub_arch_name. (md_parse_option): Support -march=CPU[,+EXTENSION...]. (md_show_usage): Updated. * config/tc-i386.h (XXX_PREFIX): Moved to tc-i386.c. (XXX_MNEM_SUFFIX): Likewise. (END_OF_INSN): Likewise. (templates): Likewise. (modrm_byte): Likewise. (rex_byte): Likewise. (DREX_XXX): Likewise. (drex_byte): Likewise. (sib_byte): Likewise. (processor_type): Likewise. (arch_entry): Likewise. * doc/as.texinfo: Update i386 -march option. * doc/c-i386.texi: Update -march= for ISA. gas/testsuite/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-10-1.l: New. * gas/i386/arch-10-1.s: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-2.s: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-3.s: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10-4.s: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10.s: Likewise. * gas/i386/i386.exp: Run arch-10, arch-10-1, arch-10-2, arch-10-3 and arch-10-4. * gas/i386/nops-2.s: Use movsbl instead of cmove. * gas/i386/nops-2-i386.d: Updated. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/x86-64-nops-2.d: Likewise. opcodes/ 2008-01-22 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and CPU_SMX_FLAGS. * i386-init.h: Regenerated.
2008-01-18 * config/tc-xtensa.c (xtensa_leb128): New function.Bob Wilson2-6/+27
(md_pseudo_table): Use it for sleb128 and uleb128. (is_leb128_expr): New internal flag. (xtensa_symbol_new_hook): Check new flag.
2008-01-16/gas:Eric B. Weddington3-6/+15
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Change opcode set for avr3, at90usb82, at90usb162. * doc/c-avr.texi: Change architecture grouping for at90usb82, at90usb162. These changes support the new avr35 architecture group in gcc. /include: 2008-01-03 Eric B. Weddington <eric.weddington@atmel.com> * opcode/avr.h (AVR_ISA_USB162): Add new opcode set. (AVR_ISA_AVR3): Likewise.
2008-01-16gas/testsuite/H.J. Lu5-4/+20
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/prescott.s: Add tests for movddup in Intel syntax. * gas/i386/x86-64-prescott.s: Likewise. * gas/i386/prescott.d: Updated. * gas/i386/x86-64-prescott.d: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Use Qword on movddup. * i386-tbl.h: Regenerated.
2008-01-15gas/H.J. Lu11-114/+194
2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (md_assemble): Also zap movzx and movsx suffix for AT&T syntax. gas/testsuite/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add more tests for movsx and movzx. * gas/i386/x86_64.s: Likewise. * gas/i386/inval.s: Remove tests for movsxw and movzxw. * gas/i386/x86-64-inval.s: Remove tests for movsxb, movsxw, movsxl, movzxb and movzxw. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-15 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax. * i386-tbl.h: Regenerated.
2008-01-15gas/H.J. Lu11-86/+341
2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_reg_size): New. (match_mem_size): Likewise. (operand_size_match): Likewise. (operand_type_match): Also clear all size fields. (match_template): Skip Intel syntax when in AT&T syntax. Call operand_size_match to check operand size. (i386_att_operand): Set the mem field to 1 for memory operand. (i386_intel_operand): Likewise. gas/testsuite/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movsx, movzx and movnti. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/i386.d: Updated. * gas/i386/inval.l: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-14 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add IntelSyntax. (operand_types): Add Mem. * i386-opc.h (IntelSyntax): New. * i386-opc.h (Mem): New. (Byte): Updated. (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Add intelsyntax. (i386_operand_type): Add mem. * i386-opc.tbl: Remove Reg16 from movnti. Add sizes to more instructions. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-12gas/testsuite/H.J. Lu15-56/+249
2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/i386.s: Add tests for fnstsw and fstsw. * gas/i386/inval.s: Likewise. * gas/i386/x86_64.s: Likewise. * gas/i386/intel.s: Use word instead of dword on ss. * gas/i386/x86-64-inval.s: Add tests for fnstsw, fstsw, in and out. * gas/i386/prefix.s: Remove invalid fstsw. * gas/i386/inval.l: Updated. * gas/i386/intelbad.l: Likewise. * gas/i386/i386.d: Likewise. * gas/i386/x86_64.d: Likewise. * gas/i386/x86-64-inval.l: Likewise. * gas/i386/prefix.d: Updated. gas/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (_i386_insn): Update comment. (operand_type_match): Also clear unspecified. (operand_type_register_match): Likewise. (parse_operands): Initialize unspecified. (i386_intel_operand): Likewise. (match_template): Check memory and accumulator operand size. (i386_att_operand): Clear unspecified on register operand. (intel_e11): Likewise. (intel_e09): Set operand size and clean unspecified for "XXX PTR". opcodes/ 2008-01-12 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (operand_type_init): Add Dword to OPERAND_TYPE_ACC32. Add Qword to OPERAND_TYPE_ACC64. (opcode_modifiers): Remove CheckSize, Byte, Word, Dword, Qword and Xmmword. (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. (set_bitfield): Make Mmword an alias of Qword. Make Oword an alias of Xmmword. * i386-opc.h (CheckSize): Removed. (Byte): Updated. (Word): Likewise. (Dword): Likewise. (Qword): Likewise. (Xmmword): Likewise. (FWait): Updated. (OTMax): Likewise. (i386_opcode_modifier): Remove checksize, byte, word, dword, qword and xmmword. (Fword): New. (TBYTE): Likewise. (Unspecified): Likewise. (Anysize): Likewise. (i386_operand_type): Add byte, word, dword, fword, qword, tbyte xmmword, unspecified and anysize. * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword, Tbyte, Xmmword, Unspecified and Anysize. * i386-reg.tbl: Add size for accumulator. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-11* read.c (s_space): Declare `repeat' as offsetT.Andreas Schwab2-1/+5
2008-01-102008-01-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-4/+11
* config/tc-i386.c (match_template): Check processor support first.
2008-01-102008-01-10 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-6/+9
* config/tc-i386.c (match_template): Continue if processor doesn't match.
2008-01-10gas/testsuite/H.J. Lu5-49/+210
2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/nops.s: Add more tests with opcodes from 0x0f19 to 0x0f1f. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/nops.d: Updated. * gas/i386/x86-64-nops.d: Likewise. opcodes/ 2008-01-10 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (REG_0F0E): Renamed to REG_0F0D. (REG_0F18): Updated. (reg_table): Updated. (dis386_twobyte): Updated. Use "nopQ" on 0x19 to 0x1e. (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
2008-01-09* config/tc-ia64.c (ia64_convert_frag): Zero-initialize room forAlexandre Oliva2-1/+10
unwind personality function address.
2008-01-09gas/Bob Wilson8-78/+183
* dwarf2dbg.c (out_sleb128): Delete. (size_fixed_inc_line_addr, emit_fixed_inc_line_addr): New. (out_fixed_inc_line_addr): Delete. (relax_inc_line_addr, dwarf2dbg_estimate_size_before_relax): Call new size_fixed_inc_line_addr if DWARF2_USE_FIXED_ADVANCE_PC is set. (dwarf2dbg_convert_frag): Likewise for emit_fixed_inc_line_addr. (process_entries): Remove calls to out_fixed_inc_line_addr. When DWARF2_USE_FIXED_ADVANCE_PC is set, call relax_inc_line_addr. * read.h (emit_expr_fix): New prototype. * read.c (emit_expr): Move code to emit_expr_fix and use it here. (emit_expr_fix): New. testsuite/ * gas/lns/lns.exp: Run new lns-big-delta test for targets that set DWARF2_USE_FIXED_ADVANCE_PC. * gas/lns/lns-big-delta.s: New. * gas/lns/lns-big-delta.d: New.
2008-01-092008-01-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-29/+32
* config/tc-i386.c (match_template): Check register size only when size of operands can be encoded the canonical way.
2008-01-082008-01-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-3/+9
* config/tc-i386.c (i386_operand): Renamed to ... (i386_att_operand): This. (parse_operands): Updated.
2008-01-08 PR gas/5322Nick Clifton2-1/+8
* lib/gas-defs.exp (gas_host_run): Add fourth argument to regsub command.
2008-01-05gas/H.J. Lu7-57/+163
2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * doc/c-i386.texi: Update .att_mnemonic and .intel_mnemonic. * config/tc-i386.c (set_intel_mnemonic): Set intel_mnemonic only. (md_assemble): Remove Intel mode workaround. (match_template): Check support for old gcc, AT&T mnemonic and Intel Syntax. (md_parse_option): Don't set intel_mnemonic to 0 for OPTION_MOLD_GCC. gas/testsuite/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.s: Add tests for fadd, faddp, fdiv, fdivp, fdivr, fdivrp, fmul, fmulp, fsub, fsubp, fsubr and fsubrp. * gas/i386/intel.d: Updated. * gas/i386/intel.e: Likewise. opcodes/ 2008-01-05 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to ATTSyntax. * i386-opc.h (IntelMnemonic): Renamed to .. (ATTSyntax): This (Opcode_Modifier_Max): Updated. (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax and intelsyntax. * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp. * i386-tbl.h: Regenerated.
2008-01-042008-01-04 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* config/tc-i386.h: Update copyright to 2008.
2008-01-04gas/testsuite/H.J. Lu6-131/+199
2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/rexw.d: New. * gas/i386/rexw.s: Likewise. * gas/i386/x86-64-sse4_1-intel.d: Updated. * gas/i386/x86-64-sse4_1.d: Likewise. opcodes/ 2008-01-04 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps, pextrb, pextrw, pinsrb, pinsrw and pmovmskb. * i386-tbl.h: Regenerated.
2008-01-04* config/tc-ppc.c (parse_cpu): Preserve the settings of theNick Clifton6-6/+40
PPC_OPCODE_ALTIVEC and PPC_OPCODE_SPE flags. * gas/ppc/altivec_and_spe.s: New test - checks that ISA extension command line options (-maltivec, -mspe) can be specified before CPU selection command line options. * gas/ppc/altivec_and_spe.d: Expected disassembly. * gas/ppc/ppc.exp: Run the new test
2008-01-042008-01-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+8
* config/tc-i386.c (md_assemble): Use !intel_mnemonic instead of SYSV386_COMPAT.
2008-01-04gas/H.J. Lu6-55/+65
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/config/tc-i386.c (cpu_arch_flags_not): Removed. (cpu_flags_not): Likewise. (cpu_flags_match): Updated to check 64bit and arch. (set_code_flag): Remove cpu_arch_flags_not. (set_16bit_gcc_code_flag): Likewise. (set_cpu_arch): Likewise. (md_begin): Likewise. (parse_insn): Call cpu_flags_match to check 64bit and arch. (match_template): Likewise. gas/testsuite/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-9.d: New file. * gas/i386/arch-9.s: Likewise. * gas/i386/i386.exp: Run arch-9. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and CpuSSE4_2_Or_ABM. (cpu_flags): Likewise. * i386-opc.h (CpuSSE4_1_Or_5): Removed. (CpuSSE4_2_Or_ABM): Likewise. (CpuLM): Updated. (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm. * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2 and CpuPadLock, respectively. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03 * config/tc-i386.c (process_drex): Initialize modrm_reg andJakub Jelinek2-3/+8
modrm_regmem to 0 instead of None.
2008-01-03gas/H.J. Lu2-2/+7
2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Use the xmmword field instead of no_xsuf. opcodes/ 2008-01-03 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Remove No_xSuf. * i386-opc.h (No_xSuf): Removed. (CheckSize): Updated. * i386-tbl.h: Regenerated.
2008-01-03gas/testsuite/H.J. Lu10-0/+81
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/arch-5.d: New file. * gas/i386/arch-5.s: Likewise. * gas/i386/arch-6.d: Likewise. * gas/i386/arch-6.s: Likewise. * gas/i386/arch-7.d: Likewise. * gas/i386/arch-7.s: Likewise. * gas/i386/arch-8.d: Likewise. * gas/i386/arch-8.s: Likewise. * gas/i386/i386.exp: Run arch-5, arch-6, arch-7 and arch-8. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and CPU_SSE5_FLAGS. (cpu_flags): Add CpuSSE4_2_Or_ABM. * i386-opc.h (CpuSSE4_2_Or_ABM): New. (CpuLM): Updated. (i386_cpu_flags): Add cpusse4_2_or_abm. * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of CpuABM|CpuSSE4_2 on popcnt. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2008-01-03gas/testsuite/H.J. Lu5-1/+27
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.s: Add tests for movq. * gas/i386/x86_64.s: Likewise. * gas/i386/i386.d Updated. * gas/i386/x86_64.d: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h: Update comments.
2008-01-022008-01-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-1/+5
* config/tc-i386.c (process_suffix): Fix a typo.
2008-01-02gas/H.J. Lu9-59/+153
2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * config/tc-i386.c (match_template): Handle XMMWORD_MNEM_SUFFIX. Check memory size in Intel mode. (process_suffix): Handle XMMWORD_MNEM_SUFFIX. (intel_e09): Likewise. * config/tc-i386.h (XMMWORD_MNEM_SUFFIX): New. gas/testsuite/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * gas/i386/intel.s: Use QWORD on movq instead of DWORD. * gas/i386/inval.s: Add tests for movq. * gas/i386/x86-64-inval.s: Likewise. * gas/i386/inval.l: Updated. * gas/i386/x86-64-inval.l: Likewise. opcodes/ 2008-01-02 H.J. Lu <hongjiu.lu@intel.com> PR gas/5534 * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.h (No_xSuf): New. (CheckSize): Likewise. (Byte): Likewise. (Word): Likewise. (Dword): Likewise. (QWord): Likewise. (Xmmword): Likewise. (FWait): Updated. (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word, Dword, QWord and Xmmword. * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is used. * i386-tbl.h: Regenerated.
generated by cgit v1.1 at 2024-12-26 12:43:05 +0000