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2019-01-04Fix potential buffer overrun whilst scanning macro strings.Wu Heng2-1/+7
2019-01-04Fix bug parsing angle bracketed string sequences.Wu Heng2-2/+11
2019-01-01Update year range in copyright notice of binutils filesAlan Modra561-563/+567
2019-01-01ChangeLog rotationAlan Modra2-5874/+5888
2018-12-19x86: Properly handle PLT expression in directiveH.J. Lu8-3/+34
2018-12-14elf: Add PT_GNU_PROPERTY segment typeH.J. Lu3-3/+9
2018-12-13Fix typo/thinko in last change.Jeff Law2-1/+6
2018-12-13Move aarch64 CIE code to aarch64 backendSam Tebbs4-13/+70
2018-12-12[GAS][Arm] Skip Local BLX Thumb tests for arm-netbsdelf and arm-ntoAndre Vieira2-1/+6
2018-12-10RISC-V: Don't segfault for two regs in auipc or lui.Jim Wilson5-1/+27
2018-12-10Correct gas/ChangeLog entry for PR gas/23968H.J. Lu1-1/+1
2018-12-09x86: Put back BFD_RELOC_X86_64_GOTPCRELH.J. Lu6-0/+39
2018-12-07RISC-V: Fix 4-arg add parsing.Jim Wilson5-3/+43
2018-12-06PowerPC @l, @h and @ha warnings, plus VLE e_liAlan Modra2-33/+61
2018-12-06opcodes/riscv: Hide '.L0 ' fake symbolsAndrew Burgess2-2/+8
2018-12-05[aarch64] Add support for pointer authentication B keySam Tebbs7-16/+150
2018-12-04PR23939, Check frch_cfi_data before usewu.heng2-1/+15
2018-12-03RISC-V: Accept version, supervisor ext and more than one NSE for -march.Jim Wilson29-141/+159
2018-12-03[aarch64] - Only use MOV for disassembly when shifter op is LSL #0Egeyar Bagcioglu3-2/+16
2018-12-03Update the assembler to use a version of 3 when generating the header of the ...Nick Clifton19-19/+41
2018-12-01PR23938, should not free memory alloced in obstack by free()Alan Modra8-44/+67
2018-11-30GAS/MIPS: Add `-mfix-r5900' option for the R5900 short loop erratumFredrik Noring9-1/+161
2018-11-27RISC-V: Add .insn CA support.Jim Wilson5-13/+65
2018-11-27[ARM] Update knowledge of bfd architecturesThomas Preud'homme150-0/+1145
2018-11-27Tighten the constraints for warning about NOPs for the MSP 430 ISA, so NOPs a...Jozef Lawrynowicz24-71/+751
2018-11-23[GAS][ARM] Fix testism for bl local v4t testAndre Vieira4-1/+61
2018-11-21S12Z opcodes: Fix bug disassembling certain shift instructions.John Darrington3-1/+10
2018-11-21S12Z: Add alias instructions BHS and BLO.John Darrington4-2/+14
2018-11-13[ARM] Improve indentation of ARM architecture declarationsThomas Preud'homme2-51/+55
2018-11-12[BINUTILS, AARCH64, 8/8] Add data cache instructions for Memory Tagging Exten...Sudakshina Das4-0/+68
2018-11-12[BINUTILS, AARCH64, 7/8] Add system registers for Memory Tagging ExtensionSudakshina Das4-1/+75
2018-11-12[BINUTILS, AARCH64, 6/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das6-3/+70
2018-11-12[BINUTILS, AARCH64, 5/8] Add Tag getting instruction in Memory Tagging ExtensionSudakshina Das5-1/+33
2018-11-12[BINUTILS, AARCH64, 4/8] Add Tag setting instructions in Memory Tagging Exten...Sudakshina Das6-0/+140
2018-11-12[BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Taggin...Sudakshina Das5-0/+66
2018-11-12[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Ex...Sudakshina Das7-0/+120
2018-11-12[BINUTILS, AARCH64, 1/8] Add support for Memory Tagging Extension for ARMv8.5-ASudakshina Das3-0/+10
2018-11-09S/390: Fix optional operand handling after memory addressesAndreas Krebbel4-24/+42
2018-11-09PowerPC, don't use bfd reloc howto in md_assembleAlan Modra2-11/+255
2018-11-07Add updated French and Portuguese translations.Nick Clifton2-2994/+3076
2018-11-07rx: Add target rx-*-linux.Yoshinori Sato5-2/+13
2018-11-06[arm] fix testsuite breakage on pe-coffMatthew Malcomson2-2/+8
2018-11-06[arm] Check for neon and condition in vcvt.f16.f32Matthew Malcomson7-14/+40
2018-11-06PowerPC instruction mask checksAlan Modra2-14/+29
2018-11-06PowerPC instruction operand flag validationAlan Modra2-0/+14
2018-11-06x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit modeJan Beulich4-0/+10
2018-11-06x86: correctly handle VMOVD with EVEX.W set outside of 64-bit modeJan Beulich4-0/+20
2018-11-06x86: correctly handle KMOVD with VEX.W set outside of 64-bit modeJan Beulich3-0/+9
2018-11-06x86: adjust {,E}VEX.W handling for PEXTR* / PINSR*Jan Beulich8-0/+60
2018-11-06x86: adjust {,E}VEX.W handling outside of 64-bit modeJan Beulich13-31/+241