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1996-08-31 * config/tc-v850.c (md_assemble): Compute size of the instrctionJeff Law1-1/+6
from the opcode.
1996-08-31 * config/tc-v850.c (md_apply_fix3): Do simple byte, short andJeff Law2-0/+14
word fixups too. Fixes "difference between forward references".
1996-08-31 * gas/v850/basic.exp (do_branch): Check offsets in branch insns.Jeff Law2-32/+37
(do_jumps): Likewise. Now that we can resolve known branch targets.
1996-08-31 * config/tc-v850.c (md_apply_fix3): Use little endian get/putJeff Law2-4/+28
routines to fetch/store the updated instruction from/to memory. (v850_insert_operand): If the operand has a specialized insert routine, call it. Getting fixups closer. At least br <target> works now.
1996-08-31* config/tc-v850.c (reg_name_search): Align calling convention toJ.T. Conklin2-133/+195
be like identical function found in tc-ppc.c. (get_reloc): Removed. (v850_reloc_prefix): New function, parse lo(), hi() and hi0(). (md_assemble): emit fixups. (md_pcrel_from): renamed from md_pcrel_from_section, emit proper displacement. (md_apply_fix3): handle fixups/relocs. * config/tc-v850.h (MD_PCREL_FROM_SECTION): Removed definition.
1996-08-30 Add SH ELF support.Ian Lance Taylor1-0/+48
* configure.in (sh-*-elf*): New target. * config/tc-sh.h (TARGET_ARCH): Define. (WORKING_DOT_WORD): Define. (TC_COFF_FIX2RTYPE): Only define if OBJ_COFF. (BFD_ARCH, COFF_MAGIC, TC_COUNT_RELOC): Likewise. (TC_RELOC_MANGLE, tc_coff_symbol_emit_hook): Likewise. (DO_NOT_STRIP, NEED_FX_R_TYPE, TC_KEEP_FX_OFFSET): Likewise. (TC_COFF_SIZEMACHDEP, tc_frob_file): Likewise. (SUB_SEGMENT_ALIGN): Likewise. (RELOC_32): Don't define. (tc_frob_file_before_adjust): Define if BFD_ASSEMBLER. (target_big_endian): Declare if OBJ_ELF. (TARGET_FORMAT): Define if OBJ_ELF. * config/tc-sh.c: Use BFD reloc codes instead of SH COFF reloc numbers throughout. (tc_crawl_symbol_chain): Only define if OBJ_COFF. (tc_headers_hook, tc_coff_sizemachdep): Likewise. (struct sh_count_relocs): Define. (sh_count_relocs): New static function, broken out of sh_frob_file. Add BFD_ASSEMBLER code. (sh_frob_section): Likewise. (sh_frob_file): Call sh_frob_section. (md_convert_frag): If BFD_ASSEMBLER, change type of headers, and call section_symbol rather than seg_info (seg)->dot. (md_section_align): Add OBJ_ELF version. (SWITCH_TABLE_CONS): Define. (SWITCH_TABLE): Use SWITCH_TABLE_CONS. (md_apply_fix): Change parameter types if BFD_ASSEMBLER. Only handle fx_r_type == 0 if not BFD_ASSEMBLER. Return 0 if BFD_ASSEMBLER. (struct reloc_map): Define if not BFD_ASSEMBLER. (coff_reloc_map): Likewise. (sh_coff_reloc_mangle): Use coff_reloc_map to convert fx_r_type. (tc_gen_reloc): New function if BFD_ASSEMBLER. * write.c (write_relocs): Ifdef out fx_where test which triggers inappropriately for SH ELF. (write_object_file): Call tc_frob_file_before_adjust and obj_frob_file_before_adjust if they are defined. * write.c (write_object_file): Use BFD_RELOC_16, not BFD_RELOC_NONE, when calling fix_new_exp for a broken word.
1996-08-30Fri Aug 30 14:47:38 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c (find_opcode): Fix problem with calculating branch sizes in across sections.
1996-08-30 * gas/v850/misc.s: Tweak register numbers for better testing.Jeff Law2-2/+5
* gas/v850/basic.exp (misc_tests): Corresponding changes.
1996-08-30 * config/tc-850.c (md_assemble): Handle hi() correctly. HandleJeff Law2-5/+48
hi0() too. Bugfix.
1996-08-30 * gas/v850/hilo.s: New testfile.Jeff Law4-1/+45
* gas/v850/basic.exp: Run hilo tests.
1996-08-29Thu Aug 29 11:32:23 1996 James G. Smith <jsmith@cygnus.co.uk>Jackie Smith Cashion1-0/+7
* gas/arm/arm7t.d: Explicitly force little-endian assembly.
1996-08-29Wed Aug 28 19:20:04 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+8
* config/tc-d10v.c (find_opcode): Fix a bug which could generate the wrong opcode for cases like st2w where there are many forms of the same instruction.
1996-08-27 * expr.c (operand): If md_parse_name is defined, call it beforeIan Lance Taylor1-0/+15
calling symbol_find_or_make. * config/tc-ppc.h (md_parse_name): Define. (ppc_parse_name): Declare. * config/tc-ppc.c (reg_name_search): Add regs and regcount parameters. (register_name): Update call to reg_name_search. (cr_operand): New static variable. (cr_names): New static const array. (ppc_parse_name): New function. (md_assemble): If PPC_OPERAND_CR is set in the operand flags, set cr_operand before calling expression. PR 10460.
1996-08-27 * config/tc-hppa.c (tc_gen_reloc): Add new argument toJeff Law1-0/+5
hppa_gen_reloc_type call. Fixing a problem with -mlinker-opt.
1996-08-27Mon Aug 26 18:24:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-7/+26
* tc-d10v.c: Fixed ".word". Fixed problem with range checking on addresses. Improved error messages.
1996-08-27Mon Aug 26 18:24:51 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+6
* config/tc-d10v.c: Fixed ".word". Fixed problem with range checking on addresses. Improved error messages. * doc/c-d10v.texi: Added docs for register pairs.
1996-08-26Mon Aug 26 13:39:27 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-14/+16
* tc-d10v.c (parallel_ok): Fix bug in parallel checking code.
1996-08-26Mon Aug 26 13:39:27 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c (parallel_ok): Fix bug in parallel checking code.
1996-08-26 * ecoff.c (init_file): Initialize fMerge to 1.Ian Lance Taylor1-0/+11
(add_file): Restore old file merging code, but only merge files if fMerge is set. (ecoff_directive_loc): Clear fMerge field of current file. (ecoff_generate_asm_lineno): Likewise.
1996-08-23 * config/tc-v850.c (md_assemble): Rough cut at demandingJeff Law2-0/+29
"ep" or "r30" in sst and sld instructions. (md_apply_fix3): Don't abort. Just warn that we don't have relocs yet.
1996-08-23 * gas/v850/basic.exp (move_tests): Test instruction bit patterns.Jeff Law1-13/+13
* gas/v850/move.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (mem_tests): Test instruction bit patterns.Jeff Law3-13/+25
xfail sst and sld tests. (mov_tests): Remove bogus xfail. * gas/v850/mem.s: sst and sld instructions can only index from "ep" register.
1996-08-23 * gas/v850/basic.exp (logical_tests): Test instruction bit patterns.Jeff Law2-7/+11
Update addresses. * gas/v850/logical.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (jump_tests): Test instruction bit patterns,Jeff Law2-3/+6
but not displacements (yet).
1996-08-23 * config/tc-v850.c (CC_NAME_CNT): Define.Jeff Law2-0/+66
(cc_name): New function. (md_assemble): Handle V850_OPERAND_CC correctly. setf stuff
1996-08-23 * gas/v850/basic.exp (compare_tests): Test instruction bit patterns.Jeff Law2-24/+26
1996-08-23Fri Aug 23 11:40:47 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+6
* doc/c-d10v.texi: Fix typo.
1996-08-23 * gas/v850/basic.exp (branch_tests): Test instruction bit patters,Jeff Law2-20/+23
but not displacements (yet).
1996-08-23 * gas/v850/basic.exp (bit_tests): Test instruction bit patterns.Jeff Law2-4/+6
1996-08-23 * config/tc-v850.c (md_assemble): Don't forget to initializeJeff Law2-0/+4
"insn"!
1996-08-23 * gas/v850/basic.exp (arith_tests): Test instruction bit patterns.Jeff Law2-20/+23
* gas/v850/arith.s: Tweak constants for better testing.
1996-08-23 * gas/v850/basic.exp (misc_tests): No longer expect failuresJeff Law2-4/+8
assembling "ldsr" and "stsr" opcodes. * gas/v850/misc.s: Re-enable assembling of "ldsr" and "stsr" opcodes.
1996-08-23 * config/tc-v850.c (reg_name_search): Generalize to searchJeff Law3-18/+93
any given register table. (register_name): Pass appropriate table and size to reg_name_search. (system_register_name): New function. (SYSREG_NAME_CNT): Define. (md_assemble): Handle operands which are system registers. Still working on the parser..
1996-08-23 * gas/v850/basic.exp (misc_tests): No longer expect failuresJeff Law3-6/+9
assembling "trap" opcodes. * gas/v850/misc.s: Re-enable assembling of "trap" opcodes.
1996-08-23 * gas/v850: New directory with v850 tests.Jeff Law13-0/+597
Beginnings of a gas testsuite for the v850.
1996-08-23 * config/tc-v850.c (md_assemble): If we find a register, but theJeff Law2-11/+16
opcode doesn't want a register, then we don't have a match. (md_assemble): Get size of the instruction from the opcode table. So we choose the right opcode and so that we get the sizes right.
1996-08-23rework operand parsingJ.T. Conklin1-113/+184
1996-08-23 * configure.in: Set and substitute HLDENV.Ian Lance Taylor2-8/+9
* configure: Rebuild. * Makefile.in (HLDENV): New variable. (as.new): Use $(HLDENV).
1996-08-22 * ecoff.c (ecoff_directive_endef): Avoid a division by zero errorIan Lance Taylor1-0/+5
if an array dimension is not known. PR 10426.
1996-08-22Thu Aug 22 10:50:00 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-7/+23
* doc/c-d10v.texi: Cleanup.
1996-08-22Thu Aug 22 10:50:00 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c: Fix a reloc bug caused by my last change. * doc/c-d10v.texi: Cleanup.
1996-08-22parse [reg], lo(exp), and hi(exp)J.T. Conklin1-7/+44
1996-08-21* config/tc-v850.c: New file.J.T. Conklin6-36/+731
* config/tc-v850.h: New file. * configure (v850-*-elf): New target. * configure.in (v850-*-elf): New target.
1996-08-21Wed Aug 21 15:50:54 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt2-0/+236
* c-d10v.texi: New file. * all.texi: Added D10V stuff. * as.texinfo: Added D10V stuff.
1996-08-21Wed Aug 21 15:50:54 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+6
* doc/c-d10v.texi: New file. * doc/all.texi: Added D10V stuff. * doc/as.texinfo: Added D10V stuff.
1996-08-20Tue Aug 20 14:10:02 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-105/+270
* tc-d10v.c: All references to defined symbols should now use the optimal instruction. .float and .double now work.
1996-08-20Tue Aug 20 14:10:02 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+7
* config/tc-d10v.c: All references to defined symbols should now use the optimal instruction. .float and .double now work.
1996-08-19 * config/obj-coff.c (fixup_segment): Adjust PC relative reloc byIan Lance Taylor1-0/+10
section address for the i960 as is done for the i386. PR 10344.
1996-08-15 * mpw-config.in: Add wildcards for config matching, add mips-*-*Stan Shebs1-7/+7
case, forward-include bfd/elf-bfd.h.
1996-08-15Thu Aug 15 13:24:30 1996 Martin M. Hunt <hunt@pizza.cygnus.com>Martin Hunt1-0/+41
* config/tc-d10v.c: Add additional information to the opcode table to help determinine which instructions can be done in parallel.
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