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2016-03-25split up cr16s md_assemble ()Trevor Saunders2-25/+42
2016-03-25rename flag_size_check to flag_allow_nonconst_size and make it a boolTrevor Saunders4-9/+10
2016-03-24gas: sparc: allow ASR registers in the 0..31 range in V9 and laterJose E. Marchesi2-16/+21
2016-03-24make microblaze build with -Wwrite-stringsTrevor Saunders2-4/+9
2016-03-24localize string returned from visium's md_atof ()Trevor Saunders2-1/+6
2016-03-22make more variables constTrevor Saunders12-31/+56
2016-03-22tc-pdp11.c: remove useless codeTrevor Saunders2-2/+5
2016-03-22tc-sparc.c: get rid of wierd usage of strchr ()Trevor Saunders2-6/+18
2016-03-22use do_align () directly in tc-ia64.cTrevor Saunders2-19/+17
2016-03-22replace some raw xmalloc / xrealloc with the XNEW* macrosTrevor Saunders4-20/+33
2016-03-22Fix tic54x regressionAlan Modra2-3/+4
2016-03-22Remove more alloca callsAlan Modra3-5/+16
2016-03-22Add -Wstack-usage to the gcc warning flags list, but only if using a sufficie...Nick Clifton2-1/+23
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess5-0/+54
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess5-6/+36
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess2-0/+8
2016-03-21arc: Remove EF_ARC_CPU_GENERIC constant.Andrew Burgess2-4/+8
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess2-41/+50
2016-03-21gas/arc: Fix test for big-endian arcAndrew Burgess3-0/+15
2016-03-21Remove use of alloca.Nick Clifton24-146/+226
2016-03-20tc-i386.c: store encoded instructions in unsigned char[]Trevor Saunders2-33/+68
2016-03-18Update description of AArch64 assembler directives.Nick Clifton2-4/+45
2016-03-18Fix the disassembly of the AArch64's OOR instruction as a MOV instruction.Nick Clifton3-0/+19
2016-03-18Fix generation of as.1 manual page so that it can be converted to DocBook for...Nick Clifton2-0/+7
2016-03-17testsuite/ChangeLog is no longer supposed to existAlan Modra2-13/+7
2016-03-16[ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang8-23/+766
2016-03-16Fix checking bignum values that are being inserted into byte sized containers.Nick Clifton6-8/+80
2016-03-15Update x86 register name documentation.Ulrich Drepper2-7/+48
2016-03-10PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targetsMickael Guene7-8/+101
2016-03-09fixup -Wshadow warnings on gcc-4.7Trevor Saunders2-17/+25
2016-03-08[ARC] Allow non-instruction relocations within .text sectionsClaudiu Zissulescu3-0/+16
2016-03-07[ARM] Add support for Cortex-R8Thomas Preud'homme3-0/+9
2016-03-07Add const qualifiers at various places.Trevor Saunders16-147/+154
2016-03-04[ARM] Build attributes for ARMv8.1-A AdvSIMDMatthew Wahab4-1/+46
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab7-48/+255
2016-03-02Adjust testsuite/gas/i386/x86_64-intel.d for COFFH.J. Lu2-1/+5
2016-02-29[ARC] Local symbols relocation cleanupClaudiu Zissulescu6-37/+66
2016-02-29[ARC] General fixes.Claudiu Zissulescu2-1/+5
2016-02-26Add aarch64-*-rtems* targetJoel Sherrill1-1/+1
2016-02-26Add ChangeLog entries for PR ld/19645H.J. Lu1-0/+38
2016-02-26Properly implement STT_COMMONH.J. Lu20-8/+342
2016-02-25Convert more variables to a constant form.Trevor Saunders42-135/+205
2016-02-25gas: Update tests for big-endian arc targetsAndrew Burgess4-3/+10
2016-02-24[GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H ins...Renlin Li8-39/+801
2016-02-24[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.Renlin Li2-7/+86
2016-02-24[OPCODES][ARM][1/3]Add armv8.2 fp16 instruction dissembler support.Renlin Li3-3/+8
2016-02-24[OPCODES][ARM]Fix mask for a few coprocessor opcodes.Renlin Li3-0/+50
2016-02-24[OPCODE][ARM]Correct disassembler for cdp/cdp2, mcr/mcr2, mrc/mrc2, ldc/ldc2,...Renlin Li3-2/+8
2016-02-24[ARM][gas] Add support for Cortex-A32Kyrylo Tkachov3-0/+8
2016-02-24[ARM][doc] Document cortex-a17 mcpu optionKyrylo Tkachov2-0/+5
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