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2020-06-10gas: Fix checking for backwards .org with negative offsetAlex Coplan8-2/+29
2020-05-20Fix the ARM assembler to generate a Realtime profile for armv8-r.Alexander Fedotov6-10/+21
2020-05-18Re: Fix tight loop on recursively-defined symbolsAlan Modra2-0/+6
2020-05-15Fix tight loop on recursively-defined symbolsAlan Modra6-3/+48
2020-05-07gas: PR 25863: Fix scalar vmul inside it block when assembling for MVEAndre Simoes Dias Vieira4-9/+29
2020-04-21BFD: Exclude sections with no content from compress check.Tamar Christina3-0/+28
2020-03-16gas, arm: Fix bad backportAndre Vieira1-1/+0
2020-03-13gas, arm: PR25660L Fix vadd/vsub with lt and le condition codes for MVEAndre Vieira8-3/+123
2020-02-10x86: Accept Intel64 only instruction by defaultH.J. Lu5-12/+52
2020-02-10aarch64: Fix MOVPRFX markup for bf16 conversionsRichard Sandiford6-2/+95
2020-02-06[2.34] Mention x86 assembler options to align branchesH.J. Lu2-0/+10
2020-02-01Re-enable development.Nick Clifton2-10/+15
2020-02-01Set version to 2.34, turn off development, add changelog entriesbinutils-2_34Nick Clifton3-184/+188
2020-01-31arm: PR gas/25472 Enable DSP instructions with +mveAndre Vieira3-6/+159
2020-01-31Fix compile time build problem building the s390 assembler.Nick Clifton2-1/+6
2020-01-31[ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.Srinath Parvathaneni4-4/+75
2020-01-31Updated translations for some of the binutils sub-directoriesNick Clifton3-6008/+7790
2020-01-27AArch64: Fix cfinv disassembly issuesTamar Christina3-0/+13
2020-01-21x86: VCVTNEPS2BF16{X,Y} should permit broadcastingJan Beulich5-0/+25
2020-01-20Updated translations for various binutils sub-directoriesNick Clifton2-3001/+3886
2020-01-18Set BFD_VERSION to 2.33.90. Regenerate configure and pot files.Nick Clifton3-472/+482
2020-01-18Add markers for 2.34 branch to the NEWS files and ChangeLogs.Nick Clifton2-0/+6
2020-01-17x86: Add {vex} pseudo prefixH.J. Lu5-11/+22
2020-01-17Forgot to add testcases to commit for [binutils][arm] PR25376 Change MVE ...Andre Vieira4-0/+30
2020-01-16[binutils][arm] PR25376 Change MVE into a CORE_HIGH featureAndre Vieira2-7/+16
2020-01-16x86: drop found_cpu_match local variableJan Beulich2-8/+7
2020-01-16x86: VPEXTRQ/VPINSRQ are unavailable outside of 64-bit modeJan Beulich4-0/+42
2020-01-15MSP430: Fix relocation overflow when using #lo(EXP) macroJozef Lawrynowicz5-11/+65
2020-01-15Reinstate gas em=freebsd for sparc-freebsdAlan Modra2-0/+5
2020-01-14x86: Updated align branch tests for Darwin and i686-pc-elfLili Cui22-179/+246
2020-01-14Fix various assembler testsuite failures for the Z80 target.Sergey Belyashov11-126/+244
2020-01-13[gas][aarch64] Turn on SVE when using f32mm or f64mm extensionsMatthew Malcomson2-2/+7
2020-01-13[ARC][committed] Code cleanup and improvements.Claudiu Zissulescu4-4/+24
2020-01-13ubsan: wasm32: signed integer overflowAlan Modra2-2/+6
2020-01-13tic4x: sign extension using shiftsAlan Modra2-1/+6
2020-01-10HPUX gas testsuite fixesAlan Modra3-2/+8
2020-01-09Fix compile time warnings about comparisons always being false.Sergey Belyashov2-89/+101
2020-01-09x86: refine when to trigger optimizationsJan Beulich2-10/+15
2020-01-09x86-64: assert sane internal state for REX conversionsJan Beulich2-1/+8
2020-01-09x86: consistently convert to byte registers for TEST w/ imm optimizationJan Beulich2-11/+15
2020-01-09x86: SYSENTER/SYSEXIT are unavailable in 64-bit mode on AMDJan Beulich7-0/+60
2020-01-08Document the fact that the assembler's alignment pseudo-ops can be issued wit...Nick Clifton2-9/+20
2020-01-08Make the assembler generate an error if there is an attempt to define a secti...Nick Clifton6-0/+34
2020-01-08ubsan: z8k: index 10 out of bounds for type 'unsigned int const[10]'Alan Modra2-2/+7
2020-01-07[ARC] Improve parsing instruction operands.Claudiu Zissulescu2-91/+117
2020-01-03Allow individual targets to decide if string escapes should be allowed. Disa...Sergey Belyashov7-9/+22
2020-01-03Updated Swedish translation for the GAS subdirectory.Nick Clifton2-408/+185
2020-01-03Arm64: correct address index operands for LD1RO{H,W,D}Jan Beulich3-24/+29
2020-01-03Arm64: correct {su,us}dot SIMD encodingsJan Beulich3-12/+34
2020-01-03Arm64: correct uzp{1,2} mnemonicsJan Beulich3-8/+13
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