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2018-07-18x86: Split vcvtps2{,u}qq and vcvttps2{,u}qqH.J. Lu3-0/+16
2018-07-18Regenerate files and add changelog entries for 2.31.1 releasebinutils-2_31_1Nick Clifton2-10/+15
2018-07-14Reset branch back to development modeNick Clifton2-10/+14
2018-07-142.31 Release pointbinutils-2_31Nick Clifton3-288/+305
2018-07-13Allow bit-patterns in the immediate field of ARM neon mov instructions.Nick Clifton4-4/+33
2018-07-12This patch adds support for the SSBB and PSSBB speculation barrier instructio...Nick Clifton3-363/+374
2018-07-12Resolve merge conflicts.Nick Clifton4-0/+205
2018-07-12Add support for the ARM speculation barrier instructions SSBB and PSSBB.Sudakshina Das8-6/+29
2018-07-12Add remainder of Em16 restrictions for AArch64 gas.Tamar Christina4-0/+205
2018-07-06Fix the read/write flag for these registers on AArch64Tamar Christina3-0/+33
2018-07-06Fix bug generating relocations for notes created by the assembler.Nick Clifton2-3/+8
2018-07-05Update Russian, Bulgarian and Brazilian Portuguese translations for various c...Nick Clifton2-2992/+3079
2018-06-29[Patch AArch64] Warn on unpredictable stlxrb , stlxrh and stlxr cases.Ramana Radhakrishnan4-0/+44
2018-06-29Fix AArch64 encodings for by element instructions.Tamar Christina7-40638/+64846
2018-06-27gas object file locationsAlan Modra3-112/+117
2018-06-26Updated translations.Nick Clifton2-2993/+3074
2018-06-24Reset version to 2.30.90. Update configure files. Regenerate pot files.Nick Clifton3-2957/+2616
2018-06-24Add 2.30 branch notes to ChangeLogs and NEWS files.Nick Clifton2-0/+7
2018-06-22Correct negs aliasing on AArch64.Tamar Christina3-0/+180
2018-06-21Regen doc/Makefile.inAlan Modra3-4/+9
2018-06-20Change the ARM assembler's ADR and ADRl pseudo-ops so that they will only set...Nick Clifton7-6/+44
2018-06-20RISC-V: Accept constant operands in la and llaSebastian Huber9-0/+103
2018-06-19Bump to autoconf 2.69 and automake 1.15.1Simon Marchi10-2532/+2217
2018-06-14MIPS: Add Global INValidate ASE supportFaraz Shahbazker15-0/+125
2018-06-14MIPS: Add CRC ASE support (ChangeLog)Maciej W. Rozycki1-0/+1
2018-06-13MIPS: Add CRC ASE supportScott Egerton20-0/+232
2018-06-11MIPS/GAS: Correct `-O0' and `-O' option help, add `-O1' and `-O2'Maciej W. Rozycki2-2/+8
2018-06-08[arm][gas] Add support for Arm Cortex-A76kyrtka013-0/+9
2018-06-08[AArch64][gas] Add support for Arm Cortex-A76kyrtka013-0/+9
2018-06-08Prevent undefined FMOV instructions being accepted by the AArch64 assembler.Egeyar Bagcioglu5-1/+101
2018-06-07Fix AArch64 unintialized variable which can cause diagnostic failures.Tamar Christina2-0/+8
2018-06-06Update the AArch64 assembler to note that the Qualcomm Saphira cpu supports A...Sameera Deshpande2-1/+6
2018-06-05Another s12z regenAlan Modra2-1/+5
2018-06-04xtensa: add separate property sections optionMax Filippov2-1/+32
2018-06-01Bump version number to 2.30.52H.J. Lu2-10/+14
2018-06-01Drop view when consuming line infoAlexandre Oliva2-0/+5
2018-06-01x86: don't emit REX.W for SLDT and STRJan Beulich3-4/+9
2018-06-01x86: relax redundant REX prefix checkJan Beulich5-2/+37
2018-06-01x86: simplify control register checkJan Beulich2-5/+7
2018-06-01x86: tighten condition for emitting LOCK on control register accessesJan Beulich2-4/+9
2018-06-01x86/Intel: accept "oword ptr" for INVPCIDJan Beulich7-0/+16
2018-05-30Add znver2 support.Amit Pawar12-36/+154
2018-05-25s12z regenAlan Modra2-0/+6
2018-05-24RISC-V: Fix .align handling when .option norelax.Jim Wilson7-10/+75
2018-05-21Remove fake operand handling for extended mnemonics.Peter Bergner6-455/+470
2018-05-18RISC-V: Add RV32E support.Jim Wilson3-11/+73
2018-05-18Add support for the Freescale s12z processor.John Darrington213-0/+8009
2018-05-16NDS32/GAS: Correct an `expr' global shadowing error for pre-4.8 GCCMaciej W. Rozycki2-2/+7
2018-05-15Implement Read/Write constraints on system registers on AArch64Tamar Christina7-5/+35
2018-05-15Allow non-fatal errors to be emitted and for disassembly notes be placed on A...Tamar Christina2-51/+89
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