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2016-05-20Preserve addend for R_386_GOT32 and R_X86_64_GOT32H.J. Lu6-0/+52
2016-05-20MIPS: Fix the encoding of immediates with microMIPS JALXMaciej W. Rozycki9-0/+206
2016-05-18gas/arc: Fix array overrun when checking opcode arrayAndrew Burgess3-0/+6
2016-05-18gas/arc: Add guard against operand array overflow.Andrew Burgess2-0/+3
2016-05-18PPC_OPERAND_SIGNOPT range.Alan Modra2-2/+2
2016-05-17Make ARMv8-M GAS tests pass on non ELF targetsThomas Preud'homme15-22/+23
2016-05-13Accept valid one byte signed and unsigned values for the IMM8 operand.Peter Bergner2-0/+4
2016-05-12Use correct regexp syntax in ARM PR20068 testNick Clifton1-2/+2
2016-05-11Update pr20068 test to allow for big endian ARM configurationNick Clifton1-2/+2
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune3-0/+35
2016-05-11Ensure that padding in the constant pool uses constant values.Nick Clifton2-0/+28
2016-05-11Skip new ARM security extension tests on non-ELF based targets.Nick Clifton10-25/+9
2016-05-10Enable Intel RDPID instruction.Alexander Fomin9-2/+87
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme9-0/+268
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme10-0/+171
2016-05-09opcodes,gas: sparc: fix mnemonic of faligndataiJose E. Marchesi2-2/+2
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu2-0/+29
2016-05-03Assume that the GAS testsuite for the AVR is being run without -mlink-relax s...Pitchumani Sivanupandi1-0/+1
2016-04-22MIPS/GAS: Fix an ISA override not lifting ABI restrictionsMaciej W. Rozycki44-0/+688
2016-04-20[AArch64] Support RAS extension for ARMv8 onwards.Matthew Wahab5-0/+236
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess2-0/+137
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess4-0/+38
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess2-0/+79
2016-04-14gas/arc: Unify tests run on big/little endian arc assemblerAndrew Burgess3-3/+2
2016-04-14Fix copying Solaris binaries with objcopy.Nick Clifton2-4/+4
2016-04-13Fix disassembly of the V850's LD.BU instruction.Nick Clifton3-0/+33
2016-04-13MIPS/GAS: Correct branch relaxation for weak symbolsMaciej W. Rozycki8-0/+103
2016-04-13MIPS/GAS: Relax branches to symbols resolved at link timeMaciej W. Rozycki13-0/+170
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu11-3/+92
2016-04-12Update ARC instruction data-base.Claudiu Zissulescu4-0/+63
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu9-0/+230
2016-04-12Remove unneeded AUX register symbols.Claudiu Zissulescu2-0/+379
2016-04-09MIPS/GAS: Sanitize `.option picX' pseudo-opMaciej W. Rozycki5-0/+45
2016-04-09MIPS/GAS: Disallow `.option picX' with VxWorks PICMaciej W. Rozycki5-0/+20
2016-04-08Fix regexps in PR19910 test to cope with COFF and AOUT sparc targets.Nick Clifton1-3/+4
2016-04-07arc/nps400: Add new instructionsAndrew Burgess2-0/+34
2016-04-07Allow integer contants to have a U suffix. Improve error reporting for missi...Nick Clifton6-2/+32
2016-04-06Fix MSP430 assembler's detection of NOP and EINT.Nick Clifton2-6/+14
2016-04-05arc/nps400: Add additional instructionsAndrew Burgess2-5/+133
2016-04-05[ARC] Fix support for double assist instructions.Claudiu Zissulescu3-0/+78
2016-04-05[ARM] Add ARMv8.2 FP16 vmul/vmla/vmls (by scalar)Jiong Wang8-0/+145
2016-04-05[ARC] Don't allow pc-rel relocations for J* instructions.Claudiu Zissulescu3-0/+15
2016-04-04Don't use vec_disp8 encoding with the .d32 suffixH.J. Lu4-8/+19
2016-04-04Add a testcase for PR gas/19498H.J. Lu3-0/+22
2016-03-30[ARC] Allow equ redefintion tests for ARC.Claudiu Zissulescu3-3/+3
2016-03-30[ARC] Fix warn.exp test error.Claudiu Zissulescu1-1/+1
2016-03-29[ARC] Add support for Quarkse opcodes.Claudiu Zissulescu4-0/+175
2016-03-21arc/nps400: Add first nps400 instructionsAndrew Burgess4-0/+47
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess3-0/+10
2016-03-21gas/arc: Fix test for big-endian arcAndrew Burgess2-0/+10
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