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2016-06-14[ARC] Add ldbit for npsGraham Markall2-0/+66
2016-06-14[ARC] Add deep packet inspection instructions for npsGraham Markall2-35/+136
2016-06-14[ARC] Add arithmetic and logic instructions for npsGraham Markall2-0/+282
2016-06-13MIPS/GAS: Don't convert RELA JALR relocations on R6Maciej W. Rozycki11-0/+316
2016-06-13Fix compile time warning messages building with gcc v6.1.1Nick Clifton1-1/+1
2016-06-07[ARM] Add command line option for RAS extension.Matthew Wahab2-0/+56
2016-06-03Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu.Peter Bergner6-1/+115
2016-06-03Handle indirect branches for AMD64 and Intel64H.J. Lu5-24/+74
2016-06-02Add support for 48 and 64 bit ARC instructions.Andrew Burgess2-0/+73
2016-06-01Add support for some variants of the ARC nps400 rflt instruction.Graham Markall2-50/+56
2016-05-29Add .noavx512XX directives to x86 assemblerH.J. Lu5-0/+783
2016-05-27Update x86 CPU_XXX_FLAGS handlingH.J. Lu14-4/+421
2016-05-26Add support for new POWER ISA 3.0 instructions.Peter Bergner4-0/+20
2016-05-26Append ".p2align 4" to some x86 directive testsH.J. Lu10-0/+10
2016-05-25Require another match for AVX512VLH.J. Lu9-0/+214
2016-05-25Enable VREX for AVX512 directivesH.J. Lu3-0/+16
2016-05-25Reimplement .no87/.nommx/.nosse/.noavx directivesH.J. Lu17-0/+135
2016-05-25Only generate VMOV.I64 instructions for loading constant floating point value...Chua Zheng Leong2-1/+4
2016-05-24MIPS/GAS: Treat local jump relocs the same no matter if REL or RELAMaciej W. Rozycki5-0/+130
2016-05-20Preserve addend for R_386_GOT32 and R_X86_64_GOT32H.J. Lu6-0/+52
2016-05-20MIPS: Fix the encoding of immediates with microMIPS JALXMaciej W. Rozycki9-0/+206
2016-05-18gas/arc: Fix array overrun when checking opcode arrayAndrew Burgess3-0/+6
2016-05-18gas/arc: Add guard against operand array overflow.Andrew Burgess2-0/+3
2016-05-18PPC_OPERAND_SIGNOPT range.Alan Modra2-2/+2
2016-05-17Make ARMv8-M GAS tests pass on non ELF targetsThomas Preud'homme15-22/+23
2016-05-13Accept valid one byte signed and unsigned values for the IMM8 operand.Peter Bergner2-0/+4
2016-05-12Use correct regexp syntax in ARM PR20068 testNick Clifton1-2/+2
2016-05-11Update pr20068 test to allow for big endian ARM configurationNick Clifton1-2/+2
2016-05-11Add MIPS32 DSPr3 support.Matthew Fortune3-0/+35
2016-05-11Ensure that padding in the constant pool uses constant values.Nick Clifton2-0/+28
2016-05-11Skip new ARM security extension tests on non-ELF based targets.Nick Clifton10-25/+9
2016-05-10Enable Intel RDPID instruction.Alexander Fomin9-2/+87
2016-05-10Add support for ARMv8-M Mainline with DSP extensionThomas Preud'homme9-0/+268
2016-05-10Add support for ARMv8-M security extensions instructionsThomas Preud'homme10-0/+171
2016-05-09opcodes,gas: sparc: fix mnemonic of faligndataiJose E. Marchesi2-2/+2
2016-05-04[ARC] Add SYNTAX_NOP and SYNTAX_1OP for extension instructionsClaudiu Zissulescu2-0/+29
2016-05-03Assume that the GAS testsuite for the AVR is being run without -mlink-relax s...Pitchumani Sivanupandi1-0/+1
2016-04-22MIPS/GAS: Fix an ISA override not lifting ABI restrictionsMaciej W. Rozycki44-0/+688
2016-04-20[AArch64] Support RAS extension for ARMv8 onwards.Matthew Wahab5-0/+236
2016-04-19opcodes/arc: Add yet more nps instructionsAndrew Burgess2-0/+137
2016-04-19opcodes/arc: Add more nps instructionsAndrew Burgess4-0/+38
2016-04-14arc/nps400 : New cmem instructions and associated relocationAndrew Burgess2-0/+79
2016-04-14gas/arc: Unify tests run on big/little endian arc assemblerAndrew Burgess3-3/+2
2016-04-14Fix copying Solaris binaries with objcopy.Nick Clifton2-4/+4
2016-04-13Fix disassembly of the V850's LD.BU instruction.Nick Clifton3-0/+33
2016-04-13MIPS/GAS: Correct branch relaxation for weak symbolsMaciej W. Rozycki8-0/+103
2016-04-13MIPS/GAS: Relax branches to symbols resolved at link timeMaciej W. Rozycki13-0/+170
2016-04-12Add support for .extCondCode, .extCoreRegister and .extAuxRegister.Claudiu Zissulescu11-3/+92
2016-04-12Update ARC instruction data-base.Claudiu Zissulescu4-0/+63
2016-04-12Add support for .extInstruction pseudo-op.Claudiu Zissulescu9-0/+230