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AgeCommit message (Expand)AuthorFilesLines
2021-04-29x86: relax when/how @size can be usedJan Beulich4-0/+77
2021-04-29x86: allow @size to also (sensibly) apply to sectionsJan Beulich3-6/+23
2021-04-28x86: honor signedness of PC-relative relocationsJan Beulich9-0/+146
2021-04-26x86: optimize LEAJan Beulich11-7/+415
2021-04-26x86-64: have value properly checked when resolving fixupJan Beulich3-0/+45
2021-04-23Fix type of .persistent.bss sectionEric Botcazou3-2/+11
2021-04-21Adjust readelf's output so that section symbols without a name as shown with ...Nick Clifton33-133/+133
2021-04-19Fix an assembler testuite failure when checking a toolchain configured with -...Nick Clifton1-0/+2
2021-04-19aarch64: New instructions for maintenance of GPT entries cached in a TLBPrzemyslaw Wirkus2-0/+10
2021-04-19aarch64: Add new data cache maintenance operationsPrzemyslaw Wirkus2-0/+6
2021-04-16aarch64: Define RME system registersPrzemyslaw Wirkus5-0/+33
2021-04-16RISC-V: PR27436, make operand C> work the same as >.Nelson Chu6-0/+103
2021-04-16RISC-V: compress "addi d,CV,z" to "c.mv d,CV"Lifang Xia2-9/+9
2021-04-13m68hc11 gas testsuite wartAlan Modra1-13/+9
2021-04-12Power10 bignum operandsAlan Modra2-0/+29
2021-04-12RISC-V: Support to parse the multi-letter prefix in the architecture string.Nelson Chu22-23/+31
2021-04-09AArch64: Fix Diagnostic messaging for LD/ST Exclusive.Tejas Belagod2-6/+7
2021-04-09PowerPC disassembly of pcrel referencesAlan Modra3-51/+51
2021-04-08PR27676, PowerPC missing extended dcbt, dcbtst mnemonicsAlan Modra5-4/+155
2021-04-07Fix pr27217 testcase failureAlan Modra1-3/+3
2021-04-06Fix a problem assembling AArch64 sources when a relocation is generated again...Nick Clifton2-0/+31
2021-03-29x86: VPSADBW's source operands are also commutativeJan Beulich3-2/+4
2021-03-26x86-64: don't accept supposedly disabled MOVQ formsJan Beulich3-0/+25
2021-03-25[NIOS2] Fix disassembly of br.n instruction.Hafiz Abid Qadeer2-0/+14
2021-03-25x86: flag bad S/G insn operand combinationsJan Beulich11-176/+73
2021-03-25x86: flag as bad AVX512 insns with EVEX.z set but EVEX.aaa clearJan Beulich2-1/+5
2021-03-25x86: fix AMD Zen3 insnsJan Beulich6-23/+77
2021-03-25x86-64: limit breakage from gcc movdir64b et al workaroundJan Beulich14-33/+149
2021-03-25PR27647 PowerPC extended conditional branch mnemonicsAlan Modra2-8/+8
2021-03-23x86: unbreak certain MPX insn operand formsJan Beulich2-18/+28
2021-03-16RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructionsKuan-Lin Chen4-0/+148
2021-03-12aarch64: Add few missing system registersPrzemyslaw Wirkus5-0/+51
2021-03-10x86/Intel: correct AVX512 S/G disassemblyJan Beulich6-930/+930
2021-03-10x86: correct decoding of nop/reserved space (0f18 ... 0x1f)Jan Beulich7-16/+2363
2021-03-09x86-64: make SYSEXIT handling similar to SYSRET'sJan Beulich11-7/+21
2021-02-26Correct an error message in the ARM assembler.Nick Clifton3-0/+22
2021-02-19RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types for .insn.Nelson Chu2-19/+31
2021-02-17h8300 complains about new section defined without attributesAlan Modra1-0/+1
2021-02-16gas: Allow SHF_GNU_RETAIN on all sectionsH.J. Lu5-0/+43
2021-02-16x86: CVTPI2PD has special behaviorJan Beulich14-93/+147
2021-02-16x86: honor template rather than actual operands when updating i.xstateJan Beulich3-3/+3
2021-02-16x86: record register use for SIMD insns without respective explicit operandsJan Beulich7-0/+36
2021-02-16x86: make common property tests commonJan Beulich10-108/+10
2021-02-16x86: make 16-bit ENQCMD test actually test ENQCMDJan Beulich2-12/+17
2021-02-15IBM Z: Implement instruction set extensionsAndreas Krebbel3-0/+56
2021-02-12Change the readelf and objdump programs so that they will automatically follo...Nick Clifton2-2/+2
2021-02-12gas testsuite: adjust recently added tests for hppaAlan Modra5-12/+12
2021-02-09Add a sanity check of files include by .incbin.Nick Clifton4-0/+8
2021-02-09Remove arm-symbianelfAlan Modra10-10/+10
2021-02-09Prevent a bad .Psize expression from triggering a memory access violation.Nick Clifton4-0/+13
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