| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2018-11-07 | rx: Add target rx-*-linux. | Yoshinori Sato | 2 | -2/+2 |
| 2018-11-06 | [arm] fix testsuite breakage on pe-coff | Matthew Malcomson | 1 | -2/+4 |
| 2018-11-06 | [arm] Check for neon and condition in vcvt.f16.f32 | Matthew Malcomson | 5 | -14/+27 |
| 2018-11-06 | x86: correctly handle VPBROADCASTD with EVEX.W set outside of 64-bit mode | Jan Beulich | 3 | -0/+4 |
| 2018-11-06 | x86: correctly handle VMOVD with EVEX.W set outside of 64-bit mode | Jan Beulich | 3 | -0/+14 |
| 2018-11-06 | x86: correctly handle KMOVD with VEX.W set outside of 64-bit mode | Jan Beulich | 2 | -0/+4 |
| 2018-11-06 | x86: adjust {,E}VEX.W handling for PEXTR* / PINSR* | Jan Beulich | 7 | -0/+50 |
| 2018-11-06 | x86: adjust {,E}VEX.W handling outside of 64-bit mode | Jan Beulich | 11 | -29/+219 |
| 2018-11-06 | x86: fix various non-LIG templates | Jan Beulich | 9 | -0/+420 |
| 2018-11-06 | x86: allow {store} to select alternative {,}PEXTRW encoding | Jan Beulich | 4 | -2/+44 |
| 2018-11-06 | x86: add more VexWIG | Jan Beulich | 8 | -18/+58 |
| 2018-11-05 | x86: Disable GOT relaxation with data prefix | H.J. Lu | 1 | -1/+1 |
| 2018-11-01 | Fix ld action in run_dump_test | Thomas Preud'homme | 1 | -0/+8 |
| 2018-10-31 | [GAS][ARM] Fix ARMv8.1 AdvSIMD testism | Andre Vieira | 1 | -1/+0 |
| 2018-10-31 | [GAS][ARM] Fix UDF testism | Andre Vieira | 1 | -23/+19 |
| 2018-10-31 | [GAS][ARM] Fix failing Armv1 test | Andre Vieira | 1 | -18/+18 |
| 2018-10-23 | S/390: Support vector alignment hints | Andreas Krebbel | 2 | -0/+16 |
| 2018-10-22 | gas simple-forward test | Alan Modra | 4 | -2/+29 |
| 2018-10-22 | Apply alpha BFD_RELOC_8 fixups | Alan Modra | 2 | -4/+2 |
| 2018-10-20 | PR23800, .eqv doesn't always defer expression evaluation | Alan Modra | 3 | -0/+21 |
| 2018-10-19 | Arm: Skip new binary decode tests on pe targets | Tamar Christina | 2 | -2/+2 |
| 2018-10-19 | Arm: Fix disassembler crashing on -b binary when thumb file and thumb not for... | Tamar Christina | 3 | -0/+11 |
| 2018-10-19 | This set of changes clarifies the conditions for the R5900 short loop fix and... | Fredrik Noring | 2 | -5/+45 |
| 2018-10-16 | AArch64: Fix error checking for SIMD udot (by element) | Matthew Malcomson | 3 | -0/+21 |
| 2018-10-11 | x86: add {,V}MOVQ cases to xmmword test | Jan Beulich | 2 | -0/+14 |
| 2018-10-09 | [PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRS | Sudakshina Das | 7 | -0/+204 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registers | Sudakshina Das | 3 | -0/+18 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 7/9] Add BTI instruction | Sudakshina Das | 5 | -4/+32 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions | Sudakshina Das | 3 | -1/+7 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instruction | Sudakshina Das | 3 | -0/+3 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructions | Sudakshina Das | 6 | -0/+43 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-A | Sudakshina Das | 3 | -0/+28 |
| 2018-10-09 | [PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-A | Sudakshina Das | 2 | -0/+50 |
| 2018-10-05 | x86: Add Intel ENCLV to assembler and disassembler | H.J. Lu | 4 | -0/+4 |
| 2018-10-05 | [Arm, 3/3] Add Execution and Data Prediction instructions for AArch32 | Sudakshina Das | 5 | -0/+36 |
| 2018-10-05 | [Arm, 2/3] Add instruction SB for AArch32 | Sudakshina Das | 7 | -0/+55 |
| 2018-10-05 | [Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32 | Sudakshina Das | 1 | -0/+17 |
| 2018-10-05 | or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns | Richard Henderson | 2 | -0/+45 |
| 2018-10-05 | or1k: Add the l.adrp insn and supporting relocations | Stafford Horne | 6 | -0/+47 |
| 2018-10-05 | or1k: Add relocations for high-signed and low-stores | Richard Henderson | 7 | -8/+148 |
| 2018-10-03 | AArch64: Add MOVPRFX tests and update testsuite | Tamar Christina | 71 | -0/+875 |
| 2018-10-03 | AArch64: Constraint disassembler and assembler changes. | Tamar Christina | 5 | -245/+253 |
| 2018-10-02 | RISC-V: Add fence.tso instruction | Palmer Dabbelt | 2 | -0/+13 |
| 2018-09-26 | Skip broken assembler test on Windows host. | Sandra Loosemore | 1 | -1/+5 |
| 2018-09-25 | S/390: Fix symbolic displacement in lay | Andreas Krebbel | 3 | -0/+7 |
| 2018-09-21 | Fix more fallout from 17f6ade235fc | Alan Modra | 1 | -3/+2 |
| 2018-09-20 | gas: Update expected outputs of "readelf -wL" | H.J. Lu | 11 | -70/+70 |
| 2018-09-20 | Andes Technology has good news for you, we plan to update the nds32 port of b... | Nick Clifton | 9 | -17/+24 |
| 2018-09-17 | RISC-V: bge[u] should get higher priority than ble[u]. | Jim Wilson | 2 | -0/+18 |
| 2018-09-17 | x86: Set EVex=2 on EVEX.128 only vmovd and vmovq | H.J. Lu | 5 | -0/+69 |
