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2011-03-24gas: blackfin: reject invalid register destinations for vector add/subMike Frysinger3-0/+17
The destination registers with vector add/sub insns must be different, so make sure gas rejects attempt to write these. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24gas: blackfin: test all 16bit insnsMike Frysinger6-11137/+49199
The current 16bit insn test doesn't actually cover all illegal insns since it stops at 0xa000 instead of 0xc000. But rather than address that, replace it with a test that covers all 16bit insns. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24gas: blackfin: catch invalid dest dregs in dsp mult insnsMike Frysinger3-0/+12
While we were catching a few mismatches in vectorized dsp mult insns, the error we displayed was misleading. Once we fix that up, we can convert previously dead code into proper checking for destination dreg matching. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24gas: blackfin: catch invalid register combinations with SEARCH/BITMUXMike Frysinger3-0/+10
The destination registers for SEARCH cannot be the same. Same rule for the source registers for BITMUX. Signed-off-by: Mike Frsyinger <vapier@gentoo.org>
2011-03-18gas/Alan Modra5-6/+13
* input-scrub.c (line_numberT): Delete. (input_scrub_close): Reset line counters. * messages.c (as_show_where): Don't print invalid line number. (as_warn_internal, as_bad_internal): Likewise. gas/testsuite/ * gas/elf/bad-size.err: Adjust expected error. * gas/i386/bad-size.warn: Likewise. * gas/i386/inval-equ-2.l: Likewise. * gas/symver/symver2.l: Likewise.
2011-03-17Add a testase for PR gas/12589.H.J. Lu4-0/+36
2011-03-17 H.J. Lu <hongjiu.lu@intel.com> PR gas/12589 * gas/i386/pr12589-1.d: New. * gas/i386/pr12589-1.s: Likewise. * gas/i386/i386.exp: Run pr12589-1.
2011-03-16Add --size-check=[error|warning].H.J. Lu5-0/+36
gas/ 2011-03-16 H.J. Lu <hongjiu.lu@intel.com> * as.c (show_usage): Add --size-check=. (parse_args): Add and handle OPTION_SIZE_CHECK. * as.h (flag_size_check): New. * config/obj-elf.c (elf_frob_symbol): Use as_bad to report bad .size directive only for --size-check=error. * doc/as.texinfo: Document --size-check=. gas/testsuite/ 2011-03-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/bad-size.d: New. * gas/i386/bad-size.s: Likewise. * gas/i386/bad-size.warn: Likewise. * gas/i386/i386.exp: Run bad-size for ELF targets.
2011-03-07Revert the last change on gas/elf/bad-size.err.H.J. Lu2-1/+5
2011-03-06 H.J. Lu <hongjiu.lu@intel.com> * gas/elf/bad-size.err: Revert the last change.
2011-03-06Mention symbol name in non-constant .size expression.H.J. Lu2-1/+5
gas/ 2011-03-05 H.J. Lu <hongjiu.lu@intel.com> * config/obj-elf.c (elf_frob_symbol): Mention symbol name in non-constant .size expression. gas/testsuite/ 2011-03-05 H.J. Lu <hongjiu.lu@intel.com> * gas/elf/bad-size.err: Updated.
2011-03-05Revert the last change.H.J. Lu2-7/+3
2011-03-05Set x86_cie_data_alignment to -4 for x32.H.J. Lu2-3/+7
gas/ 2011-03-04 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (x86_cie_stack_alignment): New. (md_begin): Set x86_cie_data_alignment if it isn't set. Set x86_cie_stack_alignment. (i386_target_format): Set x86_cie_data_alignment to -4 for x32. (tc_x86_frame_initial_instructions): Use x86_cie_stack_alignment instead of x86_cie_data_alignment on SP and RA. gas/testsuite/ 2011-03-04 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/cfi/cfi-x86_64.d: Updated.
2011-02-28 opcodes/Maciej W. Rozycki4-0/+82
* mips-opc.c (mips_builtin_opcodes): Correct register use annotation of "alnv.ps". gas/testsuite/ * gas/mips/alnv_ps-swap.d: New test for ALNV.PS instruction branch swapping. * gas/mips/alnv_ps-swap.s: Source for the new test. * gas/mips/mips.exp: Run the new test.
2011-02-28 gas/Maciej W. Rozycki4-0/+25
* config/tc-mips.c (append_insn): Disable branch relaxation for DSP instructions. gas/testsuite/ * gas/mips/relax-bposge.l: New test for DSP branch relaxation. * gas/mips/relax-bposge.s: Source for the new test. * gas/mips/mips.exp: Run the new test.
2011-02-28 gas/Maciej W. Rozycki6-14/+425
* config/tc-mips.c (RELAX_BRANCH_ENCODE): Encode the temporary register to use. (RELAX_BRANCH_UNCOND): Adjust accordingly. (RELAX_BRANCH_LIKELY): Likewise. (RELAX_BRANCH_LINK): Likewise. (RELAX_BRANCH_TOOFAR): Likewise. (RELAX_BRANCH_AT): New macro. (append_insn): Encode the temporary register to use in standard MIPS branch relaxation. (relaxed_branch_length): Update according to changes to RELAX_BRANCH_ENCODE. (md_convert_frag): Use the encoded register as the temporary. gas/testsuite/ * gas/mips/relax-at.d: New test for branch relaxation with .set at. * gas/mips/relax.s: Update to support the new test. * gas/mips/relax.l: Update accordingly. * gas/mips/relax.d: Update for multi-arch invocation. * gas/mips/mips.exp: Run the new test. Adjust to run "relax" across all applicable architectures.
2011-02-28 gas/Maciej W. Rozycki7-2/+106
* config/tc-mips.c (mips_fix_adjustable): On REL targets also reject PC-relative relocations. gas/testsuite/ * gas/mips/branch-misc-2.d: Adjust for relocation change. * gas/mips/branch-misc-2pic.d: Likewise. * gas/mips/branch-misc-4.d: New test for PC-relative relocation overflow. * gas/mips/branch-misc-4-64.d: Likewise. * gas/mips/branch-misc-4.s: Source for the new tests. * testsuite/gas/mips/mips.exp: Run the new tests.
2011-02-28 gas/Maciej W. Rozycki4-76/+83
* config/tc-mips.c (md_convert_frag): Correct message capitalization. gas/testsuite/ * gas/mips/relax-swap1.l: Adjust for message capitalization correction. * gas/mips/relax-swap2.l: Likewise. * gas/mips/relax.l: Likewise.
2011-02-25Don't sign-checking 4-byte relocations for x32.H.J. Lu5-16/+96
gas/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (reloc): Don't sign-checking 4-byte relocations if 64bit relocations aren't allowed. gas/testsuite/ 2011-02-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run reloc64. * gas/i386/ilp32/reloc64.s: Allow TLS relocations with 32bit register destinations. * gas/i386/ilp32/reloc64.d: Updated. * gas/i386/ilp32/reloc64.l: New.
2011-02-25Add a testcase for PR gas/12519.H.J. Lu5-0/+20
2011-02-25 H.J. Lu <hongjiu.lu@intel.com> PR gas/12519 * gas/elf/bad-size.d: New. * gas/elf/bad-size.err: Likewise. * gas/elf/bad-size.s: Likewise. * gas/elf/elf.exp: Run bad-size.
2011-02-13opcodes: blackfin: fix decoding of ABSMike Frysinger3-2/+6
The single cycle dual mac ABS insn was incorrectly decoding the mac1 part of the insn. Once we fix the decode, update the gas tests to have the correct output. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13opcodes: blackfin: fix decoding of dsp mult insnsMike Frysinger6-23/+28
When assigning to a register half, the mac0 part of the mult insn was not decoding properly. It would always show a full dreg instead of the dreg low half. Once we fix the disassembler, we have to update a few of the gas tests as their previous expected output was incorrect. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-13gas/opcodes: blackfin: punt BYTEOP2M insn supportMike Frysinger5-92/+5
The BYTEOP2M insn was part of the initial Blackfin designs, but never made it into any actual silicon. So punt support for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-02-102011-02-10 Kai Tietz <kai.tietz@onevision.com>Kai Tietz2-4/+8
* gas/cfi/cfi-x86_64.d: Adjust for x64 PE+.
2011-02-10 * gas/m68k/cpu32.d: Set explicit architecture for objdump.Alan Modra4-3/+9
* gas/m68k/mcf-coproc.d: Likewise. * gas/m68k/mcf-wdebug.d: Likewise.
2011-02-10 * gas/elf/dwarf2-4.s: Don't use @.Alan Modra2-3/+7
2011-02-08Use f32_patt in i386_align_code when tuning for i686.H.J. Lu4-47/+430
gas/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> PR gas/6957 * config/tc-i386.c (i386_align_code): Use f32_patt when tuning for i686. gas/testsuite/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> PR gas/6957 * gas/i386/nops-1-i686.d: Updated. * gas/i386/nops-3-i686.d: Likewise. * gas/i386/nops-4-i686.d: Likewise.
2011-02-08Also update cpu_arch_isa_flags for ISA extensions.H.J. Lu5-0/+247
gas/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (set_cpu_arch): Also update cpu_arch_isa_flags for ISA extensions. (md_parse_option): Likewise. gas/testsuite/ 2011-02-08 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run nops-4a-i686 and nops-6. * gas/i386/nops-4a-i686.d: New. * gas/i386/nops-6.d: Likewise. * gas/i386/nops-6.s: Likewise.
2011-02-07 PR gas/3041Alan Modra4-1/+75
* gas/m68k/p3041pcrel.s, * gas/m68k/p3041pcrel.d: New test. * gas/m68k/all.exp: Add "p3041pcrel" and enable p3041 tests for all m68k-aout targets.
2011-02-03 gas/Bernd Schmidt7-34/+11
* doc/as.texinfo (Target TIC6X options): Don't mention "-matomic". * doc/c-tic6x.texi (TIC6X Directives): Don't mention ".atomic". (TIC6X Options): Don't mention "-matomic". * config/tc-tic6x.c (OPTION_MATOMIC, OPTION_MNO_ATOMIC): Delete. (md_longopts): Remove corresponding entries. (md_parse_option): Don't handle them. (md_show_usage): Don't document them. (tic6x_atomic): Delete variable. (tic6x_update_features): Always copy tic6x_arch_enable to tic6x_features. (tic6x_arch_enable): Remove references to TIC6X_INSN_ATOMIC. (s_tic6x_atomic, s_tic6x_noatomic): Remove functions. (md_pseudo_table): Remove ".atomic" and ".noatomic". gas/testsuite/ * gas/tic6x/dir-junk.l: Remove tests for .atomic and .noatomic. * gas/tic6x/dir-junk.s: Likewise. * gas/tic6x/insns-c674x-bad.d: Remove test. * gas/tic6x/insns-c674x-bad.l: Likewise. * gas/tic6x/insns-atomic.d: Remove "-matomic" switch. include/opcode/ * tic6x-opcode-table.h (cmtl, ll, sl): Available on C64XP. * tic6x.h (TIC6X_INSN_ATOMIC): Remove.
2011-01-31 * write.c (write_contents): Include output file name and bfd errorNick Clifton18-42/+76
value when reporting the inability to write to the output file. * config/tc-rx.c (rx_handle_align): Do not insert NOPs into align frag that has a non-zero fill value. * gas/all/align.d: Skip for the RX. * gas/elf/group1a.d: Likewise. * gas/elf/groupautoa.d: Likewise. * gas/elf/elf.exp: Do not run section5 test for the RX port. * gas/elf/section4.d: Likewise. * gas/elf/section7.d: Likewise. * gas/macros/semi.s: Fill with a non-zero pattern. * gas/macros/semi.d: Expect non-zero fill value. * gas/rx/bcnd.d: Update expected disassembly. * gas/rx/bra.d: Likewise. * gas/rx/macros.inc: Add reg1 macro. * gas/rx/max.sm: Use reg1 macro to avoid generating illegal NOP instruction. * gas/rx/mov.sm: Likewise. * gas/rx/max.d: Update expected disassembly. * gas/rx/mov.d: Likewise. * gas/rx/rx-asm-good.s: Use Renesas section names. * gas/rx/rx-asm-good.d: Update expected disassembly.
2011-01-18Don't compress empty debug sections.H.J. Lu4-0/+33
gas/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/12409 * write.c (compress_debug): Return if section size is 0. gas/testsuite/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/12409 * gas/elf/dwarf2-4.d: New. * gas/elf/dwarf2-4.s: Likewise.
2011-01-18Properly sign-extend byte.H.J. Lu5-20/+27
gas/testsuite/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/intel.d: Updated. * gas/i386/opcode-intel.d: Likewise. * gas/i386/opcode-suffix.d: Likewise. * gas/i386/opcode.d: Likewise. opcodes/ 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (sIbT): New. (b_T_mode): Likewise. (dis386): Replace sIb with sIbT on "pushT". (x86_64_table): Replace sIb with Ib on "aam" and "aad". (OP_sI): Handle b_T_mode. Properly sign-extend byte.
2011-01-18Add tbm flag and TBM instruction pattern.H.J. Lu2-1/+7
2011-01-18 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/x86-64-arch-2.d: Add tbm flag and TBM instruction pattern.
2011-01-17Add TBM testsuite files missing from last commit.Quentin Neill6-0/+1489
2011-01-17Add support for TBM instructions.Quentin Neill10-2/+41
gas/ 2011-01-17 Quentin Neill <quentin.neill@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_TBM_FLAGS. * doc/c-i386.texi (i386-TBM): New section. opcodes/ 2011-01-17 Quentin Neill <quentin.neill@amd.com> * i386-dis.c (REG_XOP_TBM_01): New. (REG_XOP_TBM_02): New. (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 entries, and add bextr instruction. * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. (cpu_flags): Add CpuTBM. * i386-opc.h (CpuTBM) New. (i386_cpu_flags): Add bit cputbm. * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, blcs, blsfill, blsic, t1mskc, and tzmsk. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated gas/testsuite 2011-01-17 Quentin Neill <quentin.neill@amd.com> * gas/i386/tbm.s: New. * gas/i386/tbm.d: New. * gas/i386/tbm-intel.d: New. * gas/i386/x86-64-tbm.s: New. * gas/i386/x86-64-tbm.d: New. * gas/i386/x86-64-tbm-intel.d: New. * gas/i386/arch-10.d: Add tbm flag and TBM instruction pattern. * gas/i386/arch-10.s: Add a TBM instruction. * gas/i386/arch-10-1.l: Add TBM instruction pattern. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/x86-64-arch-2.d: Likewise.
2011-01-16Disallow 64bit relocations in x32 mode.H.J. Lu9-26/+280
gas/ 2011-01-16 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (disallow_64bit_disp): Renamed to ... (disallow_64bit_reloc): This. (md_assemble): Don't check movabs for x32 mode here. (i386_target_format): Updated. (tc_gen_reloc): Check if 64bit relocations are allowed. gas/testsuite/ 2011-01-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/immed64.s: New. * gas/i386/ilp32/reloc64.s: Likewise. * gas/i386/ilp32/x86-64-pcrel.s: Likewise. * gas/i386/ilp32/inval.s: Add more tests. * gas/i386/ilp32/immed64.d: Updated. * gas/i386/ilp32/inval.l: Likewise. * gas/i386/ilp32/reloc64.d: Likewise. * gas/i386/ilp32/x86-64-pcrel.d: Likewise.
2011-01-15Don't allow movabs with relocation in x32 mode.H.J. Lu6-11/+351
gas/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (disallow_64bit_disp): New. (x86_elf_abi): Replace X86_64_LP64_ABI/X86_64_ILP32_ABI with X86_64_ABI/X86_64_X32_ABI. (md_assemble): Don't allow movabs with relocation in x32 mode. (i386_target_format): Updated. gas/testsuite/ 2011-01-15 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/ilp32.exp: Run inval. * gas/i386/ilp32/inval.l: New. * gas/i386/ilp32/inval.s: Likewise. * gas/i386/ilp32/x86-64.s: Likewise. * gas/i386/ilp32/x86-64.d: Don't use ../x86_64.s. Updated.
2011-01-14Rename --n32 to --x32.H.J. Lu5-4/+11
gas/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (OPTION_N32): Renamed to ... (OPTION_X32): This. (md_longopts): Replace n32 with x32. (md_parse_option): Updated. (md_show_usage): Likewise. * doc/c-i386.texi: Replace n32 with x32. gas/testsuite/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/cfi/ilp32.exp: Replace --n32 with --x32. * gas/i386/ilp32/elf/ilp32.exp: Likewise. * gas/i386/ilp32/ilp32.exp: Likewise. * gas/i386/ilp32/lns/ilp32.exp: Likewise. ld/testsuite/ 2011-01-14 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/ilp32-1.d: Replace --n32 with --x32. * ld-x86-64/ilp32-2.d: Likewise. * ld-x86-64/ilp32-3.d: Likewise. * ld-x86-64/ilp32-4.d: Likewise. * ld-x86-64/ilp32-5.d: Likewise. * ld-x86-64/x86-64.exp: Likewise.
2011-01-11Take unadjusted offset for loongson3a specific instructions.Mingjie Xing3-8/+13
2011-01-10 bfd/Nathan Sidwell3-21/+75
* reloc.c (BFD_RELOC_ARM_TLS_GOTDESC, BFD_RELOC_ARM_TLS_CALL, BFD_RELOC_ARM_THM_TLS_CALL, BFD_RELOC_ARM_TLS_DESCSEQ, BFD_RELOC_ARM_THM_TLS_DESCSEQ, BFD_RELOC_ARM_TLS_DESC): New relocations. * libbfd.h: Rebuilt. * bfd-in2.h: Rebuilt. * elf32-arm.c (elf32_arm_howto_table_1): Add new relocations. (elf32_arm_reloc_map): Likewise. (tls_trampoline, dl_tlsdesc_lazy_trampoline): New PLT templates. (elf32_arm_stub_long_branch_any_tls_pic, elf32_arm_stub_long_branch_v4t_thumb_tls_pic): New stub templates. (DEF_STUBS): Add new stubs. (struct_elf_arm_obj_data): Add local_tlsdesc_gotent field. (elf32_arm_local_tlsdesc_gotent): New. (GOT_TLS_GDESC): New mask. (GOT_TLS_GD_ANY): Define. (struct elf32_arm_link_hash_entry): Add tlsdesc_got field. (elf32_arm_compute_jump_table_size): New. (struct elf32_arm_link_hash_table): Add next_tls_desc_index, num_tls_desc, dt_tlsdesc_plt, dt_tlsdesc_got, tls_trampoline, sgotplt_jump_table_size fields. (elf32_arm_link_hash_newfunc): Initialize tlsdesc_got field. (elf32_arm_link_hash_table_create): Initialize new fields. (arm_type_of_stub): Check TLS desc relocs too. (elf32_arm_stub_name): TLS desc relocs can be shared. (elf32_arm_tls_transition): Determine relaxation. (arm_stub_required_alignment): Add tls stubs. (elf32_arm_size_stubs): Likewise. (elf32_arm_tls_relax): Perform TLS relaxing. (elf32_arm_final_link_relocate): Process TLS DESC relocations. (IS_ARM_TLS_GNU_RELOC): New. (IS_ARM_TLS_RELOC): Use it. (elf32_arm_relocate_section): Perform TLS relaxing. (elf32_arm_check_relocs): Anticipate TLS relaxing, process tls desc relocations. (allocate_dynrelocs): Allocate tls desc relcoations. (elf32_arm_output_arch_local_syms): Emit tls trampoline mapping symbols. (elf32_arm_size_dynamic_sections): Allocate tls trampolines and got slots. (elf32_arm_always_size_sections): New. Create _TLS_MODULE_BASE symbol. (elf32_arm_finish_dynamic_symbol): Adjust. (arm_put_trampoline): New. (elf32_arm_finish_dynamic_sections): Emit new dynamic tags and tls trampolines. (elf_backend_always_size_sections): Define. include/elf/ * arm.h (R_ARM_TLS_DESC, R_ARM_TLS_GOTDESC, R_ARM_TLS_CALL, R_ARM_TLS_DESCSEQ, T_ARM_THM_TLS_CALL, R_ARM_THM_TLS_DESCSEQ): New relocations. gas/ * doc/c-arm.texi: Document TLSDESC and TLSCALL relocations, and .tlsdescseq directive. * config/tc-arm.c (arm_typed_reg_parse): Check for potential reloc following a symbol. (s_arm_tls_descseq): New directive. (md_pseudo_table): Add it. (encode_branch): Allow TLS_CALL relocs too. (do_t_blx, do_t_branch23): Use encode_branch. (reloc_names): Add tlsdesc and tlscall. (md_apply_fix): Process tls desc relocations. (tc_gen_reloc): Likewise. (arm_fix_adjustable): Likewise. gas/testsuite/ * gas/arm/tls.s: Add tlsdesc tests. * gas/arm/tls.d: Adjust. ld/testsuite/ * ld-arm/arm-elf.exp: Added tests for new TLS handling relocations. * ld-arm/tls-descrelax-be32.d: New. * ld-arm/tls-descrelax-be32.s: New. * ld-arm/tls-descrelax-be8.d: New. * ld-arm/tls-descrelax-be8.s: New. * ld-arm/tls-descrelax-v7.d: New. * ld-arm/tls-descrelax-v7.s: New. * ld-arm/tls-descrelax.d: New. * ld-arm/tls-descrelax.s: New. * ld-arm/tls-descseq.d: New. * ld-arm/tls-descseq.r: New. * ld-arm/tls-descseq.s: New. * ld-arm/tls-gdesc-got.d: New. * ld-arm/tls-gdesc-got.s: New. * ld-arm/tls-gdesc-nlazy.g: New. * ld-arm/tls-gdesc-nlazy.s: New. * ld-arm/tls-gdesc.d: New. * ld-arm/tls-gdesc.r: New. * ld-arm/tls-gdesc.s: New. * ld-arm/tls-gdierelax.d: New. * ld-arm/tls-gdierelax.s: New. * ld-arm/tls-gdierelax2.d: New. * ld-arm/tls-gdierelax2.s: New. * ld-arm/tls-gdlerelax.d: New. * ld-arm/tls-gdlerelax.s: New. * ld-arm/tls-lib-loc.d: New. * ld-arm/tls-lib-loc.r: New. * ld-arm/tls-lib-loc.s: New. * ld-arm/tls-longplt-lib.d: New. * ld-arm/tls-longplt-lib.s: New. * ld-arm/tls-longplt.d: New. * ld-arm/tls-longplt.s: New. * ld-arm/tls-mixed.r: New. * ld-arm/tls-mixed.s: New. * ld-arm/tls-thumb1.d: New. * ld-arm/tls-thumb1.s: New. * ld-arm/arm-elf.exp: New.
2011-01-07Update gas/i386/ilp32/x86-64-arch-2.d.H.J. Lu2-1/+7
2011-01-07 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/x86-64-arch-2.d: Add bmi flag and BMI instruction pattern.
2011-01-07Add docs and arch tests to BMI.Quentin Neill9-2/+31
gas/ 2011-01-07 Quentin Neill <quentin.neill@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_BMI_FLAGS. * doc/c-i386.texi (i386-BMI): New section. gas/testsuite/ 2011-01-07 Quentin Neill <quentin.neill@amd.com> * gas/i386/arch-10.s: Add a BMI instruction. * gas/i386/x86-64-arch-2.s: Likewise. * gas/i386/arch-10.d: Add bmi flag and BMI instruction pattern. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/arch-10-1.l: Add BMI instruction pattern. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise.
2011-01-07* gas/pdp11/pdp11.exp: Add run of absreloc.Paul Koning2-0/+5
2011-01-06* config/tc-pdp11.c (parse_op_no_deferred): Allow PC-relativePaul Koning3-0/+46
references to absolute addresses.
2011-01-06* gas/pdp11/opcode.d: Fix expected output for sec instruction.Paul Koning2-1/+5
2011-01-06 gas/testsuite/Nathan Sidwell3-0/+42
* gas/arm/blx-bad.s: New. * gas/arm/blx-bad.d: New. opcodes/ * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
2011-01-05Implement BMI instructions.H.J. Lu8-0/+546
2011-01-01Also expect .zdebug in section name in ILP32 tests.H.J. Lu3-2/+8
2011-01-01 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/ilp32/lns/lns-common-1.d: Also expect .zdebug in section name. * gas/i386/ilp32/lns/lns-duplicate.d: Likewise.
2011-01-01Rotate gas ChangeLogs.H.J. Lu2-1940/+1948
2010-12-31 * gas/all/gas.exp (fwdexp): Run on hppa*64*-*-*. Skip on 32-bitDave Anglin2-2/+18
hppa*-*-hpux*. (octa): Likewise.
2010-12-31 * gas/cfi/cfi.exp: Skip cfi-common-6 on hppa64*-*.Dave Anglin2-5/+8
generated by cgit v1.1 at 2025-02-27 21:29:51 +0000