Age | Commit message (Collapse) | Author | Files | Lines |
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* config/tc-tic6x.c (tic6x_try_encode): Correct encoding of fstg field
in SPKERNEL instructions.
opcodes/
* tic6x-dis.c (print_insn_tic6x): Correct decoding of fstg field
in SPKERNEL instructions.
gas/testsuite/
* gas/tic6x/insns-c674x-sploop.d: Add two more sploop/spkernel tests.
* gas/tic6x/insns-c674x-sploop.s: Likewise.
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* config/tc-mips.c (mips_fix_cn63xxp1): New variable.
(mips_ip): Add errata work around when mips_fix_cn63xxp1 set.
(OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options
enumerations.
(md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1.
(md_parse_option): Handle OPTION_FIX_CN63XXP1 and
OPTION_NO_FIX_CN63XXP1.
(md_show_usage): Add documentation for -mfix-cn63xxp1.
* doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document
the new options.
2010-10-04 David Daney <ddaney@caviumnetworks.com>
* gas/mips/mips.exp (octeon-pref): Run the new test.
* gas/mips/octeon-pref.s: New test.
* gas/mips/octeon-pref.d: New expected results for the new test.
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* opcode/tic6x-control-registers.h (tscl): Now read_write.
gas/testsuite/
* gas/tic6x/insns-bad-1.s: Remove test for readonly tscl.
* gas/tic6x/insns-bad-1.l: Likewise.
* gas/tic6x/insns-c674x.d: Add test for writeable tscl.
* gas/tic6x/insns-c674x.s: Likewise.
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* gas/all/gas.exp: Run it.
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(is_aout_format): Copy from ld testsuite.
(is_pecoff_format): Merge with ld version.
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* config/tc-tic6x.c (tic6x_fix_adjustable): New function.
* config/tc-tic6x.h (tic6x_fix_adjustable): Declare.
(tc_fix_adjustable): New macro.
gas/testsuite/
* gas/tic6x/got-reloc.s: New test.
* gas/tic6x/got-reloc.d: New test.
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* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
(main): Recognize the new CPU string.
* s390-opc.c: Add new instruction formats and masks.
* s390-opc.txt: Add new z196 instructions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c: (md_parse_option): New option -march=z196.
* doc/c-s390.texi: Document new option.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run the zarch-z196 test.
* gas/s390/zarch-z196.d: Add new instructions.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
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* s390-dis.c (print_insn_s390): Pick instruction with most
specific mask.
* s390-opc.c: Add unused bits to the insn mask.
* s390-opc.txt: Reorder some instructions to prefer more recent
versions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Adjust serveral instructions.
* gas/s390/esa-reloc.d: Likewise.
* gas/s390/esa-z990.d: Likewise.
* gas/s390/zarch-reloc.d: Likewise.
* gas/s390/zarch-z10.d: Likewise.
* gas/s390/zarch-z9-ec.d: Likewise.
* gas/s390/zarch-z900.d: Likewise.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7.
* ld-s390/tlsbin_64.dd: Likewise.
* ld-s390/tlspic.dd: Likewise.
* ld-s390/tlspic_64.dd: Likewise.
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* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative
VSTR, issue an error in THUMB mode.
* opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
correction to unaligned PCs while printing comment.
* gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment.
* gas/testsuite/gas/arm/vldr.d: Likewise.
* gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR.
* gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
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* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
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(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
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(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
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(arm_ext_sec): New variable.
(do_t_smc): In Thumb state SMC requires v7-A.
(insns): Make SMC depend on Security Extensions.
(arm_cpus): All -mcpu=cortex-a* options have the Security Extensions.
(arm_extensions): Add 'sec' extension.
(cpu_arch_ver): Reorder.
(aeabi_set_public_attributes): Emit Tag_Virtualization_use as
appropriate.
* gas/doc/c-arm.texi: Document Security Extensions.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions..
* gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test.
* gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions.
* gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test.
* gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions.
* gas/testsuite/gas/arm/thumb32.d: Likewise.
* gas/testsuite/gas/arm/thumb32.s: Likewise.
* include/opcode/arm.h (ARM_EXT_V6Z): Remove.
(ARM_EXT_SEC): New define.
(ARM_AEXT_V6Z): Use Security Extensions.
(ARM_AEXT_V6ZK): Likeiwse.
(ARM_AEXT_V6ZT2): Likewise.
(ARM_AEXT_V6ZKT2): Likewise.
(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
(ARM_ARCH_V7A_SEC): New define.
(ARM_ARCH_V7A_MP): Rename...
(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions.
(thumb32_opcodes): Likewise.
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(do_pld): Update comment.
(insns): Add support for pldw.
(arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support
MP extension.
(arm_extensions): Add 'mp' extension.
(aeabi_set_public_attributes): Emit correct build attribute when
MP extension is enabled.
* gas/doc/c-arm.texi: Update for MP extensions.
* gas/testsuite/gas/arm/arch7a-mp.d: Add.
* gas/testsuite/gas/arm/arch7ar-mp.s: Likewise.
* gas/testsuite/gas/arm/arch7r-mp.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise.
* gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add.
* gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise.
* include/opcode/arm.h (ARM_EXT_MP): Add.
(ARM_ARCH_V7A_MP): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Add support for pldw.
(thumb32_opcodes): Likewise.
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* gas/m68k/all.exp: Don't xfail pcrel on uclinux.
* gas/sh/arch/arch.exp: Don't pass dashes to send_log.
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Using "Register mismatch" everywhere can be a bit vague, so clarify
why exactly we're barfing on these unsupported insns.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some extended registers when given to the DBG/DBGCMPLX pseudo insns are
not encoded properly. So fix them, fix the display of them when being
disassembled, and add testcases.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The Blackfin ISA does not have a "SHIFT" insn, it has either LSHIFT,
ASHIFT, or BXORSHIFT. So be specific when disassembling.
As fall out of this change, we need to update some assembler tests.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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* gas/testsuite/gas/arm/attr-cpu-directive.d: Update test for change in canonical
CPU name.
* gas/testsuite/gas/arm/attr-mcpu.d: Likewise.
* ld/testsuite/ld-arm/attr-merge-6.attr: Update tests for change in canonical
CPU name.
* ld/testsuite/ld-arm/attr-merge-7.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-2.attr: Likewise.
* ld/testsuite/ld-arm/attr-merge-arch-2.attr: Likewise.
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* config/tc-arm.c (do_t_ldmstm): Add logic to handle single-register
list for ldm/stm.
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* gas/arm/thumb2_ldmstm.d: Change single-register stmia to use 16-bit
str encoding instead of str.w. Likewise for ldmia.
* gas/arm/thumb2_ldmstm.s: Change stmia comment. Add tests for T1
ldmia-to-ldr.
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* config/tc-arm.c (parse_psr): Add condition for matching "APSR" on
non-M-arch cpus.
(psrs): Add entry for PSR flags, g, nzcvq, nzcvqg.
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* gas/arm/msr-reg.s: New file.
* gas/arm/msr-reg.d: Likewise.
* gas/arm/msr-imm.s: Likewise.
* gas/arm/msr-imm.d: Likewise.
* gas/arm/msr-imm-bad.d: Likewise.
* gas/arm/msr-imm-bad.l: Likewise.
* gas/arm/msr-reg-bad.d: Likewise.
* gas/arm/msr-imm-bad.d: Likewise.
* gas/arm/msr-reg-thumb.d: Likewise.
* gas/arm/arch7.s: Add tests for xpsr.
* gas/arm/arch7.d: Likewise.
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* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead
of just RR.
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand.
* gas/arm/copro.d: Change pc in MRC to disassemble as APSR_nzcv. Also
add disassembly for test added in copro.s
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
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* config/obj-elf.c (obj_elf_parse_section_letters): Correct test
for error return from md_elf_section_letter.
* config/tc-alpha.c (alpha_elf_section_letter): Correct error message.
* config/tc-i386.c (x86_64_section_letter): Likewise.
* config/tc-ia64.c (ia64_elf_section_letter): Likewise.
* config/tc-mep.c (mep_elf_section_letter): Likewise.
* gas/elf/bad-section-flag.d, * gas/elf/bad-section-flag.err,
* gas/elf/bad-section-flag.s: New test.
* gas/elf/elf.exp: Run it.
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* gas/i386/i386.exp: Don't run intel-got32 on linuxaout. Move
x86_64 mingw exclusions to equivalent elf only block of tests.
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2010-09-15 Kai Tietz <kai.tietz@onevision.com>
* config/obj-coff-seh.c (seh_validate_seg): New funtion.
(obj_coff_seh_endproc): Add check for segment.
(obj_coff_seh_endprologue): Likewise.
(obj_coff_seh_pushreg): Likewise.
(obj_coff_seh_pushframe): Likewise.
(obj_coff_seh_save): Likewise.
(obj_coff_seh_setframe): Likewise.
ChangeLog gas/testsuite
2010-09-15 Kai Tietz <kai.tietz@onevision.com>
* gas/pe/pe.exp: Add new test.
* gas/pe/seh-x64-err-1.l: New.
* gas/pe/seh-x64-err-1.s: New.
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2010-09-15 Kai Tietz <kai.tietz@onevision.com>
* config/obj-coff-seh.h (seh_context): New member code_seg.
* config/obj-coff-seh.c: Implementing xdata/pdata section cloning
for link-once code-segment.
ChangeLog ld
2010-09-15 Kai Tietz <kai.tietz@onevision.com>
* scripttempl/pep.sc: Add .xdata segment and
put into .pdata all segments beginning with .pdata.
ChangeLog gas/testsuite
2010-09-15 Kai Tietz <kai.tietz@onevision.com>
* gas/pe/pe.exp: Add peseh-x64-4,5,6 tests.
* gas/pe/peseh-x64-4.s: New.
* gas/pe/peseh-x64-4.d: New.
* gas/pe/peseh-x64-5.d: New.
* gas/pe/peseh-x64-6.d: New.
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* mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
"sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
gas/testsuite/
* gas/mips/mips32r2-sync.d: New test for MIPS32r2 "sync"
instruction variants.
* gas/mips/octeon@mips32r2-sync.d: Likewise, Octeon version.
* gas/mips/mips32r2-sync.s: Source for the new test.
* gas/mips/mips.exp: Run the new test.
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* gas/pe/pe.exp: Add x64 SEH tests.
* gas/pe/peseh-x64.s: New.
* gas/pe/peseh-x64.d: New.
* gas/pe/peseh-x64-2.s: New.
* gas/pe/peseh-x64-2.d: New.
* gas/pe/peseh-x64-3.s: New.
* gas/pe/peseh-x64-3.d: New.
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* gas/mn10300/pr11931.s: New file: Test case.
* gas/mn10300/pr11931.d: New file: Expected output.
* gas/mn10300/basic.exp: Run the new test.
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flag-setting and handle accordingly.
* gas/arm/addsw-bad.s: New file.
* gas/arm/addsw-bad.l: New file.
* gas/arm/addsw-bad.d: New file.
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gas/
2010-09-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11974
* config/tc-i386.c (i386_finalize_immediate): Check flag_code
instead of use_rela_relocations for 64bit.
gas/testsuite/
2010-09-03 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11974
* gas/i386/immed64.s: Add more movabs tests.
* gas/i386/immed64.d: Updated.
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* dwarf.c (regname): New declaration.
(decode_location_expression): Print for registers also regname output.
binutils/testsuite/
* binutils-all/objdump.W: Update DW_OP_reg5 expected output.
gas/testsuite/
* gas/elf/dwarf2-1.d: Update DW_OP_reg5 expected output.
* gas/elf/dwarf2-2.d: Likewise.
* gas/i386/dw2-compress-1.d: Likewise.
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* gas/cfi/cfi-i386.s: Remove .type directives.
* gas/cfi/reloc-pe-i386.d: Adjust test for i386.
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(output_fde): Use it. Make sure to fully init exp before using it.
testsuite/
* gas/cfi/cfi-common-1.d: Use objdump instead of readelf to dump.
* gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d,
gas/cfi/cfi-common-4.d, gas/cfi/cfi-common-6.d,
gas/cfi/cfi-common-7.d, gas/cfi/cfi-x86_64.d: Likewise.
* gas/cfi/cfi-x86_64.s: Remove .type directives.
* gas/cfi/cfi.exp: Run for pecoff objects too.
* gas/cfi/reloc-pe-i386.d, gas/cfi/reloc-pe-i386.s: New test.
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gas/testsuite/
2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/11960
* gas/i386/opcode-intel.d: Updated.
* gas/i386/x86-64-opcode.d: Likewise.
* gas/i386/x86-64-opcode.s: Add a "pushw imm16" test.
opcodes/
2010-08-31 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/11960
* i386-dis.c (sIv): New.
(dis386): Replace Iq with sIv on "pushT".
(reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
(x86_64_table): Replace {T|}/{P|} with P.
(putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
(OP_sI): Update v_mode. Remove w_mode.
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BAD_PC_ADDRESSING condition.
testsuite/
* gas/arm/ldst-pc.d: New test.
* gas/arm/ldst-pc.s: New test.
* gas/arm/sp-pc-validations-bad.s: `str r0,[pc,#4]' is valid.
* gas/arm/sp-pc-validations-bad.l: Adjust accordingly.
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gas/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* config/tc-i386.c (arch_entry): Add negated bit to
disambiguate flag names starting with "no".
(cpu_arch): Add negated bit definitions. Add
".nop" CPU extension.
(i386_align_code): Use new .cpunop bit to decide
when to generate alignment using nops.
(set_cpu_arch): Use negated bit instead to decide
when to use cpu_flags or vs. cpu_flags_and_not.
(md_parse_option): Likewise.
gas/testsuite/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* gas/i386/arch-10-1.l: Add nopl instruction.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/arch-10.s: Likewise.
* gas/i386/arch-10.d: Add nopl instruction, and +nopl extension
flag to as flags.
* gas/i386/nops-5-i686.d: Change alignment code generated for
-mtune=i686.
* gas/i386/nops-5.d: Change alignment code generated for
.arch i686.
* gas/i386/x86-64-nops-5-k8.d: Likewise.
* gas/i386/x86-64-nops-5.d: Likewise.
opcodes/
2010-08-06 Quentin Neill <quentin.neill@amd.com>
* i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
to processor flags for PENTIUMPRO processors and later.
* i386-opc.h (enum): Add CpuNop.
(i386_cpu_flags): Add cpunop bit.
* i386-opc.tbl: Change nop cpu_flags.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
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gas/testsuite/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run arch-4.
* gas/i386/arch-4.d: New.
* gas/i386/arch-4.s: Likewise.
* gas/i386/intel.d: Replace ud2a/ud2b with ud2/ud1.
* gas/i386/opcode-intel.d: Likewise.
* gas/i386/opcode-suffix.d: Likewise.
* gas/i386/opcode.d: Likewise.
opcodes/
2010-08-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
* i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b.
* i386-tbl.h: Regenerated.
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* gas/all/gas.exp: Run octa.
* gas/elf/data-1.s, * gas/elf/data-1.d: Delete.
* gas/elf/elf.exp: Don't run data-1.
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2010-08-02 H.J. Lu <hongjiu.lu@intel.com>
* elf/elf.exp: Run data-1 only for i*86, x86_64 and ia64.
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2010-08-02 H.J. Lu <hongjiu.lu@intel.com>
PR gas/11867
* gas/elf/data-1.d: New.
* gas/elf/data-1.s: Likewise.
* elf/elf.exp: Run data-1.
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* lib/gas-defs.exp (get_standard_section_names): New function.
(run_dump_tests): Document the new behavior for objdump,
document to new section-subst option. Automatically perform
substitutions for objdump.
(objdump_finish): Add REF_SUBST argument.
(run_list_test): Adjust call of regexp_diff.
(run_list_test_stdin): Ditto.
* gas/all/gas.exp (test_cond): Adjust call of regexp_diff.
* gas/symver/symver.exp (run_error_test): Ditto.
* gas/mt/relocs.exp (regexp_test): Ditto.
* gas/mep/complex-relocs.exp (regexp_test): Ditto.
* gas/m68k/all.exp: Ditto.
* gas/elf/elf.exp (run_elf_list_test): Ditto.
* gas/rx/rx-asm-good.d: Set section-subst to no.
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(dw2-compress-2, x86-64-dw2-compress-2): Remove unnecessary linux
target test.
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