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2015-12-11[AArch64][Patch 5/5] Add instruction PSB CSYNCMatthew Wahab4-2/+15
2015-12-11[AArch64][Patch 2/5] Add Statistical Profiling Extension system registers.Matthew Wahab3-1/+52
2015-12-10[Aarch64] Support ARMv8.2 AT instructionsMatthew Wahab3-0/+13
2015-12-10[AArch64][PATCH 2/2] Support ARMv8.2 DC CVAP instruction.Matthew Wahab3-0/+14
2015-12-10[AArch64][binutils] Add support for ARMv8.2 PSTATE.UAO.Matthew Wahab4-0/+63
2015-12-10[AArch64][PATCH 2/2] Add RAS system registers.Matthew Wahab3-0/+41
2015-12-10[AArch64][PATCH 1/2] Add support for RAS instruction ESB.Matthew Wahab4-1/+23
2015-12-09Implement Intel OSPKE instructionsH.J. Lu5-0/+40
2015-12-09gas/ELF: slightly relax elf/file*.d expectationsJan Beulich3-0/+8
2015-12-08gas: consistently emit diagnostics for non-zero data emission to .bss/.structJan Beulich6-0/+155
2015-12-08ELF: don't re-order SHF_FILE symbolsJan Beulich6-18/+47
2015-12-04Fix GAS testsuite failures for COFF/PE based ARM targets.Nick Clifton3-2/+7
2015-12-04Fix failures in the GAS testsuite for the ARC architecture.Claudiu Zissulescu20-30/+372
2015-12-02Fix ldah being disassembled as ldaexhAndre Vieira2-3/+8
2015-11-27[AArch64][PATCH 3/3] Add floating-point FP16 instructionsMatthew Wahab3-0/+328
2015-11-27[AArch64] Add ARMv8.2 instruction alias REV64.Matthew Wahab3-0/+29
2015-11-27[AArch64] Add ARMv8.2 instructions BFC and REV64.Matthew Wahab3-0/+134
2015-11-27[Aarch64] Support an ARMv8.2 system register.Matthew Wahab3-0/+31
2015-11-24[GAS, ARM] Invalid LDR immediate transformationChristophe Monat5-2/+71
2015-11-24[ARM][GAS] Fix invalid arm-wince-pe tests.Matthew Wahab9-26/+45
2015-11-20MIPS/GAS/testsuite: Tighten negative-match NaN testsMaciej W. Rozycki6-70/+13
2015-11-20[AArch64] Add support for ARMv8.1 Virtulization Host Extensions.Matthew Wahab4-0/+205
2015-11-20Stop the ARM short mapping symbol test being run for the symbianelf target.Matthew Wahab2-1/+5
2015-11-19[AArch64] Reject invalid immediate operands to MSR PANMatthew Wahab4-0/+30
2015-11-19Recent powerpc testcase failsAlan Modra3-0/+7
2015-11-12Fix dates in Changelog for previous commit.Ramana Radhakrishnan1-1/+1
2015-11-12Fix PR gas/19217Ramana Radhakrishnan2-3/+8
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner13-10/+1224
2015-11-09gas: Fix left shift of negative value.Dominik Vogt2-11/+16
2015-11-09Move copy_u.w to MSA64 ASE, remove copy_u.d.Robert Suchanek7-44/+36
2015-11-02Disassemble RX NOP instructions as such.Nick Clifton4-5/+25
2015-11-02Fix disassembly of RX zero-offset register indirect instructions.Nick Clifton3-470/+534
2015-10-28Add tests for 16-bit versions of ARM teq, tst, cmp and cmn instructions.Nick Clifton3-0/+45
2015-10-27Fix RL78 disassembly of DE+offset addressing to always show the offset, even ...Vinay Kumar5-1/+37
2015-10-27Display system registers by their names when disassembling RL78 instructions.Vinay Kumar4-0/+47
2015-10-27Fix RL78 disassembly so that SP+OFFSET addressing always shows the offset, ev...Vinay Kumar4-0/+59
2015-10-22Add support for MSP430 silicon errata to the assembler.Nick Clifton8-1/+169
2015-10-22Add R_X86_64_[REX_]GOTPCRELX support to gas and ldH.J. Lu7-6/+93
2015-10-22Add R_386_GOT32X support to gas and ldH.J. Lu7-5/+74
2015-10-22Fix tests for PR 18500, revisitedAlan Modra4-34/+42
2015-10-21Fix tests for PR 18500 so that they will pass for big-endian ARM toolchains.Nick Clifton4-34/+42
2015-10-14Add missing changelog entriesAndreas Krebbel1-0/+7
2015-10-14S/390: Fix instruction type of troo, trot, trto, and trtt.Andreas Krebbel4-24/+24
2015-10-12avr: Fix bugs in org/align tracking.Andrew Burgess3-10/+18
2015-10-07New ARC implementation.Nick Clifton79-3015/+1805
2015-10-02[GAS][AARCH64]Add TLSDESC large memory model support.Renlin Li7-0/+69
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li5-0/+33
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li3-0/+18
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li3-0/+18
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li3-0/+19