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AgeCommit message (Expand)AuthorFilesLines
2018-11-01Fix ld action in run_dump_testThomas Preud'homme1-0/+8
2018-10-31[GAS][ARM] Fix ARMv8.1 AdvSIMD testismAndre Vieira1-1/+0
2018-10-31[GAS][ARM] Fix UDF testismAndre Vieira1-23/+19
2018-10-31[GAS][ARM] Fix failing Armv1 testAndre Vieira1-18/+18
2018-10-23S/390: Support vector alignment hintsAndreas Krebbel2-0/+16
2018-10-22gas simple-forward testAlan Modra4-2/+29
2018-10-22Apply alpha BFD_RELOC_8 fixupsAlan Modra2-4/+2
2018-10-20PR23800, .eqv doesn't always defer expression evaluationAlan Modra3-0/+21
2018-10-19Arm: Skip new binary decode tests on pe targetsTamar Christina2-2/+2
2018-10-19Arm: Fix disassembler crashing on -b binary when thumb file and thumb not for...Tamar Christina3-0/+11
2018-10-19This set of changes clarifies the conditions for the R5900 short loop fix and...Fredrik Noring2-5/+45
2018-10-16AArch64: Fix error checking for SIMD udot (by element)Matthew Malcomson3-0/+21
2018-10-11x86: add {,V}MOVQ cases to xmmword testJan Beulich2-0/+14
2018-10-09[PATCH, BINUTULS, AARCH64, 9/9] Add SSBS to MSR/MRSSudakshina Das7-0/+204
2018-10-09[PATCH, BINUTILS, AARCH64, 8/9] Add SCXTNUM_ELx and ID_PFR2_EL1 system registersSudakshina Das3-0/+18
2018-10-09[PATCH, BINUTILS, AARCH64, 7/9] Add BTI instructionSudakshina Das5-4/+32
2018-10-09[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructionsSudakshina Das3-1/+7
2018-10-09[PATCH, BINUTILS, AARCH64, 5/9] Add DC CVADP instructionSudakshina Das3-0/+3
2018-10-09[PATCH, BINUTILS, AARCH64, 4/9] Add Execution and Data Restriction instructionsSudakshina Das6-0/+43
2018-10-09[PATCH, BINUTILS, AARCH64, 3/9] Add instruction SB for ARMv8.5-ASudakshina Das3-0/+28
2018-10-09[PATCH, BINUTILS, AARCH64, 2/9] Add Data procoessing instructions for ARMv8.5-ASudakshina Das2-0/+50
2018-10-05x86: Add Intel ENCLV to assembler and disassemblerH.J. Lu4-0/+4
2018-10-05[Arm, 3/3] Add Execution and Data Prediction instructions for AArch32Sudakshina Das5-0/+36
2018-10-05[Arm, 2/3] Add instruction SB for AArch32Sudakshina Das7-0/+55
2018-10-05[Arm, 1/3] Add -march=armv8.5-a and related internal feature macros to AArch32Sudakshina Das1-0/+17
2018-10-05or1k: Add the l.muld, l.muldu, l.macu, l.msbu insnsRichard Henderson2-0/+45
2018-10-05or1k: Add the l.adrp insn and supporting relocationsStafford Horne6-0/+47
2018-10-05or1k: Add relocations for high-signed and low-storesRichard Henderson7-8/+148
2018-10-03AArch64: Add MOVPRFX tests and update testsuiteTamar Christina71-0/+875
2018-10-03AArch64: Constraint disassembler and assembler changes.Tamar Christina5-245/+253
2018-10-02RISC-V: Add fence.tso instructionPalmer Dabbelt2-0/+13
2018-09-26Skip broken assembler test on Windows host.Sandra Loosemore1-1/+5
2018-09-25S/390: Fix symbolic displacement in layAndreas Krebbel3-0/+7
2018-09-21Fix more fallout from 17f6ade235fcAlan Modra1-3/+2
2018-09-20gas: Update expected outputs of "readelf -wL"H.J. Lu11-70/+70
2018-09-20Andes Technology has good news for you, we plan to update the nds32 port of b...Nick Clifton9-17/+24
2018-09-17RISC-V: bge[u] should get higher priority than ble[u].Jim Wilson2-0/+18
2018-09-17x86: Set EVex=2 on EVEX.128 only vmovd and vmovqH.J. Lu5-0/+69
2018-09-17x86: Set Vex=1 on VEX.128 only vmovd and vmovqH.J. Lu11-336/+115
2018-09-17x86: Add -mvexwig=[0|1] option to assemblerH.J. Lu9-0/+1476
2018-09-17Remove bogus notarget in gas teststuiteAlan Modra14-18/+3
2018-09-17A few hppa testcase tidiesAlan Modra3-16/+4
2018-09-17Ensure that binutils test names are unique.Nick Clifton7-7/+7
2018-09-15x86: Set Vex=1 on VEX.128 only vmovqH.J. Lu4-32/+32
2018-09-15Consolidate run_dump_testAlan Modra2-496/+2
2018-09-15run_dump_test replace PROG with DUMPPROG in gas and ldAlan Modra32-54/+54
2018-09-15gas testuite fixes: don't match dump.oAlan Modra245-253/+255
2018-09-15gas run_dump_test rename stderr and error-outputAlan Modra426-448/+446
2018-09-15gas run_dump_test rename not-target and not-skipAlan Modra150-169/+169
2018-09-15Remove run_dump_test support for objcopy as a dump programAlan Modra3-28/+17