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2015-06-01[AArch64] GAS Support BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15Jiong Wang2-15/+20
2015-06-01x86/Intel: disassemble vcvt{,u}si2s{d,s} with correct operand orderJan Beulich6-432/+432
2015-06-01x86/Intel: accept mandated operand order for vcvt{,u}si2s{d,s}Jan Beulich2-72/+72
2015-05-28Compact EH SupportCatherine Moore26-1/+751
2015-05-15Support AMD64/Intel ISAs in assembler/disassemblerH.J. Lu7-2/+50
2015-05-15Add -mshared option to x86 ELF assemblerH.J. Lu7-25/+152
2015-05-14Fix some PPC assembler errors.Peter Bergner6-9/+21
2015-05-13xtensa: fix gas trampolines regressionMax Filippov1-0/+10
2015-05-13Revert "Add -mno-shared to x86 assembler"H.J. Lu3-67/+0
2015-05-11Add Intel MCU support to gasH.J. Lu13-2/+183
2015-05-09Ignore 0x66 prefix for call/jmp/jcc in 64-bit modeH.J. Lu6-6/+105
2015-05-08Change ARM symbol name verification code so that it only triggers when the fo...Nick Clifton2-1/+12
2015-05-08Add -mno-shared to x86 assemblerH.J. Lu3-0/+67
2015-05-07Optimize branches to non-weak symbols with visibilityH.J. Lu4-0/+105
2015-05-06gas: added tests for the sparc natural instructions.Jose E. Marchesi4-5/+45
2015-05-06gas: support for the sparc %ncc condition codes register.Jose E. Marchesi5-0/+32
2015-05-06[AArch64] Record instruction alignment for .inst directiveRenlin Li2-0/+16
2015-05-05[AARCH64] Positively emit symbols for alignmentRenlin Li4-0/+38
2015-05-01Remove i386_elf_emit_arch_noteH.J. Lu3-0/+11
2015-04-30GAS ARM: Warn if the user creates a symbol with the same name as an instruction.Nick Clifton3-0/+8
2015-04-29Fix an internal error in GAS when assembling a bogus piece of source code.Nick Clifton3-0/+12
2015-04-28[ARM]Positively emit symbols for alignmentRenlin Li2-6/+4
2015-04-27opcodes/Peter Bergner7-140/+112
2015-04-27S/390: Fixes for z13 instructions.Andreas Krebbel2-6/+6
2015-04-24[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.Richard Earnshaw1-15/+0
2015-04-23Improve warning messages for la/dlaMatthew Fortune5-0/+10
2015-04-23Fix r6-branch-constraints test when run with n64 as default ABIMatthew Fortune1-1/+2
2015-04-23x86: disambiguate disassembly of certain AVX512 insnsJan Beulich6-480/+480
2015-04-23x86: don't require operand size specification for AVX512 broadcastsJan Beulich6-238/+238
2015-04-20Don't hardcode offset of .shstrtab sectionH.J. Lu18-24/+24
2015-04-15Handle invalid prefixes for rdrand and rdseedH.J. Lu2-0/+43
2015-04-15[ARM] Disassembles SSAT and SSAT16 instructions incorrectly for Thumb-2Renlin Li2-16/+16
2015-04-14Adds support to the RL78 port for linker relaxation affecting .debug sections.Nick Clifton1-3/+4
2015-04-08Add SHF_COMPRESSED support to gas and objcopyH.J. Lu5-0/+227
2015-03-31Remove the last change on dw2-compress-1.dH.J. Lu1-1/+1
2015-03-31Add --with-system-zlib in gasH.J. Lu1-1/+1
2015-03-20Limit multi-byte nop instructions to 10 bytesH.J. Lu44-3334/+848
2015-03-19Fix building and testing dwarf debug section compression feature when zlib is...Nick Clifton1-1/+1
2015-03-18Add a testcase for PR gas/18087H.J. Lu4-1/+201
2015-03-18Fix debug section compression so that it is only performed if it would make t...Jon Turney1-2/+2
2015-03-17Add znver1 processorGanesh Gopalasubramanian12-0/+481
2015-03-13MIPS: Fix constraint issues with the R6 beqc and bnec instructionsAndrew Bennett3-0/+52
2015-03-13Add support for MIPS R6 evp and dvp instructions.Andrew Bennett4-0/+17
2015-03-13[AArch64] Don't warn on XZR/SP overlapping when it's in load/storeJiong Wang2-0/+88
2015-03-13[AArch64] Don't tail-pads sections to the alignmentJiong Wang2-0/+30
2015-03-10S/390: Add more IBM z13 instructionsAndreas Krebbel2-0/+268
2015-03-10[ARM]Fix "align directive causes MAP_DATA symbol to be lost"Sterling Augustine2-6/+6
2015-03-10[AARCH64] Remove Load/Store register (unscaled immediate) alias.Jiong Wang3-199/+199
2015-03-10[AArch64] Set the minimum alignment on code segmentsJiong Wang2-0/+18
2015-03-04Allow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NCRichard Sandiford2-0/+7