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2015-10-22Fix tests for PR 18500, revisitedAlan Modra3-34/+34
2015-10-21Fix tests for PR 18500 so that they will pass for big-endian ARM toolchains.Nick Clifton3-34/+34
2015-10-14S/390: Fix instruction type of troo, trot, trto, and trtt.Andreas Krebbel4-24/+24
2015-10-12avr: Fix bugs in org/align tracking.Andrew Burgess2-10/+13
2015-10-07New ARC implementation.Nick Clifton78-3015/+1728
2015-10-02[GAS][AARCH64]Add TLSDESC large memory model support.Renlin Li6-0/+60
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li4-0/+26
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li2-0/+13
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li2-0/+13
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li2-0/+14
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li2-0/+14
2015-09-30Revise new e500 invalid opcode testAlan Modra3-9/+8
2015-09-29Add support for extensions in the .machine pseudoop on S/390, e.g. ".machine ...Dominik Vogt13-0/+38
2015-09-28Patches for illegal ppc 500 instructionsTom Rix3-0/+20
2015-09-10S/390: Fix instruction format of crj*, clrj*, and clgrj*.Andreas Krebbel1-39/+39
2015-09-10S/390: Fix MASK_RIE_R0PI and MASK_RIE_R0PU.Andreas Krebbel1-52/+52
2015-09-09S/390: Fix opcode of ppno.Andreas Krebbel1-1/+1
2015-08-25Update MIPS tests for test failures on some configurations.Simon Dardis3-14/+14
2015-08-25Support for the sparc %pmcdper privileged register.Jose E. Marchesi4-0/+4
2015-08-24Fix the partial disassembly of a broken three byte instruction at the end of ...Jan Stancek2-0/+15
2015-08-21Allow symbol and label names to be enclosed in double quotes.Nick Clifton5-4/+15
2015-08-21PR binutils/18257: Properly decode x86/Intel mask instructions.Alexander Fomin4-2/+994
2015-08-19[AArch64][5/6] GAS support TLSLD load/store relocation typesJiong Wang16-0/+127
2015-08-19[AArch64][3/6] GAS support TLSLD move/add relocation typesJiong Wang20-0/+144
2015-08-19[AArch64][1/6] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NCJiong Wang4-0/+29
2015-08-13Fixes for unpredictable nops and 26-bit versions of teq,tst,cmn,cmp.Andre Vieira3-16/+32
2015-08-12xtensa: add --auto-litpools optionMax Filippov3-0/+26
2015-08-12[MIPS] Map 'move' to 'or'.Simon Dardis35-171/+188
2015-08-11[AArch64][7/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12Jiong Wang4-0/+29
2015-08-11[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NCJiong Wang4-0/+31
2015-08-11[AArch64][2/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21Jiong Wang4-0/+34
2015-08-10Add SIGRIE instruction for MIPS R6Robert Suchanek4-0/+9
2015-07-30Properly disassemble movnti in Intel modeH.J. Lu3-0/+327
2015-07-24Fix the evaluation of RL78 complex relocs, by making immediate values be comp...Nick Clifton4-1/+14
2015-07-22Fix memory operand size for vcvtt?ps2u?qq instructionsH.J. Lu12-240/+312
2015-07-21[ARM] Support correctly spelled ARMv6KZ architecture namesMatthew Wahab2-0/+28
2015-07-16Updates the ARM disassembler's output of floating point constants to include ...Alessandro Marzocchi1-2/+2
2015-07-16[AArch64][2/3] GAS support BFD_RELOC_AARCH64_TLSLD_ADR_PREL21Jiong Wang4-0/+33
2015-07-16[ARM] Make human parsing of "processor does not support instruction in mode" ...James Greenhalgh6-137/+137
2015-07-10Updated to accept .debug_* sectionsH.J. Lu1-2/+2
2015-07-08Define DIFF_EXPR_OK for avr target to allow PC relative difference relocation.Denis Chertykov2-0/+54
2015-07-03Remove ppc860, ppc750cl, ppc7450 insns from common ppc.Alan Modra1-2/+2
2015-07-01Assembler tests for Nios II R2Sandra Loosemore122-0/+3736
2015-06-30Add support for monitorx/mwaitx instructionsAmit Pawar15-4/+286
2015-06-27Update ia64 gas testsH.J. Lu2-2/+2
2015-06-25Update .strtab section sizes in mmix testsH.J. Lu2-2/+2
2015-06-25Use strtab with GC and suffix merging for .strtabH.J. Lu3-0/+17
2015-06-22PPC sync instruction accepts invalid and incompatible operandsPeter Bergner2-4/+4
2015-06-22Stop "objdump -d" from disassembling past a symbolic address.Nick Clifton6-36/+37
2015-06-19Allow for optional operands with non-zero default values.Peter Bergner3-5/+5