Age | Commit message (Collapse) | Author | Files | Lines |
|
|
|
|
|
|
|
* doc/Makefile.am (install-info): Define.
* aclocal.m4: Regenerate.
* Makefile.in: Regenerate.
* doc/Makefile.in: Regenerate.
|
|
* doc/c-z8k.texi: Document command-line options. Fix byte
register names. Document '.z8001' and '.z8002' directives.
Extend addressing modes documentation.
|
|
(rn_table, iwmmxt_table, cp_table, cn_table, fn_table, sn_table,
dn_table, mav_mvf_table, mac_mvd_table, mav_mvfx_table,
mav_mvax_table, mav_dspc_table): Initialise new field.
(insert_reg_alias): Initialise new field.
(md_pseudo_table): Add "unreq" entry.
(s_unreq): New function: Undo the effects of a previous .req.
* doc/c-arm.texi: Document new pseudo op.
* NEWS: Mention new feature.
* testsuite/gas/arm/req.s: New test file. Check .req and .unreq psuedo ops.
* testsuite/gas/arm/req.l: Expected error output from req.s test.
* testsuite/gas/arm/copro.d: Set target architecture for objdump so that the
test will work on architectures which cannot encode higher arm architecture
types in their file headers.
* testsuite/gas/arm/arm.exp: Run new req.s test.
Skip thumb instruction test for PE targets which do not support
thumb relocations.
* testsuite/gas/elf/elf.exp: Skip special handling of section2 test for XScale
targets - it is no longer needed.
|
|
|
|
|
|
* doc/c-ia64.texi: Likewise.
* doc/c-mmix.texi: Likewise.
* doc/c-sh64.texi: Likewise.
* doc/c-xtensa.texi: Likewise.
* doc/internals.texi: Likewise.
|
|
|
|
* doc/c-mmix.texi (MMIX-Opts): Document --no-pushj-stubs and
--no-stubs.
* config/tc-mmix.c: Include limits.h. Expand on mmix_relax_table
comment.
(expand_op, mmix_next_semicolon_is_eoln): Fix head comment.
(pushj_stubs): New variable.
(OPTION_NOPUSHJSTUBS, STATE_PUSHJSTUB, PUSHJSTUB_MIN)
(PUSHJSTUB_MAX): New macros.
(md_longopts): New options "--no-pushj-stubs" and synonym
"--no-stubs".
(mmix_relax_table): Handle new entry for STATE_PUSHJSTUB.
(md_parse_option): Handle OPTION_NOPUSHJSTUBS.
(md_estimate_size_before_relax): Modify STATE_PUSHJ state for
PUSHJ stub relaxation.
(md_convert_frag): Handle STATE_PUSHJSTUB.
(md_apply_fix3): Handle BFD_RELOC_MMIX_PUSHJ_STUBBABLE.
(tc_gen_reloc): Ditto.
(mmix_md_relax_frag): Handle PUSHJ stub relaxation.
* config/tc-mmix.h (TC_SEGMENT_INFO_TYPE): Define.
(struct mmix_segment_info_type): New.
|
|
|
|
(parse_args) : Accept new --gstabs+ option, and set `use_gnu_debug_info_extensions'.
(show_usage) : Document --gstabs+ option.
* as.h (use_gnu_debug_info_extensions) : New extern declaration.
* stabs.c (stabs_generate_asm_file) : If `use_gnu_debug_info_extensions' is set
add the compilation directory to the stabs debug info.
* doc/as.texinfo : Document --gstabs+ option.
* NEWS: Mention new feature.
|
|
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* archures.c (bfd_mach_mipsisa64r2): New define.
* bfd-in2.h: Regenerate.
* aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2.
* cpu-mips.c (I_mipsisa64r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa64r2.
* elfxx-mips.c (_bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2.
(mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case.
(mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2.
[ binutils/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2.
[ gas/Changelog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs.
* configure: Regenerate.
* config/tc-mips.c (imm2_expr): New variable.
(md_assemble, mips16_ip): Initialize imm2_expr.
(ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2.
(macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands.
(macro): Handle M_DEXT and M_DINS.
(validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands.
(mips_ip): Likewise.
(OPTION_MIPS64R2): New define.
(md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2).
OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2.
(md_parse_option): Handle OPTION_MIPS64R2.
(s_mipsset): Handle setting "mips64r2" ISA.
(mips_cpu_info_table): Add mips64r2.
(md_show_usage): Document -mips64r2 option.
* doc/as.texinfo: Docuemnt -mips64r2 option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips64r2.d: New file.
* gas/mips/cp0sel-names-mips64r2.d: New file.
* gas/mips/elf_arch_mips64r2.d: New file.
* gas/mips/hwr-names-mips64r2.d: New file.
* gas/mips/mips32r2-ill-fp64.l: New file.
* gas/mips/mips32r2-ill-fp64.s: New file.
* gas/mips/mips64r2-ill.l: New file.
* gas/mips/mips64r2-ill.s: New file.
* gas/mips/mips64r2.d: New file.
* gas/mips/mips64r2.s: New file.
* gas/mips/mips.exp: Define "mips64r2" arch, and run new tests.
[ include/elf/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_64R2): New define.
[ include/opcode/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document +E, +F, +G, +H, and +I operand types.
Update documentation of I, +B and +C operand types.
(INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines.
(M_DEXT, M_DINS): New enum values.
[ ld/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ldmain.c (get_emulation): Ignore "-mips64r2".
[ ld/testsuite/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* ld-mips-elf/mips-elf-flags.exp: Add tests for combinations
with MIPS64r2.
[ opcodes/ChangeLog ]
2003-09-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_arch_choices): Add entry for "mips64r2"
(print_insn_args): Add handing for +E, +F, +G, and +H.
* mips-opc.c (I65): New define for MIPS64r2.
(mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins",
"dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh",
and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to
be supported on MIPS64r2.
|
|
|
|
|
|
and AC_CONFIG_COMMANDS instead of the three-argument AC_OUTPUT.
Specify AC_CONFIG_AUX_DIR.
* aclocal.m4: Regenerated with aclocal-1.7.
* configure: Regenerated with autoconf 2.57.
* Makefile.in, doc/Makefile.in: Regenerated with automake-1.7.
|
|
|
|
(dot_cfi, output_cfi_insn): Handle DW_CFA_GNU_window_save.
(output_cie): Don't use DW_EH_PE_pcrel if neither DIFF_EXPR_OK
nor tc_cfi_emit_pcrel_expr are defined.
(output_fde): Use tc_cfi_emit_pcrel_expr if available and
DIFF_EXPR_OK is not defined.
* config/tc-sparc.h (TARGET_USE_CFIPOP): Define.
(tc_cfi_frame_initial_instructions, tc_regname_to_dw2regnum,
tc_cfi_emit_pcrel_expr): Define.
(sparc_cfi_frame_initial_instructions, sparc_regname_to_dw2regnum,
sparc_cfi_emit_pcrel_expr): New prototypes.
(sparc_cie_data_alignment): New decl.
(DWARF2_DEFAULT_RETURN_COLUMN, DWARF2_CIE_DATA_ALIGNMENT): Define.
* config/tc-sparc.c: Include dw2gencfi.h.
(sparc_cie_data_alignment): New variable.
(md_begin): Initialize it.
(sparc_cfi_frame_initial_instructions): New function.
(sparc_regname_to_dw2regnum): Likewise.
(sparc_cfi_emit_pcrel_expr): Likewise.
* doc/as.texinfo: Document .cfi_gnu_window_save.
* config/tc-sparc.c (s_common): Cast last argument to long and
change format string to shut up warning.
testsuite/
* gas/cfi/cfi-sparc-1.s: New test.
* gas/cfi/cfi-sparc-1.d: New test.
* gas/cfi/cfi-sparc64-1.s: New test.
* gas/cfi/cfi-sparc64-1.d: New test.
* gas/cfi/cfi.exp: Run them.
|
|
* doc/c-i860.texi: Update text about relocatable address expansions.
|
|
(md_apply_fix3): Warning fix.
(md_show_usage): Add -m440.
* doc/c-ppc.texi: Document -m440.
|
|
* config/tc-i860.c (s_align_wrapper): New function and prototype.
(md_pseudo_table): Change s_align_bytes to s_align_wrapper, remove
surrounding OBJ_ELF ifdef, and re-format slightly.
* doc/c-i860.texi: Document the special .align syntax available
in Intel mode.
|
|
* doc/c-i860.texi: Mention that .dual, .enddual, and .atmp
directives are only available in Intel syntax mode.
|
|
* config/tc-i860.c: Remove SYNTAX_SVR4 macro and occurrences.
(target_intel_syntax): Declare variable.
(OPTION_INTEL_SYNTAX): Declare macro.
(md_longopts): Add option -mintel-syntax.
(md_parse_option): Set target_intel_syntax.
(md_show_usage): Add -mintel-syntax usage.
(md_begin): Set reg_prefix based on target_intel_syntax.
(i860_process_insn): Skip register prefix only if there is one.
Parse relocatable expressions in either Intel or AT&T syntax based
on target_intel_syntax instead of the SYNTAX_SVR4 macro.
* doc/c-i860.texi: Document -mintel-syntax option and give blurb
about the differences in syntax.
|
|
(md_begin) [OBJ_ELF]: Use it to control .pdr creation.
(s_mips_end) [OBJ_ELF]: Likewise.
(md_longopts) [OBJ_ELF]: Define OPTION_PDR, OPTION_NO_PDR.
(md_parse_option) [OBJ_ELF]: Handle them.
(md_show_usage) [OBJ_ELF]: Document -mpdr, -mno-pdr.
* doc/c-mips.texi (MIPS Opts): Document -mpdr, -mno-pdr.
* doc/as.texinfo (Overview) [MIPS]: Likewise.
|
|
|
|
|
|
|
|
directives node.
|
|
(cfi_add_CFA_nop): Remove.
(CFI_escape, dot_cfi_escape): New.
(dot_cfi): Remove nop.
(cfi_pseudo_table): Remove nop; add escape.
(output_cfi_insn): Likewise.
(select_cie_for_fde): Stop on escape.
* dw2gencfi.h (cfi_add_CFA_nop): Remove.
* read.c, read.h (do_parse_cons_expression): New.
* doc/as.texinfo (.cfi_escape): New.
* gas/cfi/cfi-common-3.[ds]: New.
* gas/cfi/cfi.exp: Run it.
|
|
* NEWS: Updated for the new -n option for the i386 assembler.
* config/tc-i386.c (optimize_align_code): New.
(md_shortopts): Add 'n'.
(md_parse_option): Handle 'n'.
(md_show_usage): Add '-n'.
* config/tc-i386.h (optimize_align_code): Declared.
(md_do_align): Optimize code alignment only if optimize_align_code
is not 0.
* doc/as.texinfo: Add the new -n option.
* doc/c-i386.texi: Document the new -n option.
|
|
|
|
(md_pseudo_table): Add it.
(alpha_cfi_frame_initial_instructions): New.
* config/tc-alpha.h (TARGET_USE_CFIPOP): New.
(tc_cfi_frame_initial_instructions): New.
* doc/c-alpha.texi: Document .usepv.
* gas/alpha/elf-usepv-1.[sd]: New.
* gas/alpha/elf-usepv-2.[sd]: New.
* gas/alpha/alpha.exp: Run them.
* gas/cfi/cfi-alpha-3.[sd]: New.
* gas/cfi/cfi.exp: Run it.
|
|
gas:
* config/tc-i860.c (target_xp): Declare variable.
(OPTION_XP): Declare macro.
(md_longopts): Add option -mxp.
(md_parse_option): Set target_xp.
(md_show_usage): Add -mxp usage.
(i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
(md_assemble): Don't try expansions if XP_ONLY is set.
* doc/c-i860.texi: Document -mxp option.
gas/testsuite:
* gas/i860/xp.s: New file.
* gas/i860/xp.d: New file.
include/opcode:
* i860.h (expand_type): Add XP_ONLY.
(scyc.b): New XP instruction.
(ldio.l): Likewise.
(ldio.s): Likewise.
(ldio.b): Likewise.
(ldint.l): Likewise.
(ldint.s): Likewise.
(ldint.b): Likewise.
(stio.l): Likewise.
(stio.s): Likewise.
(stio.b): Likewise.
(pfld.q): Likewise.
opcodes:
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
|
|
* config/tc-i386.c (tc_x86_cfi_init): New function.
* config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines.
* as.c (parse_args): Set verbose flag on --verbose.
(main): Call tc_cfi_init()/cfi_finish().
* as.h (verbose): New external variable.
* read.c (pobegin): Insert CFI pops to the list.
* symbols.c (local_symbol_make): Make symbol external.
* symbols.h (local_symbol_make): New prototype.
* Makefile.am: Add dw2gencfi.[ch] files. Run "make dep-am".
* Makefile.in: Regenerate.
* doc/as.texinfo: Added node "CFI directives" with description of
all implemented .cfi_* directives.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
|
|
|
|
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH.
* cpu-sh.c: Likewise.
* elf32-sh.c: Likewise.
* reloc.c (bfd_reloc_code_real): Likewise.
* elf32-sh64-com.c: Change comment to refer to SuperH.
* elf32-sh64.c: Likewise.
* elf64-sh64.c: Likewise.
* bfd-in2.h (enum bfd_architecture): Regenerate.
binutils:
* readelf.c (get_machine_name) <EM_SH>: Amend return value
to refer to SuperH.
gas:
* config/tc-sh.c: Amend comment to refer to SuperH.
* config/tc-sh.h: Likewise.
(LISTING_HEADER): Amend to refer to SuperH.
* config/tc-sh64.c: Change comment to refer to SuperH.
* config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH.
* doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH.
* doc/c-sh.texi: Amend to refer to SuperH.
Add SuperH architecture documentation references.
* doc/c-sh64.texi: Change to refer to SuperH.
include/elf:
* common.h (EM_SH): Amend comment to refer to SuperH.
ld/testsuite:
* ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH.
* ld-sh/sh64/crange3-media.rd (Machine): Likewise.
|
|
|
|
|
|
-mlong, -mshort-double and -mlong-double options; use table @code.
(M68HC11-Syntax): Update to document 68HC12 operands.
(M68HC11-Modifiers): New section for operand modifiers.
(M68HC11-Directives): New section for specific assembler directives.
(M68HC11-Branch): Fix Overfull hbox error.
|
|
|
|
|
|
|
|
|
|
* symbols.h (S_FORCE_RELOC): Likewise.
* config/obj-aout.h (S_FORCE_RELOC): Likewise.
* config/obj-bout.h (S_FORCE_RELOC): Likewise.
* config/obj-coff.h (S_FORCE_RELOC): Likewise.
* config/obj-ieee.h (S_FORCE_RELOC): Likewise.
* config/obj-vms.h (S_FORCE_RELOC): Likewise.
* write.c (generic_force_reloc): New function.
(TC_FORCE_RELOCATION): Use it here instead of S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
(adjust_reloc_syms): Adjust S_FORCE_RELOC call.
* as.h (generic_force_reloc): Declare.
* doc/internals.texi (S_FORCE_RELOC): Update.
(TC_FORCE_RELOCATION_SUB_SAME): Update.
* config/tc-alpha.c (alpha_force_relocation): Adjust to use
generic_force_reloc.
(alpha_fix_adjustable): Likewise.
* config/tc-arm.c (arm_force_relocation): Likewise.
* config/tc-cris.c (md_cris_force_relocation): Likewise.
* config/tc-frv.c (frv_force_relocation): Likewise.
* config/tc-i386.c (md_apply_fix3): Likewise.
* config/tc-ia64.c (ia64_force_relocation): Likewise.
* config/tc-ip2k.c (ip2k_force_relocation): Likewise.
* config/tc-m32r.c (m32r_force_relocation): Likewise.
* config/tc-m68hc11.c (tc_m68hc11_force_relocation): Likewise.
* config/tc-mcore.c (mcore_force_relocation): Likewise.
* config/tc-mips.c (mips_force_relocation): Likewise.
* config/tc-mmix.c (mmix_force_relocation): Likewise.
* config/tc-ppc.c (ppc_force_relocation): Likewise.
* config/tc-s390.c (tc_s390_force_relocation): Likewise.
* config/tc-sh.c (sh_force_relocation): Likewise.
(md_pcrel_from_section): Likewise.
* config/tc-sparc.c (tc_gen_reloc): Likewise.
* config/tc-v850.c (v850_force_relocation): Likewise.
* config/tc-xstormy16.c (xstormy16_force_relocation): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-mcore.h (TC_FORCE_RELOCATION): Likewise.
* config/tc-sparc.h (tc_fix_adjustable): Likewise.
* config/tc-d10v.c (d10v_force_relocation): Delete.
* config/tc-d10v.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-dlx.c (md_dlx_force_relocation): Delete.
* config/tc-dlx.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-fr30.c (fr30_force_relocation): Delete.
* config/tc-fr30.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-mn10300.c (mn10300_force_relocation): Delete.
* config/tc-mn10300.h (TC_FORCE_RELOCATION): Don't define.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-i960.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
* config/tc-hppa.c (hppa_force_relocation): Adjust S_FORCE_RELOC call.
* config/tc-mips.c (RELAX_BRANCH_TOOFAR): Warning fix.
* config/tc-mips.h (TC_FORCE_RELOCATION_SUB_SAME): Don't define.
* config/tc-openrisc.c (openrisc_force_relocation): Delete.
* config/tc-openrisc.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sparc.c (elf32_sparc_force_relocation): Delete.
* config/tc-sparc.h (TC_FORCE_RELOCATION): Don't define for ELF.
* config/tc-i386.c (i386_force_relocation): Delete.
* config/tc-i386.h (TC_FORCE_RELOCATION): Don't define for
BFD_ASSEMBLER.
(EXTERN_FORCE_RELOC): Fix TE_PE and STRICT_PE_FORMAT nesting.
* config/tc-m68k.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-pj.h (TC_FORCE_RELOCATION): Don't define.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_ABS): Don't call
S_FORCE_RELOC.
(TC_FORCE_RELOCATION_SUB_SAME): Test TC_FORCE_RELOCATION too.
* config/tc-sh64.h (TC_FORCE_RELOCATION_SUB_SAME): Likewise.
|
|
(md_parse_option): Recognize -m68hcs12.
(m68hc11_elf_final_processing): Set EF_M68HCS12_MACH flag to identify
HCS12.
* doc/as.texinfo (Overview): Document new option -m68hcs12.
|
|
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* config/tc-mips.c: Update copyright years to include 2003.
(mips_ip): Fix indentation of "+A", "+B", and "+C" handling.
Additionally, clean up their code slightly and clean up their
comments some more.
* doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation.
[ gas/testsuite/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* gas/mips/elf_arch_mips32r2.d: Fix file description comment.
[ include/opcode/ChangeLog ]
2003-01-02 Chris Demetriou <cgd@broadcom.com>
* mips.h: Update copyright years to include 2002 (which had
been missed previously) and 2003. Make comments about "+A",
"+B", and "+C" operand types more descriptive.
|
|
$(CPU_DOCS)".
* doc/Makefile.in: Regenerate.
|
|
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
|
|
|