| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2014-05-20 | Add MIPS .module directive | mfortune | 1 | -0/+14 | |
| gas/ * config/tc-mips.c (file_mips_opts_checked): New static global. (s_module): New static function. (file_ase): Remove. (mips_pseudo_table): Add .module handler. (mips_set_ase): Add opts argument and use instead of mips_opts. (md_assemble): Use file_mips_check_options. (md_parse_option): Update to use file_mips_opts instead of mips_opts. (mips_set_architecture): Delete function. Moved to... (mips_after_parse_args): Here. All logic now applies to file_mips_opts first and then copies the final state to mips_opts. Move error checking and defaults inference to mips_check_options and file_mips_check_options. (mips_check_options): New static function. Common option checking for command line, .module and .set. Use .module values in error messages instead of refering to command line options. (file_mips_check_options): New static function. A wrapper for mips_check_options with file_mips_opts. Updates BFD arch based on final options. (s_mipsset): Split into s_mipsset and parse_code_option. Settings supported by both .set and .module are moved to parse_code_option. Warnings and errors are kept in s_mipsset because when parse_code_option is used with s_module the warnings are deferred until code is generated. Any setting supporting 'default' value is kept in s_mipsset as it is not applicable to s_module. Inferred settings are also kept in s_mipsset as s_module does not infer any settings. Use mips_check_options. (parse_code_option): New static function derived from s_mipsset. (s_module): New static function that implements .module. Allows file level settings to be changed until code is generated. (s_cpload, s_cpsetup, s_cplocal): Use file_mips_check_options. (s_cprestore, s_cpreturn, s_cpadd, mips_address_bytes): Likewise. (mips_elf_final_processing): Update file_ase to file_mips_opts.ase. (md_mips_end): Use file_mips_check_options. * doc/c-mips.texi: Document .module. gas/testsuite * gas/mips/mips.exp: Add new tests. Use 64-bit ABI for relax-bc1any. Fix micromips arch definition to use mips64r2 consistently. * gas/mips/module-defer-warn1.s: New. * gas/mips/module-defer-warn1.d: New. * gas/mips/module-defer-warn2.s: New. * gas/mips/module-defer-warn2.l: New. * gas/mips/module-override.d: New. * gas/mips/module-override.s: New. * gas/mips/mips-gp32-fp64.l: Update expected output. * gas/mips/mips-gp64-fp32-pic.l: Update expected output. * gas/mips/mips-gp64-fp32.l: Update expected output. | |||||
| 2014-05-16 | This adds support for marking RL78 binaries as either supporting 32-bit | Kaushik Phata | 2 | -2/+18 | |
| or 64-bit doubles. It also makes the linker complain if the user attempts to link together binaries with different sized doubles. * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if 64-bit doubles objects mix with 32-bit doubles objects. (rl78_elf_print_private_bfd_data): Describe 64-bit doubles flag. * readelf.c (get_machine_flags): Handle RL78 64-bit doubles flag. * config/tc-rl78.c (enum options): Add OPTION_32BIT_DOUBLES and OPTION_64BIT_DOUBLES. (md_longopts): Add -m32bit-doubles and -m64bit-doubles. (md_parse_option): Parse -m32bit-doubles and -m64bit-doubles. (md_show_usage): Show all of the RL78 options. (rl78_float_cons): New static functions. (md_pseudo_table): Update handler for "double". | |||||
| 2014-05-07 | Add MIPS r3 and r5 support. | Andrew Bennett | 2 | -10/+23 | |
| This patch firstly adds support for mips32r3 mips32r5, mips64r3 and mips64r5. Secondly it adds support for the eretnc instruction. ChangeLog: bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r3, mips64r3, mips32r5 and mips64r5. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. * cpu-mips.c (arch_info_struct): Likewise. * elfxx-mips.c (mips_set_isa_flags): Likewise. gas/ * tc-mips.c (ISA_SUPPORTS_MIPS16E): Add mips32r3, mips32r5, mips64r3 and mips64r5. (ISA_HAS_64BIT_FPRS): Likewise. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_64BIT_REGS): Add mips64r3 and mips64r5. (ISA_HAS_DROR): Likewise. (options): Add OPTION_MIPS32R3, OPTION_MIPS32R5, OPTION_MIPS64R3, and OPTION_MIPS64R5. (mips_isa_rev): Add support for mips32r3, mips32r5, mips64r3 and mips64r5. (md_parse_option): Likewise. (s_mipsset): Likewise. (mips_cpu_info_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. Also change p5600 entry to be mips32r5. * configure.in: Add support for mips32r3, mips32r5, mips64r3 and mips64r5. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r3, -mips32r5, -mips64r3 and -mips64r5 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/mips.exp: Add MIPS32r5 tests. Also add the mips32r3, mips32r5, mips64r3 and mips64r5 isas to the testsuite. * gas/mips/r5.s: New test. * gas/mips/r5.d: Likewise. include/opcode/ * mips.h (INSN_ISA_MASK): Updated. (INSN_ISA32R3): New define. (INSN_ISA32R5): New define. (INSN_ISA64R3): New define. (INSN_ISA64R5): New define. (INSN_ISA64, INSN_ISA64R2, INSN_ISA3_32, INSN_ISA3_32R2, INSN_ISA4_32 INSN_ISA4_32R2, INSN_ISA5_32R2): Renumbered. (mips_isa_table): Add entries for mips32r3, mips32r5, mips64r3 and mips64r5. (INSN_UPTO32R3): New define. (INSN_UPTO32R5): New define. (INSN_UPTO64R3): New define. (INSN_UPTO64R5): New define. (ISA_MIPS32R3): New define. (ISA_MIPS32R5): New define. (ISA_MIPS64R3): New define. (ISA_MIPS64R5): New define. (CPU_MIPS32R3): New define. (CPU_MIPS32R5): New define. (CPU_MIPS64R3): New define. (CPU_MIPS64R5): New define. opcodes/ * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction. (I34): New define. (I36): New define. (I66): New define. (I68): New define. * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and mips64r5. (parse_mips_dis_option): Update MSA and virtualization support to allow mips64r3 and mips64r5. | |||||
| 2014-04-23 | Add support for the MIPS eXtended Physical Address (XPA) ASE. | Andrew Bennett | 2 | -0/+20 | |
| ChangeLog: binutils/ * doc/binutils.texi: Document the disassemble MIPS XPA instructions command line option. gas/ * config/tc-mips.c (options): Add OPTION_XPA and OPTION_NO_XPA. (md_longopts): Add xpa and no-xpa command line options. (mips_ases): Add MIPS XPA ASE. (mips_cpu_info_table): Update p5600 entry to allow the XPA ASE. * doc/as.texinfo: Document the MIPS XPA command line options. * doc/c-mips.texi: Document the MIPS XPA command line options, and assembler directives. gas/testsuite/ * gas/mips/mips.exp: Add xpa tests. * gas/mips/xpa.s: New test. * gas/mips/xpa.d: Likewise. include/ * opcode/mips.h (ASE_XPA): New define. opcodes/ * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2 to allow the MIPS XPA ASE. (parse_mips_dis_option): Process the -Mxpa option. * mips-opc.c (XPA): New define. (mips_builtin_opcodes): Add MIPS XPA instructions and move the locations of the ctc0 and cfc0 instructions. | |||||
| 2014-04-22 | Remove support for the (deprecated) openrisc and or32 configurations and replace | Christian Svensson | 1 | -1/+1 | |
| with support for the new or1k configuration. | |||||
| 2014-04-10 | Add support for the MIPS P5600 family of CPUs. | Andrew Bennett | 1 | -0/+1 | |
| ChangeLog: 2014-04-10 Andrew Bennett <andrew.bennett@imgtec.com> * config/tc-mips.c (mips_cpu_info_table): Add P5600 configuation. * doc/c-mips.texi: Document p5600. | |||||
| 2014-03-29 | * config/tc-avr.c: Add specified_mcu variable for selected mcu. | Denis Chertykov | 1 | -0/+4 | |
| (enum options): add OPTION_RMW_ISA for -mrmw option. (struct option md_longopts): Add mrmw option. (md_show_usage): add -mrmw option description. (md_parse_option): Update isa details if -mrmw option specified. * doc/c-avr.texi: Add doc for new option -mrmw. * gas/avr/avr.exp: Run new tests. * gas/avr/rmw.d: Add test for additional ISA support. * gas/avr/rmw.s: Ditto. | |||||
| 2014-03-29 | * gas/ChangeLog: Revert | Denis Chertykov | 1 | -4/+0 | |
| * gas/config/tc-avr.c: Revert * gas/doc/c-avr.texi: Revert * gas/testsuite/ChangeLog: Revert * gas/testsuite/gas/avr/avr.exp: Revert * gas/testsuite/gas/avr/rmw.d: Revert * gas/testsuite/gas/avr/rmw.s: Revert This reverts commit d24e46e3e247e46eb2f5e7ebb5efd0f9fcc5fcdd. | |||||
| 2014-03-29 | * config/tc-avr.c: Add specified_mcu variable for selected mcu. | Denis Chertykov | 1 | -0/+4 | |
| (enum options): add OPTION_RMW_ISA for -mrmw option. (struct option md_longopts): Add mrmw option. (md_show_usage): add -mrmw option description. (md_parse_option): Update isa details if -mrmw option specified. * doc/c-avr.texi: Add doc for new option -mrmw. * gas/avr/avr.exp: Run new tests. * gas/avr/rmw.d: Add test for additional ISA support. * gas/avr/rmw.s: Ditto. | |||||
| 2014-03-21 | Add support to the Xtensa target for creating trampolines for out-of-range ↵ | David Weatherford | 2 | -0/+93 | |
| branches. * tc-xtensa.c (xtensa_check_frag_count, xtensa_create_trampoline_frag) (xtensa_maybe_create_trampoline_frag, init_trampoline_frag) (find_trampoline_seg, search_trampolines, get_best_trampoline) (check_and_update_trampolines, add_jump_to_trampoline) (dump_trampolines): New function. (md_parse_option): Add cases for --[no-]trampolines options. (md_assemble, finish_vinsn, xtensa_end): Add call to xtensa_check_frag_count. (xg_assemble_vliw_tokens): Add call to xtensa_maybe_create_trampoline_frag. (xtensa_relax_frag): Relax fragments with RELAX_TRAMPOLINE state. (relax_frag_immed): Relax jump instructions that cannot reach its target. * tc-xtensa.h (xtensa_relax_statesE::RELAX_TRAMPOLINE): New relax state. * as.texinfo: Document --[no-]trampolines command-line options. * c-xtensa.texi: Document trampolines relaxation and command line options. * frags.c (get_frag_count, clear_frag_count): New function. (frag_alloc): Increment totalfrags counter. * frags.h (get_frag_count, clear_frag_count): New function. * all.exp: Add test for trampoline relaxation. * trampoline.d: Trampoline relaxation expected dump. * trampoline.s: Trampoline relaxation test source. | |||||
| 2014-03-19 | This patch adds support for the hyperprivileged registers %hstick_offset | Jose E. Marchesi | 1 | -2/+10 | |
| and %hstick_enable to the Sparc assembler. * config/tc-sparc.c (hpriv_reg_table): Added entries for %hstick_offset and %hstick_enable. * doc/c-sparc.texi (Sparc-Regs): Document the %hstick_offset and %hstick_enable hyperprivileged registers. * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and %hstick_enable added. * gas/sparc/rdhpr.s: Test rd %hstick_offset and %hstick_enable. * gas/sparc/rdhpr.d: Likewise. * gas/sparc/wrhpr.s: Test wr %hstick_offset and %hstick_enable. * gas/sparc/wrhpr.d: Likewise. | |||||
| 2014-03-19 | Add support for ARM assembler produced by CodeCompositor Studio. | Daniel Gutson | 3 | -0/+15 | |
| * config/tc-arm.c (codecomposer_syntax): New flag that states whether the CCS syntax compatibility mode is on or off. (asmfunc_states): New enum to represent the asmfunc directive state. (asmfunc_state): New variable holding the asmfunc directive state. (comment_chars): Rename to arm_comment_chars. (line_separator_chars): Rename to arm_line_separator_chars. (s_ccs_ref): New function that handles the .ref directive. (asmfunc_debug): New function. (s_ccs_asmfunc): New function that handles the .asmfunc directive. (s_ccs_endasmfunc): New function that handles the .endasmfunc directive. (s_ccs_def): New function that handles the .def directive. (tc_start_label_without_colon): New function. (md_pseudo_table): Added new CCS directives. (arm_ccs_mode): New function that handles the -mccs command line option. (arm_long_opts): Added new -mccs command line option. * config/tc-arm.h (LABELS_WITHOUT_COLONS): New macro. (TC_START_LABEL_WITHOUT_COLON): New macro. (tc_start_label_without_colon): Added extern function declaration. (tc_comment_chars): Define. (tc_line_separator_chars): Define. * app.c (do_scrub_begin): Use tc_line_separator_chars, if defined. * read.c (read_begin): Likewise. * doc/as.texinfo: Add documentation for the -mccs command line option. * doc/c-arm.texi: Likewise. * doc/internals.texi: Document tc_line_separator_chars. * NEWS: Mention the new feature. * gas/arm/ccs.s: New test case. * gas/arm/ccs.d: New expected disassembly. | |||||
| 2014-03-18 | Enable verbose error messages by default for AArch64 gas. | Yufeng Zhang | 1 | -0/+9 | |
| gas/ * config/tc-aarch64.c (aarch64_opts): Add new option "mno-verbose-error". (verbose_error_p): Initialize to 1. * doc/c-aarch64.texi (AArch64 Options): Document -mverbose-error and -mno-verbose-error. gas/testsuite/ * gas/aarch64/illegal.d: Pass -mno-verbose-error. * gas/aarch64/verbose-error.s: Add more verbose message testcases. * gas/aarch64/verbose-error.l: Ditto. | |||||
| 2014-03-13 | AArch64: Clean up docs and document -mcpu and -march. | Richard Earnshaw | 1 | -7/+76 | |
| 2014-03-13 Richard Earnshaw <rearnsha@arm.com> Jiong Wang <Jiong.Wang@arm.com> * doc/c-aarch64.texi: Clean up some formatting issues. (AArch64 Options): Document -mcpu and -march. (AArch64 Extensions): New node. | |||||
| 2014-03-13 | Add pe/x86_64 bigobj file format. | Tristan Gingold | 1 | -0/+5 | |
| bfd/ * peicode.h (pe_ILF_object_p): Adjust, as the version number has been read. (pe_bfd_object_p): Also read version number to detect ILF. * pe-x86_64.c (COFF_WITH_PE_BIGOBJ): Define. (x86_64pe_bigobj_vec): Define * coffcode.h (bfd_coff_backend_data): Add _bfd_coff_max_nscns field. (bfd_coff_max_nscns): New macro. (coff_compute_section_file_positions): Use unsigned int for target_index. Compare with bfd_coff_max_nscns. (bfd_coff_std_swap_table, ticoff0_swap_table, ticoff1_swap_table): Set a value for _bfd_coff_max_nscns. (header_bigobj_classid): New constant. (coff_bigobj_swap_filehdr_in, coff_bigobj_swap_filehdr_out) (coff_bigobj_swap_sym_in, coff_bigobj_swap_sym_out) (coff_bigobj_swap_aux_in, coff_bigobj_swap_aux_out): New functions. (bigobj_swap_table): New table. * libcoff.h: Regenerate. * coff-sh.c (bfd_coff_small_swap_table): Likewise. * coff-alpha.c (alpha_ecoff_backend_data): Add value for _bfd_coff_max_nscns. * coff-mips.c (mips_ecoff_backend_data): Likewise. * coff-rs6000.c (bfd_xcoff_backend_data) (bfd_pmac_xcoff_backend_data): Likewise. * coff64-rs6000.c (bfd_xcoff_backend_data) (bfd_xcoff_aix5_backend_data): Likewise. * targets.c (x86_64pe_bigobj_vec): Declare. * configure.in (x86_64pe_bigobj_vec): New vector. * configure: Regenerate. * config.bfd: Add bigobj object format for Windows targets. gas/ * config/tc-i386.c (use_big_obj): Declare. (OPTION_MBIG_OBJ): Define. (md_longopts): Add -mbig-obj option. (md_parse_option): Handle it. (md_show_usage): Display help for this option. (i386_target_format): Use bigobj for x86-64 if -mbig-obj. * doc/c-i386.texi: Document the option. gas/testsuite/ * gas/pe/big-obj.d, gas/pe/big-obj.s: Add test. * gas/pe/pe.exp: Add test. include/coff/ * pe.h (struct external_ANON_OBJECT_HEADER_BIGOBJ): Declare. (FILHSZ_BIGOBJ): Define. (struct external_SYMBOL_EX): Declare. (SYMENT_BIGOBJ, SYMESZ_BIGOBJ): Define. (union external_AUX_SYMBOL_EX): Declare. (AUXENT_BIGOBJ, AUXESZ_BIGOBJ): Define. * internal.h (struct internal_filehdr): Change type of f_nscns. | |||||
| 2014-03-12 | autoreconf | Alan Modra | 1 | -1/+1 | |
| Regenerate Makefile.in in bfd, binutils, gas, gold, gprof, ld, opcodes. Regenerate gas/config.in. | |||||
| 2014-03-06 | * gas/tc-avr.c: Add new devices | Denis Chertykov | 1 | -36/+40 | |
| avr25: ata5272, attiny828 avr35: ata5505, attiny1634 avr4: atmega8a, ata6285, ata6286, atmega48pa avr5: at90pwm161, ata5790, ata5795, atmega164pa, atmega165pa, atmega168pa, atmega32a, atmega64rfr2, atmega644rfr2, atmega64a, atmega16hva2 avr51: atmega128a, atmega1284 avrxmega2: atxmega16a4u, atxmega16c4, atxmega32a4u, atxmega32c4, atxmega32e5, atxmega16e5, atxmega8e5 avrxmega4: atxmega64a3u, atxmega64a4u, atxmega64b1, atxmega64b3, atxmega64c3, atxmega64d4 avrxmega6: atxmega128a3u, atxmega128b3, atxmega128c3, atxmega128d4, atxmega192a3u, atxmega192c3, atxmega256a3u, atxmega256c3, atxmega384c3, atxmega384d3 avrxmega7: atxmega128a4u * doc/c-avr.texi: Ditto. | |||||
| 2014-03-05 | Update copyright years | Alan Modra | 60 | -94/+62 | |
| 2014-03-03 | This patch enhances the MSP430 port of GAS so that, if requested, it will | Nick Clifton | 1 | -10/+17 | |
| generate warning messages about an instruction that changes the interrupt state not being followed by a NOP instruction. * config/msp430/msp430.c: Replace known mcu array with known msp430 ISA mcu name array. Accept any name for -mmcu option. Add -mz option to warn about missing NOP following an interrupt status change. (check_for_nop): New. (msp430_operands): Emit a warning, if requested, when an interrupt changing instruction is not followed by a NOP. * doc/c-msp430.c: Document -mz option. * gas/msp430/bad.d: Add -mz option. * gas/msp430/bad.s: Add more cases where warnings should be generated. * gas/msp430/bad.l: Add expected warning messages. | |||||
| 2014-02-21 | Add support for CPUID PREFETCHWT1 | Ilya Tocar | 1 | -0/+1 | |
| Latest AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF. This patch introduces CPUID PREFETCHWT1. gas/ * config/tc-i386.c (cpu_arch): Add .prefetchwt1. * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. * i386-opc.h (CpuPREFETCHWT1): New. (i386_cpu_flags): Add cpuprefetchwt1. * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. * i386-tbl.h: Regenerate. gas/testsuite * gas/i386/avx512pf-intel.d: Remove prefetchwt1. * gas/i386/avx512pf.s: Ditto. * gas/i386/avx512pf.d: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf.d: Ditto. * gas/i386/prefetchwt1-intel.d: New file. * gas/i386/prefetchwt1.s: Ditto. * gas/i386/prefetchwt1.d: Ditto. * gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * gas/i386/x86-64-prefetchwt1.s: Ditto. * gas/i386/x86-64-prefetchwt1.d: Ditto. | |||||
| 2014-02-12 | Add clflushopt, xsaves, xsavec, xrstors | Ilya Tocar | 1 | -0/+1 | |
| gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate. | |||||
| 2014-02-03 | Nios II large-GOT relocations | Sandra Loosemore | 1 | -0/+8 | |
| 2014-02-03 Sandra Loosemore <sandra@codesourcery.com> include/elf/ * nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New. (R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New. (R_NIOS2_ILLEGAL): Adjust. gas/ * config/tc-nios2.c (md_apply_fix): Test for new relocs. (nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo, %got_hiadj relocation operators. Sort table and add comment to explain ordering. (nios2_fix_adjustable): Test for new relocs. * doc/c-nios2.texi (Nios II Relocations): Document new relocation operators. bfd/ * reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New. (BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. * elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations. (nios2_reloc_map): Likewise. (GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED. Fixed all references. (nios2_elf32_relocate_section): Add new relocations. (nios2_elf32_check_relocs): Likewise. (nios2_elf32_gc_sweep_hook): Likewise. | |||||
| 2014-01-22 | Add .refsym to msp430 backend | DJ Delorie | 1 | -0/+9 | |
| * config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>" * doc/c-msp430.texi (MSP430 Directives): Document it. The purpose of this patch is to provide a way for one object file to require the inclusion of another object, without having to allocate space for a .word address reference. | |||||
| 2013-12-20 | Remove duplicated entry for .pad in c-arm.texi | Tristan Gingold | 1 | -7/+1 | |
| * doc/c-arm.texi (ARM Directives): Remove duplicate .pad entry. | |||||
| 2013-12-13 | * config/tc-msp430.c (mcu_types): Add some more 430X mcu names. | Nick Clifton | 1 | -8/+17 | |
| (OPTION_INTR_NOPS): Define. (gen_interrupt_nops): Default to FALSE. (md_parse_opton): Add support for OPTION_INTR_NOPS. (md_longopts): Add -mn. (md_show_usage): Add -mn. (msp430_operands): Generate NOPs for all MCUs not just 430Xv2. * doc/c-msp430.c: Document -mn. | |||||
| 2013-12-13 | Add support for Andes NDS32: | Kuan-Lin Chen | 5 | -3/+341 | |
| BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32. | |||||
| 2013-11-19 | 2013-11-19 Catherine Moore <clm@codesourcery.com> | Catherine Moore | 2 | -0/+11 | |
| gas/ * config/tc-mips.c (mips_fix_pmc_rm7000): Declare. (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000. (INSN_DMULT): Define. (INSN_DMULTU): Define. (insns_between): Detect PMC RM7000 errata. (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. * doc/as.texinfo: Document new options. * doc/c-mips.texi: Likewise. gas/testsuite/ * gas/mips/fix-pmc-rm7000-1.d: New. * gas/mips/fix-pmc-rm7000-1.s: New. * gas/mips/fix-pmc-rm7000-2.d: New. * gas/mips/fix-pmc-rm7000-2.s: New. * gas/mips/micromips@fix-pmc-rm7000-1.d: New. * gas/mips/micromips@fix-pmc-rm7000-2.d: New. * gas/mips/mips.exp: Run new tests. | |||||
| 2013-11-18 | Add support for armv7ve to gas. | Yufeng Zhang | 1 | -0/+1 | |
| gas/ * config/tc-arm.c (arm_archs): New armv7ve architecture option. (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15. (cpu_arch_ver): Likewise. * doc/c-arm.texi: Document armv7ve. gas/testsuite/ * gas/arm/attr-march-armv7ve.d: New test case for armv7ve. include/opcode/ * arm.h (ARM_AEXT_V7VE): New define. (ARM_ARCH_V7VE): New define. (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed. | |||||
| 2013-10-14 | 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com> | Chao-ying Fu | 2 | -0/+21 | |
| Chao-ying Fu <Chao-ying.Fu@imgtec.com> * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA. (md_longopts): Add mmsa and mno-msa. (mips_ases): Add msa. (RTYPE_MASK): Update. (RTYPE_MSA): New define. (OT_REG_ELEMENT): Replace with... (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types. (mips_operand_token): Replace reg_element with index. (mips_parse_argument_token): Treat vector indices as separate tokens. Handle register indices. (md_begin): Add MSA register names. (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL. (match_mdmx_imm_reg_operand): Update accordingly. (match_imm_index_operand): New function. (match_reg_index_operand): New function. (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v. (md_show_usage): Print -mmsa and -mno-msa. * doc/as.texinfo: Document -mmsa and -mno-msa. * doc/c-mips.texi: Document -mmsa and -mno-msa. Document .set msa and .set nomsa. | |||||
| 2013-09-30 | Add AMD bdver4 support. | Saravanan Ekanathan | 1 | -1/+2 | |
| gas/ * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS. * doc/c-i386.texi: Add -march=bdver4 option. gas/testsuite/ * gas/i386/i386.exp: Run bdver4 test cases. * gas/i386/nops-1-bdver4.d: New. * gas/i386/arch-10-bdver4.d: New. * gas/i386/x86-64-nops-1-bdver4.d: New. * gas/i386/x86-64-arch-2-bdver4.d: New. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS. * i386-init.h: Regenerated. | |||||
| 2013-09-18 | * config/tc-msp430.c (OPTION_MOVE_DATA): Define. | Nick Clifton | 1 | -0/+4 | |
| (move_data): New variable. (md_parse_option): Parse -md. (msp430_section): New function. Catch references to the .bss or .data sections and generate a special symbol for use by the libcrt library. (md_pseudo_table): Intercept .section directives. (md_longopt): Add -md (md_show_usage): Likewise. (msp430_operands): Generate a warning message if a NOP is inserted into the instruction stream. * doc/c-msp430.texi (node MSP430 Options): Document -md option. | |||||
| 2013-08-23 | PR binutils/15834 | Nick Clifton | 2 | -10/+6 | |
| Fix typos: --- bfd/bfdio.c | 2 +- bfd/elf32-spu.c | 2 +- bfd/elfnn-aarch64.c | 2 +- binutils/od-xcoff.c | 2 +- config/tcl.m4 | 2 +- gas/config/tc-ia64.c | 2 +- gas/config/tc-sparc.c | 2 +- gas/config/tc-z80.c | 12 ++++++------ gas/doc/c-i386.texi | 6 +++--- gas/doc/c-m32r.texi | 2 +- gas/testsuite/gas/d10v/instruction_packing.d | 2 +- gas/testsuite/gas/z80/atend.d | 2 +- gold/object.h | 2 +- include/gdb/remote-sim.h | 2 +- include/opcode/ChangeLog | 2 +- include/opcode/i960.h | 2 +- ld/testsuite/ld-mips-elf/mips16-pic-1.inc | 2 +- opcodes/aarch64-asm.c | 2 +- opcodes/aarch64-dis.c | 2 +- opcodes/msp430-dis.c | 2 +- | |||||
| 2013-08-09 | * elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10 | Nick Clifton | 1 | -4/+10 | |
| flag bits do not match. (rl78_elf_print_private_bfd_data): Describe G10 flag. * readelf.c (get_machine_flags): Handle RL78 G10 flag. * config/tc-rl78.c (elf_flags): New variable. (enum options): Add OPTION_G10. (md_longopts): Add mg10. (md_parse_option): Parse -mg10. (rl78_elf_final_processing): New function. * config/tc-rl78.c (tc_final_processing): Define. * doc/c-rl78.texi: Document -mg10 option. * rl78.c (E_FLAG_RL78_G10): Define. * lib/ld-lib.exp (check_shared_lib_support): Note that the RL78 does not support shared library generation. | |||||
| 2013-08-05 | gas/ | Eric Botcazou | 1 | -1/+2 | |
| * config/tc-sparc.c (sparc_arch_types): Add leon. (sparc_arch): Move sparc4 around and add leon. (sparc_target_format): Document -Aleon. * doc/c-sparc.texi: Likewise. include/ * opcode/sparc.h (sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_LEON. opcodes/ * sparc-dis.c (compute_arch_mask): Set SPARC_OPCODE_ARCH_LEON bit for bfd_mach_sparc. * sparc-opc.c (MASK_LEON): Define. (v6, v6notlet, v7, v8, v6notv9): Add MASK_LEON. (letandleon): New macro. (v9andleon): Likewise. (sparc_opc): Add leon. (umac): Enable for letandleon. (smac): Likewise. (casa): Enable for v9andleon. (cas): Likewise. (casl): Likewise. | |||||
| 2013-07-26 | Add Intel AVX-512 support | H.J. Lu | 1 | -0/+31 | |
| binutils/ 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> Sergey Lega <sergey.s.lega@intel.com> Anna Tikhonova <anna.tikhonova@intel.com> Ilya Tocar <ilya.tocar@intel.com> Andrey Turetskiy <andrey.turetskiy@intel.com> Ilya Verbin <ilya.verbin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * dwarf.c (dwarf_regnames_i386): Add k0-k7 registers and numeration in comments. (dwarf_regnames_x86_64): Add xmm16-31 and k0-k7 registers to dwarf table. gas/ 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> Sergey Lega <sergey.s.lega@intel.com> Anna Tikhonova <anna.tikhonova@intel.com> Ilya Tocar <ilya.tocar@intel.com> Andrey Turetskiy <andrey.turetskiy@intel.com> Ilya Verbin <ilya.verbin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * config/tc-i386-intel.c (O_zmmword_ptr): New. (i386_types): Add zmmword. (i386_intel_simplify_register): Allow regzmm. (i386_intel_simplify): Handle zmmwords. (i386_intel_operand): Handle RC/SAE, vector operations and zmmwords. * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New. (struct RC_Operation): New. (struct Mask_Operation): New. (struct Broadcast_Operation): New. (vex_prefix): Size of bytes increased to 4 to support EVEX encoding. (enum i386_error): Add new error codes: unsupported_broadcast, broadcast_not_on_src_operand, broadcast_needed, unsupported_masking, mask_not_on_destination, no_default_mask, unsupported_rc_sae, rc_sae_operand_not_last_imm, invalid_register_operand, try_vector_disp8. (struct _i386_insn): Add new fields vrex, need_vrex, mask, rounding, broadcast, memshift. (struct RC_name): New. (RC_NamesTable): New. (evexlig): New. (evexwig): New. (extra_symbol_chars): Add '{'. (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF. (i386_operand_type): Add regzmm, regmask and vec_disp8. (match_mem_size): Handle zmmwords. (operand_type_match): Handle zmm-registers. (mode_from_disp_size): Handle vec_disp8. (fits_in_vec_disp8): New. (md_begin): Handle {} properly. (type_names): Add "rZMM", "Mask reg" and "Vector d8". (build_vex_prefix): Handle vrex. (build_evex_prefix): New. (process_immext): Adjust to properly handle EVEX. (md_assemble): Add EVEX encoding support. (swap_2_operands): Correctly handle operands with masking, broadcasting or RC/SAE. (check_VecOperands): Support EVEX features. (VEX_check_operands): Properly handle 16 upper [xyz]mm registers. (match_template): Support regzmm and handle new error codes. (process_suffix): Handle zmmwords and zmm-registers. (check_byte_reg): Extend to zmm-registers. (process_operands): Extend to zmm-registers. (build_modrm_byte): Handle EVEX. (output_insn): Adjust to properly handle EVEX case. (disp_size): Handle vec_disp8. (output_disp): Support compressed disp8*N evex feature. (output_imm): Handle RC/SAE immediates properly. (check_VecOperations): New. (i386_immediate): Handle EVEX features. (i386_index_check): Handle zmmwords and zmm-registers. (RC_SAE_immediate): New. (i386_att_operand): Handle EVEX features. (parse_real_register): Add a check for ZMM/Mask registers. (OPTION_MEVEXLIG): New. (OPTION_MEVEXWIG): New. (md_longopts): Add mevexlig and mevexwig. (md_parse_option): Handle mevexlig and mevexwig options. (md_show_usage): Add description for mevexlig and mevexwig. * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd, avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig. gas/testsuite/ 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> Sergey Lega <sergey.s.lega@intel.com> Anna Tikhonova <anna.tikhonova@intel.com> Ilya Tocar <ilya.tocar@intel.com> Andrey Turetskiy <andrey.turetskiy@intel.com> Ilya Verbin <ilya.verbin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * gas/cfi/cfi-i386.s: Add tests for k0-k7. * gas/cfi/cfi-i386.d: Change to reflect above mentioned changes. * gas/cfi/cfi-x86_64.s: Add tests for xmm16-31, k0-7. * gas/cfi/cfi-x86_64.d: Change to reflect above mentioned changes. * gas/i386/ilp32/cfi/cfi-x86_64.d: Ditto. * gas/i386/intel-regs.s: Add tests for zmm0 and xmm16 registers. * gas/i386/intel-regs.d: Change correspondingly. * gas/i386/prefetch-intel.d: Reflect implementation of prefetchwt1. * gas/i386/prefetch.d: Ditto. * gas/i386/x86-64-prefetch-intel.d: Ditto. * gas/i386/x86-64-prefetch.d: Ditto. * gas/i386/avx512f-intel.d: New. * gas/i386/avx512f-nondef.d: New. * gas/i386/avx512f-nondef.s: New. * gas/i386/avx512f-opts-intel.d: New. * gas/i386/avx512f-opts.d: New. * gas/i386/avx512f-opts.s: New. * gas/i386/avx512f.d: New. * gas/i386/avx512f.s: New. * gas/i386/avx512cd-intel.d: New. * gas/i386/avx512cd.d: New. * gas/i386/avx512cd.s: New. * gas/i386/avx512er-intel.d: New. * gas/i386/avx512er.d: New. * gas/i386/avx512er.s: New. * gas/i386/avx512pf-intel.d: New. * gas/i386/avx512pf.d: New. * gas/i386/avx512pf.s: New. * gas/i386/evex-lig.s: New. * gas/i386/evex-lig256-intel.d: New. * gas/i386/evex-lig256.d: New. * gas/i386/evex-lig512-intel.d: New. * gas/i386/evex-lig512.d: New. * gas/i386/evex-wig.s: New. * gas/i386/evex-wig1-intel.d: New. * gas/i386/evex-wig1.d: New. * gas/i386/inval-avx512f.l: New. * gas/i386/inval-avx512f.s: New. * gas/i386/x86-64-avx512f-intel.d: New. * gas/i386/x86-64-avx512f-nondef.d: New. * gas/i386/x86-64-avx512f-nondef.s: New. * gas/i386/x86-64-avx512f-opts-intel.d: New. * gas/i386/x86-64-avx512f-opts.d: New. * gas/i386/x86-64-avx512f-opts.s: New. * gas/i386/x86-64-avx512f.d: New. * gas/i386/x86-64-avx512f.s: New. * gas/i386/x86-64-avx512cd-intel.d: New. * gas/i386/x86-64-avx512cd.d: New. * gas/i386/x86-64-avx512cd.s: New. * gas/i386/x86-64-avx512er-intel.d: New. * gas/i386/x86-64-avx512er.d: New. * gas/i386/x86-64-avx512er.s: New. * gas/i386/x86-64-avx512pf-intel.d: New. * gas/i386/x86-64-avx512pf.d: New. * gas/i386/x86-64-avx512pf.s: New. * gas/i386/x86-64-evex-lig.s: New. * gas/i386/x86-64-evex-lig256-intel.d: New. * gas/i386/x86-64-evex-lig256.d: New. * gas/i386/x86-64-evex-lig512-intel.d: New. * gas/i386/x86-64-evex-lig512.d: New. * gas/i386/x86-64-evex-wig.s: New. * gas/i386/x86-64-evex-wig1-intel.d: New. * gas/i386/x86-64-evex-wig1.d: New. * gas/i386/x86-64-inval-avx512f.l: New. * gas/i386/x86-64-inval-avx512f.s: New. * gas/i386/i386.exp: Run new AVX-512 tests. opcodes/ 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com> Alexander Ivchenko <alexander.ivchenko@intel.com> Maxim Kuznetsov <maxim.kuznetsov@intel.com> Sergey Lega <sergey.s.lega@intel.com> Anna Tikhonova <anna.tikhonova@intel.com> Ilya Tocar <ilya.tocar@intel.com> Andrey Turetskiy <andrey.turetskiy@intel.com> Ilya Verbin <ilya.verbin@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * i386-dis-evex.h: New. * i386-dis.c (OP_Rounding): New. (VPCMP_Fixup): New. (OP_Mask): New. (Rdq): New. (XMxmmq): New. (EXdScalarS): New. (EXymm): New. (EXEvexHalfBcstXmmq): New. (EXxmm_mdq): New. (EXEvexXGscat): New. (EXEvexXNoBcst): New. (VPCMP): New. (EXxEVexR): New. (EXxEVexS): New. (XMask): New. (MaskG): New. (MaskE): New. (MaskR): New. (MaskVex): New. (modes enum): Add evex_x_gscat_mode, evex_x_nobcst_mode, evex_half_bcst_xmmq_mode, xmm_mdq_mode, ymm_mode, evex_rounding_mode, evex_sae_mode, mask_mode. (USE_EVEX_TABLE): New. (EVEX_TABLE): New. (EVEX enum): New. (REG enum): Add REG_EVEX_0F72, REG_EVEX_0F73, REG_EVEX_0F38C6, REG_EVEX_0F38C7. (MOD enum): Add MOD_EVEX_0F10_PREFIX_1, MOD_EVEX_0F10_PREFIX_3, MOD_EVEX_0F11_PREFIX_1, MOD_EVEX_0F11_PREFIX_3, MOD_EVEX_0F12_PREFIX_0, MOD_EVEX_0F16_PREFIX_0, MOD_EVEX_0F38C6_REG_1, MOD_EVEX_0F38C6_REG_2, MOD_EVEX_0F38C6_REG_5, MOD_EVEX_0F38C6_REG_6, MOD_EVEX_0F38C7_REG_1, MOD_EVEX_0F38C7_REG_2, MOD_EVEX_0F38C7_REG_5, MOD_EVEX_0F38C7_REG_6. (PREFIX enum): Add PREFIX_VEX_0F41, PREFIX_VEX_0F42, PREFIX_VEX_0F44, PREFIX_VEX_0F45, PREFIX_VEX_0F46, PREFIX_VEX_0F47, PREFIX_VEX_0F4B, PREFIX_VEX_0F90, PREFIX_VEX_0F91, PREFIX_VEX_0F92, PREFIX_VEX_0F93, PREFIX_VEX_0F98, PREFIX_VEX_0F3A30, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3AF0, PREFIX_EVEX_0F10, PREFIX_EVEX_0F11, PREFIX_EVEX_0F12, PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15, PREFIX_EVEX_0F16, PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29, PREFIX_EVEX_0F2A, PREFIX_EVEX_0F2B, PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D, PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F, PREFIX_EVEX_0F51, PREFIX_EVEX_0F58, PREFIX_EVEX_0F59, PREFIX_EVEX_0F5A, PREFIX_EVEX_0F5B, PREFIX_EVEX_0F5C, PREFIX_EVEX_0F5D, PREFIX_EVEX_0F5E, PREFIX_EVEX_0F5F, PREFIX_EVEX_0F62, PREFIX_EVEX_0F66, PREFIX_EVEX_0F6A, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D, PREFIX_EVEX_0F6E, PREFIX_EVEX_0F6F, PREFIX_EVEX_0F70, PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1, PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4, PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2, PREFIX_EVEX_0F73_REG_6, PREFIX_EVEX_0F76, PREFIX_EVEX_0F78, PREFIX_EVEX_0F79, PREFIX_EVEX_0F7A, PREFIX_EVEX_0F7B, PREFIX_EVEX_0F7E, PREFIX_EVEX_0F7F, PREFIX_EVEX_0FC2, PREFIX_EVEX_0FC6, PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4, PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF, PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE6 PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB, PREFIX_EVEX_0FEF, PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4, PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE, PREFIX_EVEX_0F380C, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3811, PREFIX_EVEX_0F3812, PREFIX_EVEX_0F3813, PREFIX_EVEX_0F3814, PREFIX_EVEX_0F3815, PREFIX_EVEX_0F3816, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B, PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F3821, PREFIX_EVEX_0F3822, PREFIX_EVEX_0F3823, PREFIX_EVEX_0F3824, PREFIX_EVEX_0F3825, PREFIX_EVEX_0F3827, PREFIX_EVEX_0F3828, PREFIX_EVEX_0F3829, PREFIX_EVEX_0F382A, PREFIX_EVEX_0F382C, PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3831, PREFIX_EVEX_0F3832, PREFIX_EVEX_0F3833, PREFIX_EVEX_0F3834, PREFIX_EVEX_0F3835, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837, PREFIX_EVEX_0F3839, PREFIX_EVEX_0F383A, PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F, PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843, PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846, PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D, PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B, PREFIX_EVEX_0F3864, PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A, PREFIX_EVEX_0F388B, PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892, PREFIX_EVEX_0F3893, PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898, PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389A, PREFIX_EVEX_0F389B, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D, PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1, PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38A6, PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB, PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE, PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7, PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA, PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD, PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38C4, PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6, PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2, PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6, PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB, PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00, PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A05, PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A, PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18, PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B, PREFIX_EVEX_0F3A1D, PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A23, PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27, PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A, PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55. (VEX_LEN enum): Add VEX_LEN_0F41_P_0, VEX_LEN_0F42_P_0, VEX_LEN_0F44_P_0, VEX_LEN_0F45_P_0, VEX_LEN_0F46_P_0, VEX_LEN_0F47_P_0, VEX_LEN_0F4B_P_2, VEX_LEN_0F90_P_0, VEX_LEN_0F91_P_0, VEX_LEN_0F92_P_0, VEX_LEN_0F93_P_0, VEX_LEN_0F98_P_0, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A32_P_2, VEX_W_0F41_P_0_LEN_1, VEX_W_0F42_P_0_LEN_1, VEX_W_0F44_P_0_LEN_0, VEX_W_0F45_P_0_LEN_1, VEX_W_0F46_P_0_LEN_1, VEX_W_0F47_P_0_LEN_1, VEX_W_0F4B_P_2_LEN_1, VEX_W_0F90_P_0_LEN_0, VEX_W_0F91_P_0_LEN_0, VEX_W_0F92_P_0_LEN_0, VEX_W_0F93_P_0_LEN_0, VEX_W_0F98_P_0_LEN_0, VEX_W_0F3A30_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0. (VEX_W enum): Add EVEX_W_0F10_P_0, EVEX_W_0F10_P_1_M_0, EVEX_W_0F10_P_1_M_1, EVEX_W_0F10_P_2, EVEX_W_0F10_P_3_M_0, EVEX_W_0F10_P_3_M_1, EVEX_W_0F11_P_0, EVEX_W_0F11_P_1_M_0, EVEX_W_0F11_P_1_M_1, EVEX_W_0F11_P_2, EVEX_W_0F11_P_3_M_0, EVEX_W_0F11_P_3_M_1, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_0_M_1, EVEX_W_0F12_P_1, EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_0_M_1, EVEX_W_0F16_P_1, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2A_P_1, EVEX_W_0F2A_P_3, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_1, EVEX_W_0F51_P_2, EVEX_W_0F51_P_3, EVEX_W_0F58_P_0, EVEX_W_0F58_P_1, EVEX_W_0F58_P_2, EVEX_W_0F58_P_3, EVEX_W_0F59_P_0, EVEX_W_0F59_P_1, EVEX_W_0F59_P_2, EVEX_W_0F59_P_3, EVEX_W_0F5A_P_0, EVEX_W_0F5A_P_1, EVEX_W_0F5A_P_2, EVEX_W_0F5A_P_3, EVEX_W_0F5B_P_0, EVEX_W_0F5B_P_1, EVEX_W_0F5B_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_1, EVEX_W_0F5C_P_2, EVEX_W_0F5C_P_3, EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_1, EVEX_W_0F5D_P_2, EVEX_W_0F5D_P_3, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_1, EVEX_W_0F5E_P_2, EVEX_W_0F5E_P_3, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_1, EVEX_W_0F5F_P_2, EVEX_W_0F5F_P_3, EVEX_W_0F62_P_2, EVEX_W_0F66_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0F6E_P_2, EVEX_W_0F6F_P_1, EVEX_W_0F6F_P_2, EVEX_W_0F70_P_2, EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2, EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2, EVEX_W_0F76_P_2, EVEX_W_0F78_P_0, EVEX_W_0F79_P_0, EVEX_W_0F7A_P_1, EVEX_W_0F7A_P_3, EVEX_W_0F7B_P_1, EVEX_W_0F7B_P_3, EVEX_W_0F7E_P_1, EVEX_W_0F7E_P_2, EVEX_W_0F7F_P_1, EVEX_W_0F7F_P_2, EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_1, EVEX_W_0FC2_P_2, EVEX_W_0FC2_P_3, EVEX_W_0FC6_P_0, EVEX_W_0FC6_P_2, EVEX_W_0FD2_P_2, EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE6_P_1, EVEX_W_0FE6_P_2, EVEX_W_0FE6_P_3, EVEX_W_0FE7_P_2, EVEX_W_0FF2_P_2, EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2, EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F380C_P_2, EVEX_W_0F380D_P_2, EVEX_W_0F3811_P_1, EVEX_W_0F3812_P_1, EVEX_W_0F3813_P_1, EVEX_W_0F3813_P_2, EVEX_W_0F3814_P_1, EVEX_W_0F3815_P_1, EVEX_W_0F3818_P_2, EVEX_W_0F3819_P_2, EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2, EVEX_W_0F3821_P_1, EVEX_W_0F3822_P_1, EVEX_W_0F3823_P_1, EVEX_W_0F3824_P_1, EVEX_W_0F3825_P_1, EVEX_W_0F3825_P_2, EVEX_W_0F3828_P_2, EVEX_W_0F3829_P_2, EVEX_W_0F382A_P_1, EVEX_W_0F382A_P_2, EVEX_W_0F3831_P_1, EVEX_W_0F3832_P_1, EVEX_W_0F3833_P_1, EVEX_W_0F3834_P_1, EVEX_W_0F3835_P_1, EVEX_W_0F3835_P_2, EVEX_W_0F3837_P_2, EVEX_W_0F383A_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3858_P_2, EVEX_W_0F3859_P_2, EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2, EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2, EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2, EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2, EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2, EVEX_W_0F3A04_P_2, EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2, EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2, EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2, EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2, EVEX_W_0F3A1B_P_2, EVEX_W_0F3A1D_P_2, EVEX_W_0F3A21_P_2, EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2, EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2, EVEX_W_0F3A3B_P_2, EVEX_W_0F3A43_P_2. (struct vex): Add fields evex, r, v, mask_register_specifier, zeroing, ll, b. (intel_names_xmm): Add upper 16 registers. (att_names_xmm): Ditto. (intel_names_ymm): Ditto. (att_names_ymm): Ditto. (names_zmm): New. (intel_names_zmm): Ditto. (att_names_zmm): Ditto. (names_mask): Ditto. (intel_names_mask): Ditto. (att_names_mask): Ditto. (names_rounding): Ditto. (names_broadcast): Ditto. (x86_64_table): Add escape to evex-table. (reg_table): Include reg_table evex-entries from i386-dis-evex.h. Fix prefetchwt1 instruction. (prefix_table): Add entries for new instructions. (vex_table): Ditto. (vex_len_table): Ditto. (vex_w_table): Ditto. (mod_table): Ditto. (get_valid_dis386): Properly handle new instructions. (print_insn): Handle zmm and mask registers, print mask operand. (intel_operand_size): Support EVEX, new modes and sizes. (OP_E_register): Handle new modes. (OP_E_memory): Ditto. (OP_G): Ditto. (OP_XMM): Ditto. (OP_EX): Ditto. (OP_VEX): Ditto. * i386-gen.c (cpu_flag_init): Update CPU_ANY_SSE_FLAGS and CPU_ANY_AVX_FLAGS. Add CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS. (cpu_flags): Add CpuAVX512F, CpuAVX512CD, CpuAVX512ER, CpuAVX512PF and CpuVREX. (operand_type_init): Add OPERAND_TYPE_REGZMM, OPERAND_TYPE_REGMASK and OPERAND_TYPE_VEC_DISP8. (opcode_modifiers): Add EVex, Masking, VecESize, Broadcast, StaticRounding, SAE, Disp8MemShift, NoDefMask. (operand_types): Add RegZMM, RegMask, Vec_Disp8, Zmmword. * i386-init.h: Regenerate. * i386-opc.h (CpuAVX512F): New. (CpuAVX512CD): New. (CpuAVX512ER): New. (CpuAVX512PF): New. (CpuVREX): New. (i386_cpu_flags): Add cpuavx512f, cpuavx512cd, cpuavx512er, cpuavx512pf and cpuvrex fields. (VecSIB): Add VecSIB512. (EVex): New. (Masking): New. (VecESize): New. (Broadcast): New. (StaticRounding): New. (SAE): New. (Disp8MemShift): New. (NoDefMask): New. (i386_opcode_modifier): Add evex, masking, vecesize, broadcast, staticrounding, sae, disp8memshift and nodefmask. (RegZMM): New. (Zmmword): Ditto. (Vec_Disp8): Ditto. (i386_operand_type): Add regzmm, regmask, zmmword and vec_disp8 fields. (RegVRex): New. * i386-opc.tbl: Add AVX512 instructions. * i386-reg.tbl: Add 16 upper XMM and YMM registers, 32 new ZMM registers, mask registers. * i386-tbl.h: Regenerate. | |||||
| 2013-07-25 | Support Intel SHA | H.J. Lu | 1 | -0/+2 | |
| gas/ 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com> * config/tc-i386.c (cpu_arch): Add .sha. * doc/c-i386.texi: Document sha/.sha. gas/testsuite/ 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com> * gas/i386/sha.d: New. * gas/i386/sha.s: New. * gas/i386/x86-64-sha.d: New. * gas/i386/x86-64-sha.s: New. * gas/i386/i386.exp: Run new SHA tests. opcodes/ 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com> * i386-dis.c (PREFIX enum): Add PREFIX_0F38C8, PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC, PREFIX_0F38CD, PREFIX_0F3ACC. (prefix_table): Updated. (three_byte_table): Likewise. * i386-gen.c (cpu_flag_init): Add CPU_SHA_FLAGS. (cpu_flags): Add CpuSHA. (i386_cpu_flags): Add cpusha. * i386-init.h: Regenerate. * i386-opc.h (CpuSHA): New. (CpuUnused): Restored. (i386_cpu_flags): Add cpusha. * i386-opc.tbl: Add SHA instructions. * i386-tbl.h: Regenerate. | |||||
| 2013-07-24 | Support Intel MPX | H.J. Lu | 1 | -1/+8 | |
| gas/ 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * config/tc-i386.c (BND_PREFIX): New. (struct _i386_insn): Add new field bnd_prefix. (add_bnd_prefix): New. (cpu_arch): Add MPX. (i386_operand_type): Add regbnd. (md_assemble): Handle BND prefixes. (parse_insn): Likewise. (output_branch): Likewise. (output_jump): Likewise. (build_modrm_byte): Handle regbnd. (OPTION_MADD_BND_PREFIX): New. (md_longopts): Add entry for 'madd-bnd-prefix'. (md_parse_option): Handle madd-bnd-prefix option. (md_show_usage): Add description for madd-bnd-prefix option. * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix. gas/testsuite/ 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * gas/i386/mpx-add-bnd-prefix.s: New. * gas/i386/mpx-add-bnd-prefix.d: New. * gas/i386/mpx-inval-1.l: New. * gas/i386/mpx-inval-1.s: New. * gas/i386/mpx.d: New. * gas/i386/mpx.s: New. * gas/i386/x86-64-mpx-add-bnd-prefix.d: New. * gas/i386/x86-64-mpx-add-bnd-prefix.s: New. * gas/i386/x86-64-mpx-addr32.d: New. * gas/i386/x86-64-mpx-addr32.s: New. * gas/i386/x86-64-mpx-inval-1.l: New. * gas/i386/x86-64-mpx-inval-1.s: New. * gas/i386/x86-64-mpx-inval-2.l: New. * gas/i386/x86-64-mpx-inval-2.s: New. * gas/i386/x86-64-mpx.d: New. * gas/i386/x86-64-mpx.s: New. * gas/i386/nops.d: Adjust to MPX changes. * gas/i386/nops.s: Likewise. * gas/i386/x86-64-nops.d: Likewise. * gas/i386/x86-64-nops.s: Likewise. * gas/i386/ilp32/x86-64-nops.d: Likewise. * gas/i386/i386.exp: Run new MPX tests. include/opcode/ 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * i386.h (BND_PREFIX_OPCODE): New. opcodes/ 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com> Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> * i386-dis.c (BND_Fixup): New. (Ebnd): New. (Ev_bnd): New. (Gbnd): New. (BND): New. (v_bnd_mode): New. (bnd_mode): New. (MOD enum): Add new entries. (PREFIX enum): Likewise. (dis tables): Replace XX with BND for near branch and call instructions. (prefix_table): Add new entries. (mod_table): Likewise. (names_bnd): New. (intel_names_bnd): New. (att_names_bnd): New. (BND_PREFIX): New. (prefix_name): Handle BND_PREFIX. (print_insn): Initialize names_bnd. (intel_operand_size): Handle new modes. (OP_E_register): Likewise. (OP_E_memory): Likewise. (OP_G): Likewise. * i386-gen.c (cpu_flag_init): Add CpuMPX. (cpu_flags): Add CpuMPX. (operand_type_init): Add RegBND. (opcode_modifiers): Add BNDPrefixOk. (operand_types): Add RegBND. * i386-init.h: Regenerate. * i386-opc.h (CpuMPX): New. (CpuUnused): Comment out. (i386_cpu_flags): Add cpumpx. (BNDPrefixOk): New. (i386_opcode_modifier): Add bndprefixok. (RegBND): New. (i386_operand_type): Add regbnd. * i386-opc.tbl: Add BNDPrefixOk to near jumps, calls and rets. Add MPX instructions and bnd prefix. * i386-reg.tbl: Add bnd0-bnd3 registers. * i386-tbl.h: Regenerate. | |||||
| 2013-07-19 | [AArch64, ILP32] Retire -milp32 and -mlp64; use -mabi=ilp32 and -mabi=lp64. | Yufeng Zhang | 2 | -0/+7 | |
| gas/ * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag. (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators. (aarch64_abi): New variable. (ilp32_p): Change to be a macro. (aarch64_opts): Remove the support for option -milp32 and -mlp64. (struct aarch64_option_abi_value_table): New struct. (aarch64_abis): New table. (aarch64_parse_abi): New function. (aarch64_long_opts): Add entry for -mabi=. * doc/as.texinfo (Target AArch64 options): Document -mabi. * doc/c-aarch64.texi: Likewise. gas/testsuite/ * gas/aarch64/ilp32-basic.d (#as): Update to use -mabi=ilp32 | |||||
| 2013-07-18 | * config/rx-defs.h: Add macros for RX100, RX200, RX600, and | Nick Clifton | 1 | -2/+8 | |
| RX610. * config/rx-parse.y: (rx_check_float_support): Add function to check floating point operation support for target RX100 and RX200. * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610. * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100, RX200, RX600, and RX610 | |||||
| 2013-07-18 | * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4. | Nick Clifton | 1 | -2/+2 | |
| * doc/c-avr.texi: Likewise. | |||||
| 2013-07-12 | include/elf/ | Maciej W. Rozycki | 2 | -0/+57 | |
| * mips.h (EF_MIPS_NAN2008): New macro. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle EF_MIPS_NAN2008. (_bfd_mips_elf_print_private_bfd_data): Likewise. binutils/ * readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008. gas/ * config/tc-mips.c (mips_flag_nan2008): New variable. (options): Add OPTION_NAN enum value. (md_longopts): Handle it. (md_parse_option): Likewise. (s_nan): New function. (mips_elf_final_processing): Handle EF_MIPS_NAN2008. (md_show_usage): Add -mnan. * doc/as.texinfo (Overview): Add -mnan. * doc/c-mips.texi (MIPS Opts): Document -mnan. (MIPS NaN Encodings): New node. Document .nan directive. (MIPS-Dependent): List the new node. gas/testsuite/ * gas/mips/nan-2008-1.d: New test. * gas/mips/nan-2008-2.d: New test. * gas/mips/nan-2008-3.d: New test. * gas/mips/nan-2008-4.d: New test. * gas/mips/nan-legacy-1.d: New test. * gas/mips/nan-legacy-2.d: New test. * gas/mips/nan-legacy-3.d: New test. * gas/mips/nan-legacy-4.d: New test. * gas/mips/nan-legacy-5.d: New test. * gas/mips/nan-error-1.l: New list test. * gas/mips/nan-error-2.l: New list test. * gas/mips/nan-2008-override.s: New test source. * gas/mips/nan-2008.s: New test source. * gas/mips/nan-legacy-override.s: New test source. * gas/mips/nan-legacy.s: New test source. * gas/mips/nan-error-1.s: New test source. * gas/mips/nan-error-2.s: New test source. * gas/mips/mips.exp: Run the new tests. ld/testsuite/ * ld-mips-elf/nan-2008.d: New test. * ld-mips-elf/nan-legacy.d: New test. * ld-mips-elf/nan-mixed-1.d: New test. * ld-mips-elf/nan-mixed-2.d: New test. * ld-mips-elf/nan-2008.s: New test source. * ld-mips-elf/nan-legacy.s: New test source. | |||||
| 2013-06-26 | * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names. | Maciej W. Rozycki | 2 | -16/+10 | |
| * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names. Replace @sc{mips16} with literal `MIPS16'. (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'. | |||||
| 2013-06-26 | gas/ | Richard Sandiford | 1 | -3/+3 | |
| * doc/c-mips.texi: Use ISA instead of @sc{isa}. | |||||
| 2013-06-25 | bfd/ | Maciej W. Rozycki | 2 | -0/+36 | |
| * elfxx-mips.h (_bfd_mips_elf_insn32): New prototype. * elfxx-mips.c (mips_elf_link_hash_table): Add insn32 member. (STUB_MOVE32_MICROMIPS, STUB_JALR32_MICROMIPS): New macros. (MICROMIPS_INSN32_FUNCTION_STUB_NORMAL_SIZE): Likewise. (MICROMIPS_INSN32_FUNCTION_STUB_BIG_SIZE): Likewise. (micromips_insn32_o32_exec_plt0_entry): New variable. (micromips_insn32_o32_exec_plt_entry): Likewise. (_bfd_mips_elf_adjust_dynamic_symbol): Handle insn32 mode. (mips_elf_estimate_stub_size): Likewise. (_bfd_mips_elf_size_dynamic_sections): Likewise. (_bfd_mips_elf_finish_dynamic_symbol): Likewise. (mips_finish_exec_plt): Likewise. (_bfd_mips_elf_relax_section): Likewise. (_bfd_mips_elf_insn32): New function. (_bfd_mips_elf_get_synthetic_symtab): Handle insn32 PLT. gas/ * config/tc-mips.c (mips_set_options): Add insn32 member. (mips_opts): Initialize it. (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode. (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values. (md_longopts): Add "minsn32" and "mno-insn32" options. (is_size_valid): Handle insn32 mode. (md_assemble): Pass instruction string down to macro. (brk_fmt): Add second dimension and insn32 mode initializers. (mfhl_fmt): Likewise. (BRK_FMT, MFHL_FMT): Handle insn32 mode. (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding. (macro_build_jalr, move_register): Handle insn32 mode. (macro_build_branch_rs): Likewise. (macro): Handle insn32 mode. <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases. (mips_ip): Handle insn32 mode. (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32. (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops. (mips_handle_align): Handle insn32 mode. (md_show_usage): Add -minsn32 and -mno-insn32. * doc/as.texinfo (Target MIPS options): Add -minsn32 and -mno-insn32 options. (-minsn32, -mno-insn32): New options. * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32 options. (MIPS assembly options): New node. Document .set insn32 and .set noinsn32. (MIPS-Dependent): List the new node. gas/testsuite/ * gas/mips/micromips-insn32.d: New test. * gas/mips/micromips-noinsn32.d: Likewise. * gas/mips/micromips.l: Rename to... * gas/mips/micromips-warn.l: ... this. * gas/mips/micromips.d: Update accordingly. * gas/mips/micromips-trap.d: Likewise. * gas/mips/micromips.l: New list test. * gas/mips/micromips.s: Add conditionals. * gas/mips/mips.exp: Run the new tests. include/opcode/ * mips.h: Add M_JRADDIUSP, M_JRC and M_MOVEP anonymous enum values. ld/ * emultempl/mipself.em (insn32): New variable. (mips_create_output_section_statements): Handle insn32 mode. (PARSE_AND_LIST_PROLOGUE): New macro. (PARSE_AND_LIST_LONGOPTS): Likewise. (PARSE_AND_LIST_OPTIONS): Likewise. * gen-doc.texi: Set MIPS. * ld.texinfo: Likewise. (Options specific to MIPS targets): New section. (ld and MIPS family): New node. (Top, Machine Dependent): List the new node. opcodes/ * micromips-opc.c (micromips_opcodes): Add "jraddiusp", "jrc" and "movep" macros. | |||||
| 2013-06-22 | * configure.ac (mips*-*-bsd*, mips*-*-ultrix*, mips*-*-osf*) | Richard Sandiford | 1 | -22/+10 | |
| (mips*-*-ecoff*, mips*-*-pe*, mips*-*-irix* [v4 and earlier]) (mips*-*-lnews*, mips*-*-riscos*): Add gas and ld to noconfigdirs. * configure: Regenerate. gas/ * NEWS: Note removal of ECOFF support. * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF. * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h. (MULTI_CFILES): Remove config/e-mipsecoff.c. * Makefile.in: Regenerate. * configure.in: Remove MIPS ECOFF references. (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff): Delete cases. (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*) (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into... (mips-*-*): ...this single case. (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect MIPS emulations to be e-mipself*. * configure: Regenerate. * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*) (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*) (mips-*-sysv*): Remove coff and ecoff cases. * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove. * ecoff.c: Remove reference to MIPS ECOFF. * config/e-mipsecoff.c, config/te-lnews.h: Delete files. * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete. (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases. (mips_hi_fixup): Tweak comment. (append_insn): Require a howto. (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code. gas/testsuite/ * gas/all/gas.exp: Remove reference to mips-ecoff. * gas/mips/branch-misc-1.d, gas/mips/branch-misc-2.d, gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic.d, gas/mips/branch-misc-2pic-64.d, gas/mips/branch-swap.d: Remove skips for mips-*-ecoff. ld/ * NEWS: Document the removal of MIPS ECOFF targets. * ld.texinfo (--gpsize=@var{value}): Use MIPS ELF rather than MIPS ECOFF as an example of a target that supports small data. * ldmain.c (g_switch_value): Likewise. * configure.tgt (mips*-*-pe, mips*-dec-ultrix*, mips*-dec-osf*) (mips*-sgi-irix* [v4 and earlier], mips*el-*-ecoff*, mips*-*-ecoff*) (mips*-*-bsd*, mips*-*-lnews*): Remove cases. * Makefile.am (ALL_EMULATION_SOURCES): Remove emipsbig.c, emipsbsd.c, emipsidt.c, emipsidtl.c, emipslit.c, emipslnews.c and emipspe.c. (emipsbig.c, emipsbsd.c, emipsidt.c, emipsidtl.c, emipslit.c) (emipslnews.c, emipspe.c): Delete rules. * Makefile.in: Regenerate. * emulparams/mipsbig.sh, emulparams/mipsbsd.sh, emulparams/mipsidt.sh, emulparams/mipsidtl.sh, emulparams/mipslit.sh, emulparams/mipslnews.sh, emulparams/mipspe.sh, emultempl/mipsecoff.em: Delete. * emultempl/m68kcoff.em: Update comment to say that MIPS ECOFF support has now been removed. * emultempl/pe.em: Remove TARGET_IS_mipspe checks. | |||||
| 2013-06-22 | gas/ | Richard Sandiford | 2 | -42/+42 | |
| * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout. Use "CPU" instead of "cpu". * doc/c-mips.texi: Likewise. (MIPS Opts): Rename to MIPS Options. (MIPS option stack): Rename to MIPS Option Stack. (MIPS ASE instruction generation overrides): Rename to MIPS ASE Instruction Generation Overrides (for now). (MIPS floating-point): Rename to MIPS Floating-Point. | |||||
| 2013-06-22 | gas/ | Richard Sandiford | 1 | -34/+117 | |
| * doc/c-mips.texi (MIPS Macros): New section. (MIPS Object): Replace with... (MIPS Small Data): ...this new section. | |||||
| 2013-06-22 | gas/ | Richard Sandiford | 1 | -38/+38 | |
| * doc/c-mips.texi (MIPS symbol sizes): Move section further up file. Capitalize name. Use @kindex instead of @cindex for .set entries. | |||||
| 2013-06-22 | gas/ | Richard Sandiford | 1 | -15/+0 | |
| * doc/c-mips.texi (MIPS Stabs): Remove section. | |||||
| 2013-06-10 | gas/ | Maciej W. Rozycki | 2 | -0/+27 | |
| * config/tc-mips.c (append_insn): Don't do branch relaxation for MIPS-3D instructions either. (md_convert_frag): Update the COPx branch mask accordingly. * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch option. * doc/as.texinfo (Overview): Add --relax-branch and --no-relax-branch. * doc/c-mips.texi (MIPS Opts): Document --relax-branch and --no-relax-branch. gas/testsuite/ * gas/mips/relax-bc1any.l: New test. * gas/mips/relax-bc1any.s: New test source. * gas/mips/mips.exp: Run the new test. | |||||
 |
index : riscv-gnu-toolchain/gdb.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |