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2010-01-062010-01-06 Quentin Neill <quentin.neill@amd.com>Sebastian Pop1-1/+2
gas/ * config/tc-i386.c (cpu_arch): Add amdfam15. (i386_align_code): Add PROCESSOR_AMDFAM15 cases. * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15. * doc/c-i386.texi: Add amdfam15. opcodes/ * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Add new amdfam15 test cases. * gas/i386/nops-1-amdfam15.d: New.
2009-12-282009-12-28 Daniel Gutson <dgutson@codesourcery.com>Daniel Gutson1-0/+16
* doc/c-arm.texi: Document NEON alignment specifiers.
2009-12-11Add -Wshadow to the gcc command line options used when compiling the binutils.Nick Clifton1-0/+3
Fix up all warnings generated by the addition of this switch.
2009-11-182009-11-18 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-2/+1
gas/ * config/tc-i386.c (cpu_arch): Remove cvt16. (md_show_usage): Same. * doc/c-i386.texi: Same. gas/testsuite/ * gas/i386/cvt16.d: Removed. * gas/i386/cvt16.s: Removed. * gas/i386/x86-64-cvt16.d: Removed. * gas/i386/x86-64-cvt16.s: Removed. * gas/i386/i386.exp: Remove cvt16 and x86-64-cvt16 tests. opcodes/ * i386-dis.c (VEX_LEN_XOP_08_A0): Removed. (VEX_LEN_XOP_08_A1): Removed. (xop_table): Remove entries for VEX_LEN_XOP_08_A0 and VEX_LEN_XOP_08_A1. (vex_len_table): Same. * i386-gen.c (CPU_CVT16_FLAGS): Removed. (cpu_flags): Remove field for CpuCVT16. * i386-opc.h (CpuCVT16): Removed. (i386_cpu_flags): Remove bitfield cpucvt16. (i386-opc.tbl): Remove CVT16 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated.
2009-11-182009-11-17 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-1/+4
Quentin Neill <quentin.neill@amd.com> gas/ * config/tc-i386.c (cpu_arch): Added .xop and .cvt16. (build_vex_prefix): Handle xop08. (md_assemble): Don't special case the constant 3 for insns using MODRM. (build_modrm_byte): Handle vex2sources. (md_show_usage): Add xop and cvt16. * doc/c-i386.texi: Document fma4, xop, and cvt16. gas/testsuite/ * gas/i386/i386.exp: Run xop and cvt16 in 32-bit mode. Run x86-64-xop and x86-64-cvt16 in 64-bit mode. * gas/i386/lwp.d: Update name of the testcase. * gas/i386/x86-64-xop.d: New. * gas/i386/x86-64-xop.s: New. * gas/i386/xop.d: New. * gas/i386/xop.s: New. * gas/i386/cvt16.d: New. * gas/i386/cvt16.s: New. opcodes/ * i386-dis.c (OP_Vex_2src_1): New. (OP_Vex_2src_2): New. (Vex_2src_1): New. (Vex_2src_2): New. (XOP_08): Added. (VEX_LEN_XOP_08_A0): Added. (VEX_LEN_XOP_08_A1): Added. (VEX_LEN_XOP_09_80): Added. (VEX_LEN_XOP_09_81): Added. (xop_table): Added an entry for XOP_08. Handle xop instructions. (vex_len_table): Added entries for VEX_LEN_XOP_08_A0, VEX_LEN_XOP_08_A1, VEX_LEN_XOP_09_80, VEX_LEN_XOP_09_81. (get_valid_dis386): Handle XOP_08. (OP_Vex_2src): New. * i386-gen.c (cpu_flag_init): Add CPU_XOP_FLAGS and CPU_CVT16_FLAGS. (cpu_flags): Add CpuXOP and CpuCVT16. (opcode_modifiers): Add XOP08, Vex2Sources. * i386-opc.h (CpuXOP): Added. (CpuCVT16): Added. (i386_cpu_flags): Add cpuxop and cpucvt16. (XOP08): Added. (Vex2Sources): Added. (i386_opcode_modifier): Add xop08, vex2sources. * i386-opc.tbl: Add entries for XOP and CVT16 instructions. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated.
2009-11-172009-11-17 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+1
Daniel Jacobowitz <dan@codesourcery.com> gas/ * doc/c-arm.texi: Document .arch armv7e-m. * config/tc-arm.c (arm_ext_v6_dsp, arm_ext_v7m): New. (insns): Put Thumb versions of v5TExP instructions into arm_ext_v5exp also. Move some Thumb variants from arm_ext_v6_notm to arm_ext_v6_dsp. (arm_archs): Add armv7e-m architecture. (aeabi_set_public_attributes): Handle -march=armv7e-m. gas/testsuite/ * gas/arm/attr-march-armv7em.d: New test. * gas/arm/arch7em-bad.d: New test. * gas/arm/arch7em-bad.l: New test. * gas/arm/arch7em.d: New test. * gas/arm/arch7em.s: New test. include/elf/ * arm.h (TAG_CPU_ARCH_V7E_M): Define. include/opcode/ * arm.h (ARM_EXT_V6_DSP): Define. (ARM_AEXT_V6T2, ARM_AEXT_NOTM): Include ARM_EXT_V6_DSP. (ARM_AEXT_V7EM, ARM_ARCH_V7EM): Define. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add v7E-M. bfd/ * elf32-arm.c (using_thumb_only, arch_has_arm_nop, arch_has_thumb2_nop): Handle TAG_CPU_ARCH_V7E_M. (tag_cpu_arch_combine): Ditto. Correct MAX_TAG_CPU_ARCH test.
2009-11-062009-11-06 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+2
* doc/c-i386.texi: Move .lwp.
2009-11-052009-11-05 Sebastian Pop <sebastian.pop@amd.com>Sebastian Pop1-1/+22
Quentin Neill <quentin.neill@amd.com> * gas/config/tc-i386.c (cpu_arch): Add CPU_LWP_FLAGS. (build_vex_prefix): Handle xop09 and xop0a. (build_modrm_byte): Handle vexlwp. (md_show_usage): Add lwp. * gas/doc/c-i386.texi (i386-LWP): New section. * gas/testsuite/gas/i386/i386.exp: Run x86-64-lwp in 64-bit mode, run lwp in 32-bit mode. * gas/testsuite/gas/i386/x86-64-lwp.d: New. * gas/testsuite/gas/i386/x86-64-lwp.s: New. * gas/testsuite/gas/i386/lwp.d: New. * gas/testsuite/gas/i386/lwp.s: New. * opcodes/i386-dis.c (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. (USE_XOP_8F_TABLE): New. (XOP_8F_TABLE): New. (REG_XOP_LWPCB): New. (REG_XOP_LWP): New. (XOP_09): New. (XOP_0A): New. (reg_table): Redirect REG_8F to XOP_8F_TABLE. Add entries for REG_XOP_LWPCB and REG_XOP_LWP. (xop_table): New. (get_valid_dis386): Handle USE_XOP_8F_TABLE. Use the offsets VEX_0F, VEX_0F38, and VEX_0F3A instead of their values to access to the vex_table. (OP_LWPCB_E): New. (OP_LWP_E): New. (OP_LWP_I): New. * opcodes/i386-gen.c (cpu_flag_init): Add CPU_LWP_FLAGS, CpuLWP. (cpu_flags): Add CpuLWP. (opcode_modifiers): Add VexLWP, XOP09, and XOP0A. * opcodes/i386-opc.h (CpuLWP): New. (i386_cpu_flags): Add bit cpulwp. (VexLWP): New. (XOP09): New. (XOP0A): New. (i386_opcode_modifier): Add vexlwp, xop09, and xop0a. * opcodes/i386-opc.tbl (llwpcb): Added. (lwpval): Added. (lwpins): Added.
2009-11-022009-11-02 Paul Brook <paul@codesourcery.com>Paul Brook1-5/+12
ld/testsuite/ * ld-arm/arm-elf.exp: Add new attr-merge-vfp tests. * ld-arm/attr-merge-vfp-1.d: New test. * ld-arm/attr-merge-vfp-1r.d: New test. * ld-arm/attr-merge-vfp-2.d: New test. * ld-arm/attr-merge-vfp-2r.d: New test. * ld-arm/attr-merge-vfp-3.d: New test. * ld-arm/attr-merge-vfp-3r.d: New test. * ld-arm/attr-merge-vfp-4.d: New test. * ld-arm/attr-merge-vfp-4r.d: New test. * ld-arm/attr-merge-vfp-5.d: New test. * ld-arm/attr-merge-vfp-5r.d: New test. * ld-arm/attr-merge-vfp-2.s: New test. * ld-arm/attr-merge-vfp-3.s: New test. * ld-arm/attr-merge-vfp-3-d16.s: New test. * ld-arm/attr-merge-vfp-4.s: New test. * ld-arm/attr-merge-vfp-4-d16.s: New test. gas/ * doc/c-arm.texi: Document new -mfpu options. * config/tc-arm.c (fpu_vfp_ext_v3xd, fpu_vfp_fp16, fpu_neon_ext_fma, fpu_vfp_ext_fma): New. (NEON_ENC_TAB): Add vfma, vfms, vfnma and vfnms. (do_vfp_nsyn_fma_fms, do_neon_fmac): New functions. (insns): Move double precision load/store. Split out double precision VFPv3 instrucitons. Add VFPv4 instructions. (arm_fpus): Add VFPv3-FP16, VFPv3xD and VFPv4 variants. (aeabi_set_public_attributes): Set VFPv4 variants gas/testsuite/ * gas/arm/attr-mfpu-vfpv4.d: New test. * gas/arm/attr-mfpu-vfpv4-d16.d: New test. * gas/arm/neon-fma-cov.d: New test. * gas/arm/neon-fma-cov.s: New test. * gas/arm/vfp-fma-inc.s: New test. * gas/arm/vfp-fma-arm.d: New test. * gas/arm/vfp-fma-arm.s: New test. * gas/arm/vfp-fma-thumb.d: New test. * gas/arm/vfp-fma-thumb.s: New test. * gas/arm/vfma1.d: New test. * gas/arm/vfma1.s: New test. * gas/arm/vfpv3xd.d: New test. * gas/arm/vfpv3xd.s: New test. include/opcode/ * arm.h (FPU_VFP_EXT_V3xD, FPU_VFP_EXT_FP16, FPU_NEON_EXT_FMA, FPU_VFP_EXT_FMA, FPU_VFP_V3xD, FPU_VFP_V4D16, FPU_VFP_V4): Define. (FPU_ARCH_VFP_V3D16_FP16, FPU_ARCH_VFP_V3_FP16, FPU_ARCH_VFP_V3xD, FPU_ARCH_VFP_V3xD_FP16, FPU_ARCH_VFP_V4, FPU_ARCH_VFP_V4D16, FPU_ARCH_NEON_VFP_V4): Define. binutils/ * readelf.c (arm_attr_tag_VFP_arch): Add VFPv4 and VFPv4-D16. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle VFPv4 attributes. opcodes/ * arm-dis.c (coprocessor_opcodes): Update to use new feature flags. Add VFPv4 instructions.
2009-10-292009-10-29 Paul Brook <paul@codesourcery.com>Paul Brook1-0/+1
gas/ * doc/c-arm.texi: Document ARM -mcpu=cortex-a5. * config/arm/tc-arm.c (arm_cpu_option_table): Add cortex-a5.
2009-10-29 * doc/as.texinfo (Set): Delete incorrect HPPA para.Alan Modra1-5/+0
2009-10-26 * doc/as.texinfo: Add mention of RX port and inclusion of RXNick Clifton1-0/+14
documentation.
2009-10-25 * doc/as.texinfo (Overview): Move -mfix7000/-mno-fix7000 toMaciej W. Rozycki2-3/+5
match the order elsewhere. Add -mfix-vr4120/-mno-fix-vr4120 and -mfix-vr4130/-mno-fix-vr4130. * doc/c-mips.texi (MIPS Opts): Correct -no-mfix-vr4120 to -mno-fix-vr4120 and -no-mfix-vr4130 to -mno-fix-vr4130.
2009-10-20gas/H.J. Lu1-0/+3
2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * doc/c-i386.texi: Mention movabs. gas/testsuite/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * gas/i386/immed64.d: Updated. * gas/i386/l1om.d: Likewise. * gas/i386/x86-64-disp-intel.d: Likewise. * gas/i386/x86-64-disp.d: Likewise. * gas/i386/x86_64.d: Likewise. opcodes/ 2009-10-20 H.J. Lu <hongjiu.lu@intel.com> PR gas/10775 * i386-dis.c: Document LB, LS and LV macros. (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction with the 64-bit displacement or immediate operand. (putop): Handle LB, LS and LV macros.
2009-10-192009-10-19 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-3/+0
* doc/c-i386.texi: Don't mention the 8 extra control registers for x86-64.
2009-10-162009-10-16 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+6
PR gas/10775 * doc/c-i386.texi: Mention the 8 extra control registers for x86-64. Mention .code64 directive.
2009-10-07 * doc/c-arm.texi (ARM Options): Correctly name the two mapcs options.Nathan Sidwell1-3/+5
2009-10-02gas/Peter Bergner1-0/+3
* config/tc-ppc.c (md_show_usage): Document -m476. * doc/c-ppc.texi (PowerPC-Opts): Document -m476. gas/testsuite/ * gas/ppc/476.s: New test. * gas/ppc/476.d: Likewise. * gas/ppc/ppc.exp: Run the 476 test. include/opcode/ * ppc.h (PPC_OPCODE_476): Define. opcodes/ * ppc-dis.c (ppc_opts): Add "476" entry. * ppc-opc.c (PPC476): Define. (powerpc_opcodes): Update mnemonics where required for 476.
2009-10-02 * dw2gencfi.c: Include dwarf2dbg.h.Jakub Jelinek1-0/+9
(DWARF2_FORMAT): Define if not defined. (dot_cfi_sections): New function. (cfi_pseudo_table): Handle .cfi_sections. (CFI_EMIT_eh_frame, CFI_EMIT_debug_frame): Define. (cfi_sections): New variable. (output_cie, output_fde, select_cie_for_fde): Add eh_frame argument, add supporting for outputting .debug_frame section. (cfi_change_reg_numbers): New function or macro. (cfi_finish): Only emit .eh_frame if cfi_sections & CFI_EMIT_eh_frame. Emit .debug_frame if cfi_sections & CFI_EMIT_debug_frame. * config/tc-ppc.h (md_reg_eh_frame_to_debug_frame): Define. * doc/as.texinfo (CFI directives): Document .cfi_sections.
2009-10-01gas/Peter Bergner1-1/+1
* config/tc-ppc.c (md_show_usage): Rename "ppca2" to "a2". * doc/c-ppc.texi (PowerPC-Opts): Likewise. gas/testsuite/ * gas/ppc/a2.d: Rename "ppca2" to "a2". include/opcode/ * ppc.h (PPC_OPCODE_A2): Rename from PPC_OPCODE_PPCA2. opcodes/ * ppc-opc.c (PPCA2): Use renamed mask PPC_OPCODE_A2. * ppc-dis.c (ppc_opts): Likewise. Rename "ppca2" to "a2".
2009-09-29bfdNick Clifton5-0/+155
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
2009-09-252009-09-25 Nick Hudson <nick.hudson@gmx.co.uk>Nick Hudson1-2/+2
* doc/c-mips.texi: Fix the singlefloat and doublefloat kindex entries.
2009-09-21gas/Ben Elliston1-0/+3
* config/tc-ppc.c (md_show_usage): Document -mpcca2. * doc/c-ppc.texi (PowerPC-Opts): Document -mppca2. gas/testsuite/ * gas/ppc/a2.s: New. * gas/ppc/a2.d: Likewise. * gas/ppc/ppc.exp: Run the a2 dump test. include/opcode/ * ppc.h (PPC_OPCODE_PPCA2): New. opcodes/ * ppc-dis.c (ppc_opts): Add "ppca2" entry. * ppc-opc.c (powerpc_opcodes): Add eratilx, eratsx, eratsx., eratre, wchkall, eratwe, ldawx., mdfcrx., mfdcr. mtdcrx., icswx, icswx., mtdcr., dci, wclrone, wclrall, wclr, erativax, tlbsrx., ici mnemonics. (ERAT_T): New operand. (XWC_MASK): New mask. (XOPL2): New macro. (PPCA2): Define.
2009-09-079-09-07 Daniel Gutson <dgutson@codesourcery.com>Daniel Gutson1-0/+1
* config/tc-arm.c (arm_cpus): cortex-r4f CPU added. * doc/c-arm.texi: cortex-r4f CPU added.
2009-09-05 gas/Jie Zhang1-0/+4
* doc/as.texinfo: Document that Blackfin GAS does not accept SYMBOL = VALUE. ld/testsuite/ * ld-elf/sec64k.exp: Use ".set" instead of "=" for bfin-*-*.
2009-09-04 * doc/all.texi: Replace BFIN with Blackfin.Jie Zhang3-5/+9
* doc/as.texinfo: Likewise. * doc/c-bfin.texi: Likewise. * doc/asconfig.texi: Likewise. * doc/c-bfin.texi: Update -mcpu= option with bf512, bf514, bf516 and bf518.
2009-09-02update copyright datesAlan Modra26-27/+28
2009-08-22Cleanups after the update to Autoconf 2.64, Automake 1.11.Ralf Wildenhues2-68/+36
/: * README-maintainer-mode: Point directly to upstream locations for autoconf, automake, libtool, gettext, instead of copies on sources.redhat.com. Document required versions. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gdb/: * CONTRIBUTE: Bump documented Autoconf version. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gdb/doc/: * gdbint.texinfo (Releasing GDB): Point to README-maintainer-mode file for required autoconf version. * configure.ac: Do not substitute datarootdir, htmldir, pdfdir, docdir. Do not process --with-datarootdir, --with-htmldir, --with-pdfdir, --with-docdir. * configure: Regenerate. gprof/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (install-pdf-recursive, html__strip_dir, install-html) (install-html-am, install-html-recursive): Remove. * Makefile.in: Regenerate. opcodes/: * Makefile.am (install-pdf, install-html): Remove. * Makefile.in: Regenerate. gas/: * Makefile.am (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. * doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * doc/Makefile.in: Regenerate. ld/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (install-pdf-recursive, html__strip_dir, install-html) (install-html-am, install-html-recursive): Remove. * Makefile.in: Regenerate. binutils/: * Makefile.am (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. * doc/Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * doc/Makefile.in: Regenerate. bfd/: * Makefile.am (datarootdir, docdir, htmldor, pdfdir) (install-pdf, install-pdf-recursive, install-html) (install-html-recursive): Remove. * Makefile.in: Regenerate. bfd/doc/: * Makefile.am (pdf__strip_dir, install-pdf, install-pdf-am) (html__strip_dir, install-html, install-html-am): Remove. * Makefile.in: Regenerate.
2009-08-22Regenerate tree using Autoconf 2.64 and Automake 1.11.Ralf Wildenhues1-103/+191
config/: * override.m4 (_GCC_AUTOCONF_VERSION): Bump to 2.64. /: * configure: Regenerate. etc/: * configure: Regenerate. sim/common/: * config.in: Regenerate. * configure: Likewise. sim/iq2000/: * config.in: Regenerate. * configure: Likewise. sim/d10v/: * config.in: Regenerate. * configure: Likewise. sim/igen/: * config.in: Regenerate. * configure: Likewise. sim/m32r/: * config.in: Regenerate. * configure: Likewise. sim/frv/: * config.in: Regenerate. * configure: Likewise. sim/: * avr/config.in: Regenerate. * avr/configure: Likewise. * configure: Likewise. * cris/config.in: Likewise. * cris/configure: Likewise. sim/h8300/: * config.in: Regenerate. * configure: Likewise. sim/mn10300/: * config.in: Regenerate. * configure: Likewise. sim/ppc/: * config.in: Regenerate. * configure: Likewise. sim/erc32/: * config.in: Regenerate. * configure: Likewise. sim/arm/: * config.in: Regenerate. * configure: Likewise. sim/m68hc11/: * config.in: Regenerate. * configure: Likewise. sim/lm32/: * config.in: Regenerate. * configure: Likewise. sim/sh64/: * config.in: Regenerate. * configure: Likewise. sim/v850/: * config.in: Regenerate. * configure: Likewise. sim/cr16/: * config.in: Regenerate. * configure: Likewise. sim/moxie/: * config.in: Regenerate. * configure: Likewise. sim/m32c/: * config.in: Regenerate. * configure: Likewise. sim/mips/: * config.in: Regenerate. * configure: Likewise. sim/mcore/: * config.in: Regenerate. * configure: Likewise. sim/testsuite/d10v-elf/: * configure: Regenerate. sim/testsuite/: * configure: Regenerate. sim/testsuite/frv-elf/: * configure: Regenerate. sim/testsuite/m32r-elf/: * configure: Regenerate. sim/testsuite/mips64el-elf/: * configure: Regenerate. sim/sh/: * config.in: Regenerate. * configure: Likewise. gold/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * testsuite/Makefile.in: Likewise. gprof/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * configure: Likewise. * gconfig.in: Likewise. opcodes/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gas/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. ld/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. gdb/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. * gnulib/Makefile.in: Likewise. gdb/doc/: * configure: Regenerate. gdb/gdbserver/: * aclocal.m4: Regenerate. * config.in: Likewise. * configure: Likewise. gdb/testsuite/: * configure: Regenerate. * gdb.hp/configure: Likewise. * gdb.hp/gdb.aCC/configure: Likewise. * gdb.hp/gdb.base-hp/configure: Likewise. * gdb.hp/gdb.compat/configure: Likewise. * gdb.hp/gdb.defects/configure: Likewise. * gdb.hp/gdb.objdbg/configure: Likewise. * gdb.stabs/configure: Likewise. binutils/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. * doc/Makefile.in: Likewise. bfd/: * Makefile.in: Regenerate. * aclocal.m4: Likewise. * config.in: Likewise. * configure: Likewise. bfd/doc/: * Makefile.in: Regenerate. readline/: * configure: Regenerate. readline/examples/rlfe/: * configure: Regenerate.
2009-08-172009-08-17 Kai Tietz <kai.tietz@onevision.com>Kai Tietz1-1/+2
* config/obj-coff-seh.c: New file. * config/obj-coff-seh.h: Likewise. * config/obj-coff.c (obj-coff-seh.c): Add include. (coff_pseudo_table): Add new .seh... commands. * config/obj-coff.h (obj_coff_seh_do_final): Add new function prototype. (obj_coff_generate_pdata): New obj-coff hook. * gas/write.c (size_seg): Avoid sizing of already sized sections. (write_object_file): Call conditional hook objc_coff_generate_pdata. * Makefile.am: Add dependencies for new files. * Makefile.in: Regenerated.
2009-08-11 From Jie Zhang <jie.zhang@analog.com>Bernd Schmidt1-8/+54
* config/tc-bfin.h (bfin_anomaly_checks): Declare. (AC_05000074): Define. (ENABLE_AC_05000074): Define. * config/tc-bfin.c (enum bfin_cpu_type): New. (bfin_cpu_t): Typedef. (bfin_cpu_type): Define. (bfin_si_revision): Define. (bfin_anomaly_checks): Define. (struct bfin_cpu): New. (bfin_cpus[]): New. (struct bfin_cpu_isa): Define. (bfin_isa): New global variable. (OPTION_MCPU): Define. (md_longopts[]): Add -mcpu option. (md_parse_option): Deal with -mcpu option and initialize bfin_anomaly_checks. * doc/c-bfin.texi: Rename BFIN to Blackfin throughout. Document -mcpu option. * config/bfin-parse.y (gen_multi_instr_1): Check anomaly 05000074.
2009-08-07missed from last commitAlan Modra1-0/+74
2009-08-06 Add support for Xilinx MicroBlaze processor.Nick Clifton4-0/+14
* bfd/Makefile.am: Add cpu-microblaze.{lo,c}, elf32-microblaze.{lo,c}. * bfd/Makefile.in: Same. * bfd/archures.c: Add bfd_arch_microblaze. * bfd/bfd-in2.h: Regenerate. * bfd/config.bfd: Add microblaze target. * bfd/configure: Add bfd_elf32_microblaze_vec target. * bfd/configure.in: Same. * bfd/cpu-microblaze.c: New. * bfd/elf32-microblaze.c: New. * bfd/libbfd-in.h: Add prototype _bfd_dwarf2_fixup_section_debug_loc(). * bfd/libbfd.h: Regenerate. * bfd/reloc.c: Add MICROBLAZE relocations. * bfd/section.c: Add struct relax_table and relax_count to section. * bfd/targets.c: Add bfd_elf32_microblaze_vec. * binutils/MAINTAINERS: Add self as maintainer. * binutils/readelf.c: Include elf/microblaze.h, add EM_MICROBLAZE & EM_MICROBLAZE_OLD to guess_is_rela(), dump_relocations(), get_machine_name(). * config.sub: Add microblaze target. * configure: Same. * configure.ac: Same. * gas/Makefile.am: add microblaze to CPU_TYPES, config/tc-microblaze.c to TARGET_CPU_CFILES, config/tc-microblaze.h to TARGET_CPU_HFILES, add DEP_microblaze_elf target. * gas/Makefile.in: Same. * gas/config/tc-microblaze.c: Add MicroBlaze assembler. * gas/config/tc-microblaze.h: Add header for tc-microblaze.c. * gas/configure: Add microblaze target. * gas/configure.in: Same. * gas/configure.tgt: Same. * gas/doc/Makefile.am: Add c-microblaze.texi to CPU_DOCS. * gas/doc/Makefile.in: Same. * gas/doc/all.texi: Set MICROBLAZE. * gas/doc/as.texinfo: Add MicroBlaze doc links. * gas/doc/c-microblaze.texi: New MicroBlaze docs. * include/dis-asm.h: Decl print_insn_microblaze(). * include/elf/common.h: Define EM_MICROBLAZE & EM_MICROBLAZE_OLD. * include/elf/microblaze.h: New reloc definitions. * ld/Makefile.am: Add eelf32mb_linux.o, eelf32microblaze.o to ALL_EMULATIONS, targets. * ld/Makefile.in: Same. * ld/configure.tgt: Add microblaze*-linux*, microblaze* targets. * ld/emulparams/elf32mb_linux.sh: New. * ld/emulparams/elf32microblaze.sh. New. * ld/scripttempl/elfmicroblaze.sc: New. * opcodes/Makefile.am: Add microblaze-opc.h to HFILES, microblaze-dis.c to CFILES, microblaze-dis.lo to ALL_MACHINES, targets. * opcodes/Makefile.in: Same. * opcodes/configure: Add bfd_microblaze_arch target. * opcodes/configure.in: Same. * opcodes/disassemble.c: Define ARCH_microblaze, return print_insn_microblaze(). * opcodes/microblaze-dis.c: New MicroBlaze disassembler. * opcodes/microblaze-opc.h: New MicroBlaze opcode definitions. * opcodes/microblaze-opcm.h: New MicroBlaze opcode types.
2009-08-05/gas:Eric B. Weddington1-7/+8
2009-08-05 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Add attiny2313a, attiny4313, attiny261a, attiny861a, atmega644pa, attiny24a, attiny44a. * doc/c-avr.texi: Likewise.
2009-08-052009-08-04 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore1-0/+4
gas/ * doc/c-mips.texi (MIPS Opts): List 1004K options for -march. * config/tc-mips.c (mips_cpu_info_table): Add 1004K cores.
2009-08-02/gas:Eric B. Weddington1-3/+3
2009-08-02 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Add atmega8m1, atmega8c1, atmega16c1. * doc/c-avr.texi: Likewise.
2009-08-01/gas:Eric B. Weddington1-1/+2
2009-08-01 Eric B. Weddington <eric.weddington@atmel.com> * config/tc-avr.c (mcu_types): Add atmega8u2, atmega16u2, atmega32u2. * doc/c-avr.texi: Likewise.
2009-07-30 * doc/c-arm.texi (ARM-Instruction-Set): New node. Documents theNick Clifton1-0/+41
different syntaxes support by the ARM port. (ARM Directives): Add entry for .syntax.
2009-07-30 * doc/c-mips.texi (MIPS insn): Fix typo.Nick Clifton1-1/+1
2009-07-25bfd/H.J. Lu1-1/+2
2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * archures.c (bfd_architecture): Add bfd_arch_l1om. (bfd_l1om_arch): New. (bfd_archures_list): Add &bfd_l1om_arch. * bfd-in2.h: Regenerated. * config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec if bfd_elf64_x86_64_freebsd_vec is supported. (targ_selvecs): Likewise. * configure.in: Support bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. * configure: Regenerated. * cpu-l1om.c: New. * elf64-x86-64.c (elf64_l1om_elf_object_p): New. (bfd_elf64_l1om_vec): Likewise. (bfd_elf64_l1om_freebsd_vec): Likewise. * Makefile.am (ALL_MACHINES): Add cpu-l1om.lo. (ALL_MACHINES_CFILES): Add cpu-l1om.c. * Makefile.in: Regenerated. * targets.c (bfd_elf64_l1om_vec): New. (bfd_elf64_l1om_freebsd_vec): Likewise. (_bfd_target_vector): Add bfd_elf64_l1om_vec and bfd_elf64_l1om_freebsd_vec. binutils/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * readelf.c (guess_is_rela): Handle EM_L1OM. (dump_relocations): Likewise. (get_machine_name): Likewise. (get_section_type_name): Likewise. (get_elf_section_flags): Likewise. (get_symbol_index_type): Likewise. (is_32bit_abs_reloc): Likewise. (is_32bit_pcrel_reloc): Likewise. (is_64bit_abs_reloc): Likewise. (is_64bit_pcrel_reloc): Likewise. (is_none_reloc): Likewise. gas/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (cpu_arch): Add l1om. (check_cpu_arch_compatible): New. (set_cpu_arch): Use it. (i386_arch): New. (i386_mach): Return bfd_mach_l1om for Intel L1OM. (md_show_usage): Display l1om. (i386_target_format): Return ELF_TARGET_L1OM_FORMAT if cpu_arch_isa_flags.bitfield.cpul1om is set. * config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()). (i386_arch): New. (ELF_TARGET_L1OM_FORMAT): Likewise. * doc/c-i386.texi: Document l1om. gas/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/l1om.d: New. * gas/i386/l1om-inval.l: Likewise. * gas/i386/l1om-inval.s: Likewise. * gas/i386/i386.exp: Run l1om-inval and l1om. include/elf/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * common.h (EM_L1OM): New. ld/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64 is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported. (targ_extra_emuls): Likewise. * Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and eelf_l1om_fbsd.o (eelf_l1om.c): New. (eelf_l1om_fbsd.c): Likewise. * Makefile.in: Regenerated. * emulparams/elf_l1om.sh: New. * emulparams/elf_l1om_fbsd.sh: Likewise. ld/testsuite/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * ld-x86-64/abs-l1om.d: New. * ld-x86-64/protected2-l1om.d: Likewise. * ld-x86-64/protected3-l1om.d: Likewise. * ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and protected3-l1om. opcodes/ 2009-07-25 H.J. Lu <hongjiu.lu@intel.com> * configure.in: Handle bfd_l1om_arch. * disassemble.c (disassembler): Likewise. * configure: Regenerated. * i386-dis.c (print_insn): Handle bfd_mach_l1om and bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM. * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM. Add CPU_L1OM_FLAGS. (cpu_flags): Add CpuL1OM. (set_bitfield): Take an argument to set the value field. (process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY). (process_i386_opcode_modifier): Updated. (process_i386_operand_type): Likewise. * i386-init.h: Regenerated. * i386-tbl.h: Likewise. * i386-opc.h (CpuL1OM): New. (CpuXsave): Updated. (i386_cpu_flags): Add cpul1om.
2009-07-24gas/Jan Beulich1-0/+9
2009-07-24 Jan Beulich <jbeulich@novell.com> * tc-i386.c (cpu_arch): Add .8087, .287, .387, .no87, .nommx, .nosse, and .noavx. (cpu_flags_and_not): New. (set_cpu_arch): Check whether sub-architecture specified is a feature disable. (md_parse_option): Likewise. (parse_real_register): Don't return floating point register when x87 functionality is disabled. (md_show_usage): Add new sub-options. * doc/c-i386.texi: Update with new command line sub-options. gas/testsuite/ 2009-07-24 Jan Beulich <jbeulich@novell.com> * gas/i386/8087.[ds]: New. * gas/i386/287.[ds]: New. * gas/i386/387.[ds]: New. * gas/i386/no87.[ls]: New. * gas/i386/no87-2.[ls]: New. * gas/i386/i386.exp: Run new tests. * gas/i386/att-regs.s: Also check FPU register access. * gas/i386/intel-regs.s: Likewise. * gas/i386/att-regs.d: Adjust expectations. * gas/i386/intel-regs.d: Likewise. opcodes/ 2009-07-24 Jan Beulich <jbeulich@novell.com> * i386-dis.c (fgrps): Correct annotation for feni/fdisi. Add frstpm. * i386-gen.c (cpu_flag_init): Add FP enabling flags where needed. (cpu_flags): Add Cpu8087, Cpu287, Cpu387, Cpu687, and CpuFISTTP. (set_bitfield): Expand CpuFP to Cpu8087|Cpu287|Cpu387. * i386-opc.h (Cpu8087, Cpu287, Cpu387, Cpu687, CpuFISTTP): Define. (union i386_cpu_flags): Add cpu8087, cpu287, cpu387, cpu687, and cpufisttp. * i386-opc.tbl: Qualify floating point instructions by their respective CpuXXX flag. Fix fucom{,p,pp}, fprem1, fsin, fcos, and fsincos to be avilable only on 387. Fix fstsw ax to be available only on 287+. Add f{,n}eni, f{,n}disi, f{,n}setpm, and frstpm. * i386-init.h, i386-tbl.h: Regenerate.
2009-07-23 * config/obj-elf.c (obj_elf_type): Add code to support a type ofNick Clifton1-0/+5
gnu_unique_object. * doc/as.texinfo: Document new feature of .type directive. * NEWS: Mention support for gnu_unique_object symbol type. * common.h (STB_GNU_UNIQUE): Define. * NEWS: Mention the linker's support for symbols with a binding of STB_GNU_UNIQUE. * gas/elf/type.s: Add unique global symbol definition. * gas/elf/type.e: Add expected readelf output for global unique symbol. * elfcpp.h (enum STB): Add STB_GNU_UNIQUE. * readelf.c (get_symbol_binding): For Linux targeted files return UNIQUE for symbols with the STB_GNU_UNIQUE binding. * doc/binutils.texi: Document the meaning of the 'u' symbol binding in the output of nm and objdump --syms. * elf-bfd.h (struct elf_link_hash_entry): Add unique_global field. * elf.c (swap_out_syms): Set binding to STB_GNU_UNIQUE for symbols with the BSF_GNU_UNIQUE flag bit set. * elfcode.h (elf_slurp_symbol_table): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. * elflink.c (_bfd_elf_merge_symbol): Set unique_global for symbols with the STB_GNU_UNIQUE binding. (elf_link_add_object_symbols): Set the BSF_GNU_UNIQUE flag for symbols with STB_GNU_UNIQUE binding. Set STB_GNU_UNIQUE for symbols with the unique_global field set. (elf_link_output_extsym): Set unique_global field for symbols with the STB_GNU_UNIQUE binding. * syms.c (struct bfd_symbol): Define BSF_GNU_UNIQUE flag bit. (bfd_print_symbol_vandf): Print a 'u' character for BSF_GNU_UNIQUE symbols. (bfd_decode_symclass): Return a 'u' character for BSF_GNU_UNIQUE symbols. * bfd-in2.h: Regenerate.
2009-07-23 PR binutils/10379Nick Clifton1-0/+26
* doc/c-mips.texi (MIPS insn): Document the special behaviour of the .global directive for MIPS ports.
2009-07-15 * doc/c-arm.texi (mauto-it): Removed old option.Nick Clifton1-4/+17
(mimplicit-it): Added right option.
2009-07-09 * config/tc-arm.c (it_fsm_post_encode): New forward declaration.Nick Clifton1-0/+9
(set_it_insn_type_nonvoid): New macro. (emit_thumb32_expr): New function. (thumb_insn_size): New function. (emit_insn): New function. (s_arm_elf_inst): New function. (md_pseudo_table): New pseudo-opcode entries added. * doc/c-arm.texi: New directive added. * gas/arm/inst-po.d: New testcase. * gas/arm/inst-po.s: New file. * gas/arm/inst-po-2.d: New testcase. * gas/arm/inst-po-2.s: New file. * gas/arm/inst-po-2.l: New file. * gas/arm/inst-po-3.d: New testcase. * gas/arm/inst-po-3.s: New file. * gas/arm/inst-po-be.d: New testcase.
2009-07-01 PR 10168Nick Clifton1-1/+1
* config/tc-arm.c (do_t_pkhtb): Swap Rm and Rn when encoding as PKHBT. * gas/arm/thumb32.d: Fix expected disassembly of PKHTB insn.
2009-06-22 * config/tc-arm.c (implicit_it_mode): New enum.Nick Clifton1-0/+5
(implicit_it_mode): New global. (it_instruction_type): New enum. (arm_parse_it_mode): New function. (arm_long_opts): New option added. (arm_it): New field. (it_state): New enum. (now_it): New macro. (check_it_blocks_finished): New function. (insns[]): Use the IT Thumb opcodes for ARM too. (arm_cleanup): Call check_it_blocks_finished. (now_it_compatible): New function. (conditional_insn): New function. (set_it_insn_type): New macro. (set_it_insn_type_last): New macro. (do_it): Call automatic IT machinery functions. (do_t_add_sub): Likewise (do_t_arit3): Likewise. (do_t_arit3c): Likewise. (do_t_blx): Likewise. (do_t_branch): Likewise. (do_t_bkpt): Likewise. (do_t_branch23): Likewise. (do_t_bx): Likewise. (do_t_bxj): Likewise. (do_t_cps): Likewise. (do_t_cpsi): Likewise. (do_t_cbz): Likewise. (do_t_it): Likewise. (encode_thumb2_ldmstm): Likewise. (do_t_ldst): Likewise. (do_t_mov_cmp): Likewise. (do_t_mvn_tst): Likewise. (do_t_mul): Likewise. (do_t_neg): Likewise. (do_t_setend): Likewise. (do_t_shift): Likewise. (do_t_tb): Likewise. (output_it_inst): New function. (new_automatic_it_block): New function. (close_automatic_it_block): New function. (now_it_add_mask): New function. (it_fsm_pre_encode): New function. (handle_it_state): New function. (it_fsm_post_encode): New function. (force_automatic_it_block_close): New function. (in_it_block): New function. (md_assemble): Call automatic IT block machinery functions. (arm_frob_label): Likewise. (arm_opts): New element. * config/tc-arm.h (it_state): New enum. (current_it): New struct. (arm_segment_info_type): New member added. * doc/c-arm.texi: New option -mimplicit-it documented. * gas/arm/arm-it-auto.d: New test. * gas/arm/arm-it-auto.s: New file. * gas/arm/arm-it-auto-2.d: New test case. * gas/arm/arm-it-auto-2.s: New file. * gas/arm/arm-it-auto-3.d: New test case. * gas/arm/arm-it-auto-3.s: New file. * gas/arm/arm-it-bad.d: New test case. * gas/arm/arm-it-bad.l: New file. * gas/arm/arm-it-bad.s: New file. * gas/arm/arm-it-bad-2.d: New test case. * gas/arm/arm-it-bad-2.l: New file. * gas/arm/arm-it-bad-2.s: New file. * gas/arm/arm-it-bad-3.d: New test case. * gas/arm/arm-it-bad-3.l: New file. * gas/arm/arm-it-bad-3.s: New file. * gas/arm/thumb2_it_auto.d: New test. * gas/arm/thumb2_it_bad.l: Error message updated. * gas/arm/thumb2_it_bad_auto.d: New test. * gas/arm/thumb2_it.d: Comment added. * gas/arm/thumb2_it_bad.d: Comment added.
2009-06-20 PR 10302Alan Modra1-1/+4
* doc/as.texinfo (Section <ELF "M,S" flag>): Clarify tail merge.
2009-05-19==> bfd/ChangeLog <==Dave Korn1-9/+16
2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * cofflink.c (process_embedded_commands): Ignore "-aligncomm". ==> gas/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_common_parse): New function. (obj_coff_comm): Likewise. (coff_pseudo_table): Override default ".comm" definition on PE. * doc/as.texinfo: Document new feature. ==> gas/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * gas/pe/: New directory for PE format-specific tests. * gas/pe/aligncomm-a.d: New test pattern file. * gas/pe/aligncomm-a.s: New test source file. * gas/pe/aligncomm-b.d: New test pattern file. * gas/pe/aligncomm-b.s: New test source file. * gas/pe/aligncomm-c.d: New test pattern file. * gas/pe/aligncomm-c.s: New test source file. * gas/pe/aligncomm-d.d: New test pattern file. * gas/pe/aligncomm-d.s: New test source file. * gas/pe/pe.exp: New test control script. * lib/gas-defs.exp (is_pecoff_format): New function. ==> ld/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * NEWS: Mention new feature. * deffile.h (def_file_aligncomm): Add new struct definition. (def_file): Add new def_file_aligncomm member. * deffilep.y (%token): Add new ALIGNCOMM token. (command): Add production rule for ALIGNCOMM. (def_file_free): Free any chained def_file_aligncomm structs. (diropts[]): Add entry for '-aligncomm' .drectve command. (def_aligncomm): New grammar function. * ld.texinfo: Document new feature. * pe-dll.c (process_def_file): Rename from this ... (process_def_file_and_drectve): ... to this, updating all callers, and process any aligncomms chained to the def file after scanning all .drectve sections. (generate_edata): Updated to match. (pe_dll_build_sections): Likewise. ==> ld/testsuite/ChangeLog <== 2009-05-19 Dave Korn <dave.korn.cygwin@gmail.com> * ld-pe/aligncomm-1.c: New test source file. * ld-pe/aligncomm-2.c: Likewise. * ld-pe/aligncomm-3.c: Likewise. * ld-pe/aligncomm-4.c: Likewise. * ld-pe/aligncomm.d: New test pattern file. * ld-pe/direct.exp: Deleted, and content moved into ... * ld-pe/pe-run.exp: ... New common file for all PE run tests. * ld-pe/vers-script.exp: Deleted, and content merged into ... * ld-pe/pe-compile.exp: ... New common file for PE tests needing a compiler, adding aligned common tests. * ld-pe/pe.exp: Update header comment.
2009-05-172009-05-17 Kai Tietz <kai.tietz@onevision.com>Kai Tietz1-0/+2
* config/obj-coff.c (obj_coff_section): Add 'y' as specifier for SEC_COFF_NOREAD section flag. * doc/as.texinfo: Add documentation about .section flag 'y'.
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