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2020-06-03* gas/doc/c-riscv.texi (RISC-V-Options): Fix non-ASCII apostrophe.Stephen Casner1-1/+1
2020-06-02RISC-V: Fix minor bugs in .insn docs.Jim Wilson1-7/+6
2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard extensions...Nelson Chu1-0/+16
2020-05-06Section "3.1 Preprocessing" of the online GAS manual has a wrong reference to...Nick Clifton1-2/+3
2020-04-27x86: Add i386 PE big-object supportTamar Christina1-1/+2
2020-04-26Improve -mlfence-after-loadliuhongt1-4/+8
2020-04-22.symver fixesAlan Modra1-4/+3
2020-04-21gas: Extend .symver directiveH.J. Lu1-4/+12
2020-04-08x86: Correct -mlfence-before-indirect-branch= documentationH.J. Lu1-3/+3
2020-04-07gas/doc/c-z80.texi: Fix @xref warningsH.J. Lu1-5/+9
2020-04-07Add support for intel TSXLDTRK instructions$Cui,Lili1-1/+3
2020-04-02Add support for intel SERIALIZE instructionLiliCui1-0/+2
2020-03-20Add support for the xdef and xref pseudo-ops to the Z80 assembler.Sergey Belyashov1-27/+56
2020-03-11i386: Generate lfence with load/indirect branch/ret [CVE-2020-0551]H.J. Lu1-0/+43
2020-03-11Add support for generating DWARF-5 format directory and file name tables from...Nick Clifton1-1/+17
2020-03-06Add support for a ".file 0" directive if supporting DWARF 5 or higher.Nick Clifton1-1/+1
2020-03-06Add support for --dwarf-[3|4|5] to assembler command line.Nick Clifton1-1/+22
2020-03-04RISC-V: Support assembler modifier %got_pcrel_hi.Nelson Chu1-0/+17
2020-03-04RISC-V: Add description for RISC-V Modifiers to as doc.Nelson Chu1-1/+111
2020-03-04x86: support VMGEXITJan Beulich1-1/+2
2020-02-20RISC-V: Disable the CSR checking by default.Nelson Chu1-0/+13
2020-02-19RISC-V: Add description for -march-attr/-mno-arch-attr options in gas doc.Nelson Chu1-0/+14
2020-02-19Various fixes for the Z80 support.Sergey Belyashov2-98/+34
2020-02-17x86: Remove CpuABM and add CpuPOPCNTH.J. Lu1-5/+6
2020-02-16x86: Don't disable SSE4a when disabling SSE4H.J. Lu1-1/+3
2020-02-14Remove the old movsx and movzx documentation for AT&T syntaxH.J. Lu1-16/+0
2020-02-14x86: Document movsx/movsxd/movzx for AT&T syntaxH.J. Lu1-0/+53
2020-02-12x86-64: Intel64 adjustments for insns dealing with far pointersJan Beulich1-0/+12
2020-02-10[binutils][arm] arm support for ARMv8.m Custom Datapath ExtensionMatthew Malcomson1-0/+8
2020-02-10x86: Accept Intel64 only instruction by defaultH.J. Lu1-1/+2
2020-02-07Add support for the GBZ80 and Z80N variants of the Z80 architecture, and add ...Sergey Belyashov1-7/+15
2020-02-06ELF: Support the section flag 'o' in .section directiveH.J. Lu1-0/+27
2020-02-02ELF: Add support for unique section ID to assemblerH.J. Lu1-0/+12
2020-01-27x86-64: Properly encode and decode movsxdH.J. Lu1-0/+18
2020-01-21x86: improve handling of insns with ambiguous operand sizesJan Beulich1-0/+25
2020-01-17x86: Add {vex} pseudo prefixH.J. Lu1-2/+2
2020-01-14Fix various assembler testsuite failures for the Z80 target.Sergey Belyashov2-103/+121
2020-01-08Document the fact that the assembler's alignment pseudo-ops can be issued wit...Nick Clifton1-9/+12
2020-01-02Add support for the GBZ80, Z180, and eZ80 variants of the Z80 architecure. A...Sergey Belyashov2-33/+131
2020-01-01Update year range in copyright notice of binutils filesAlan Modra65-67/+67
2019-12-17Remove tic80 supportAlan Modra1-1/+1
2019-12-12i386: Add -mbranches-within-32B-boundariesH.J. Lu1-0/+11
2019-12-12i386: Align branches within a fixed boundaryH.J. Lu1-0/+26
2019-12-12gas: Add md_generic_table_relax_fragH.J. Lu1-0/+5
2019-11-18gas: Add --gdwarf-cie-version command line flagAndrew Burgess1-0/+6
2019-11-07[Patch][binutils][arm] Armv8.6-A Matrix Multiply extension [9/10]Matthew Malcomson1-0/+1
2019-11-07[binutils][aarch64] Matrix Multiply extension enablement [8/X]Matthew Malcomson1-0/+6
2019-11-07[binutils][arm] BFloat16 enablement [4/X]Matthew Malcomson1-0/+2
2019-11-07[binutils][aarch64] Bfloat16 enablement [2/X]Matthew Malcomson1-0/+2
2019-11-07[gas][aarch64] Armv8.6-a option [1/X]Matthew Malcomson1-1/+1
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