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2006-11-06 * doc/c-mips.texi (-march): Document sb1a.Thiemo Seufer1-1/+2
2006-05-23 [ gas/ChangeLog ]Thiemo Seufer1-16/+60
* config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS): Rename. (ISA_SUPPORTS_DSP_ASE, ISA_SUPPORTS_MT_ASE, ISA_HAS_64BIT_FPRS, ISA_HAS_MXHC1): New macros. (HAVE_32BIT_FPRS): Use ISA_HAS_64BIT_FPRS instead of ISA_HAS_64BIT_REGS. Formatting fixes. Improved comments. (mips_cpu_info): Change to use combined ASE/IS_ISA flag. (MIPS_CPU_IS_ISA, MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT, MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX): New defines. (mips_after_parse_args): Change default handling of float register size to account for 32bit code with 64bit FP. Better sanity checking of ISA/ASE/ABI option combinations. (s_mipsset): Support switching of GPR and FPR sizes via .set {g,f}p={32,64,default}. Better sanity checking for .set ASE options. (mips_elf_final_processing): We should record the use of 64bit FP registers in 32bit code but we don't, because ELF header flags are a scarce ressource. (mips_cpu_info_table): Add ASE flags for CPUs with mandatory ASE extensions. Add 4ksc, 4kec, 4kem, 4kep, 4ksd, m4kp, 24kec, 24kef, 24kex, 34kc, 34kf, 34kx, 25kf CPU definitions. (mips_cpu_info_from_isa): Use MIPS_CPU_IS_ISA. * doc/c-mips.texi: Document .set {g,f}p={32,64,default}. Document missing -march options. Document .set arch=CPU. Move .set smartmips to ASE page. Use @code for .set FOO examples. [ gas/testsuite/Changelog ] * gas/mips/mips-gp32-fp64-pic.d, mips/mips-gp32-fp64.d, gas/mips/mips-gp64-fp32-pic.d, gas/mips/mips-gp64-fp32.l, gas/mips/mips-gp64-fp64.d: Adjust test cases to the changes assembler output. * gas/mips/mips-gp32-fp64.l, gas/mips/mips-gp64-fp32-pic.l: New files, catch assembler warnings.
2006-05-08 [ gas/ChangeLog ]Thiemo Seufer1-0/+12
* config/tc-mips.c (mips_set_options): Add ase_smartmips flag. (mips_opts): Likewise. (file_ase_smartmips): New variable. (ISA_HAS_ROR): SmartMIPS implements rotate instructions. (macro_build): Handle SmartMIPS instructions. (mips_ip): Likewise. (md_longopts): Add argument handling for smartmips. (md_parse_options, mips_after_parse_args): Likewise. (s_mipsset): Add .set smartmips support. (md_show_usage): Document -msmartmips/-mno-smartmips. * doc/as.texinfo: Document -msmartmips/-mno-smartmips and .set smartmips. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] * gas/mips/smartmips.s, gas/mips/smartmips.d: New smartmips test. * gas/mips/mips.exp: Run smartmips test.
2005-09-08* doc/as.texinfo: Document -mdsp and -mno-dsp options.Chao-ying Fu1-0/+14
* doc/c-mips.texi: Likewise, and document ".set dsp" and ".set nodsp" directives.
2005-09-06* config/tc-mips.c (mips_set_options): Add ase_mt for MT instructions.Chao-ying Fu1-0/+14
(mips_opts): Add -1 to initialize ase_mt. (file_ase_mt): New variable for -mmt. (CPU_HAS_MT): New define. (validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand formats. (mips_ip): Check ase_mt to enable MT instructions. Handle !, $, *, &, +T, +t, g operand formats. For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow odd float registers. (OPTION_MT, OPTION_NO_MT): New define. (OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define. (md_parse_option): Parse OPTION_MT and OPTION_NO_MT. (mips_after_parse_args): Set ase_mt based on CPU. (s_mipsset): Handle ".set mt" and ".set nomt". (mips_elf_final_processing): Remind of adding new flag for MT ASE. (md_show_usage): Show usage of -mmt and -mno-mt. * doc/as.texinfo: Document -mmt and -mno-mt options. * doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt" directives.
2005-03-09 * config/tc-mips.c (MAX_VR4130_NOPS, MAX_DELAY_NOPS): New macros.Richard Sandiford1-0/+4
(MAX_NOPS): Bump to 4. (mips_fix_vr4130): New variable. (nops_for_vr4130): New function. (nops_for_insn): Use MAX_DELAY_NOPS rather than MAX_NOPS. Use nops_for_vr4130 if working around VR4130 errata. (OPTION_FIX_VR4130, OPTION_NO_FIX_VR4130): New macros. (md_longopts): Add -mfix-vr4130 and -mno-fix-vr4130. (md_parse_option): Handle them. (md_show_usage): Print them. * doc/c-mips.texi: Document -mfix-vr4130 and -mno-fix-vr4130.
2005-03-04 * config/tc-mips.c (mips_set_options): Add sym32 field.Richard Sandiford1-0/+63
(mips_opts): Initialize it. (HAVE_32BIT_ADDRESSES): Set to true if pointers are 32 bits wide. (HAVE_64BIT_ADDRESSES): Redefine as !HAVE_32BIT_ADDRESSES. (HAVE_32BIT_SYMBOLS, HAVE_64BIT_SYMBOLS): New macros. (load_address): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES when deciding whether to use a symbolic %highest/%higher expansion. (macro): Likewise. Remove o64/n32 linux hack. Always use ADDRESS_ADD*_INSN for address addition in the expansion of "dla" and "la". Handle constants separately from symbolic expressions in the "ld_st:" case, using 64-bit arithmetic if HAVE_64BIT_ADDRESSES and using load_register to load the high part of the address. (OPTION_MSYM32, OPTION_NO_MSYM32): New macros. (OPTION_ELF_BASE): Bump by 2. (md_longopts): Add entries for -msym32 and -mno-sym32. (md_parse_option): Handle them. (usage): Document them. (s_mipsset): Handle ".set sym32" and ".set nosym32". (s_cpload, s_cpsetup): Use HAVE_64BIT_SYMBOLS instead of HAVE_64BIT_ADDRESSES to detect 64-bit values of "_gp". * doc/c-mips.texi: Document ".set sym32", ".set nosym32", -msym32 and -mno-sym32.
2004-12-10 * config/tc-mips.c (mips_in_shared): New static variable.Ian Lance Taylor1-0/+10
(macro_build_lui): Permit "_gp" if !mips_in_shared. (md_longopts): Add -mshared and -mno-shared. (md_parse_option): Handle OPTION_MSHARED and OPTION_MNO_SHARED. (s_cpload): Implement !mips_in_shared case. (s_cpsetup): Likewise. * doc/c-mips.texi (MIPS Opts): Document -mno-shared. * NEWS: Mention -mno-shared.
2004-04-14 * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed fromRichard Sandiford1-5/+5
-{no-}mfix-vr4122-bugs. * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs. (append_insn, mips_emit_delays): Update accordingly. (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122. (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120. (md_parse_option): Update after above changes. (md_show_usage): Add -mfix-vr4120.
2004-01-09 * config/tc-mips.c (warn_nops): Remove static variable.Ian Lance Taylor1-5/+2
(macro): Remove test of warn_nops. (md_shortops): Remove 'n'. (md_parse_option): Remove 'n' case. (md_show_usage): Remove -n. * doc/as.texinfo (Overview): Remove MIPS -n option. * doc/c-mips.texi (MIPS Opts): Remove mention -n. * NEWS: Mention removal of MIPS -n option.
2003-09-30[ bfd/ChangeLog ]Chris Demetriou1-5/+9
2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-07-28 * config/tc-mips.c (mips_flag_pdr): Define.Rainer Orth1-1/+6
(md_begin) [OBJ_ELF]: Use it to control .pdr creation. (s_mips_end) [OBJ_ELF]: Likewise. (md_longopts) [OBJ_ELF]: Define OPTION_PDR, OPTION_NO_PDR. (md_parse_option) [OBJ_ELF]: Handle them. (md_show_usage) [OBJ_ELF]: Document -mpdr, -mno-pdr. * doc/c-mips.texi (MIPS Opts): Document -mpdr, -mno-pdr. * doc/as.texinfo (Overview) [MIPS]: Likewise.
2003-07-15 * doc/c-mips.texi: Document -march=rm9000.Richard Sandiford1-0/+1
2003-01-02[ gas/ChangeLog ]Chris Demetriou1-2/+2
2003-01-02 Chris Demetriou <cgd@broadcom.com> * config/tc-mips.c: Update copyright years to include 2003. (mips_ip): Fix indentation of "+A", "+B", and "+C" handling. Additionally, clean up their code slightly and clean up their comments some more. * doc/c-mips.texi: Add MIPS32r2 to ".set mipsN" documentation. [ gas/testsuite/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * gas/mips/elf_arch_mips32r2.d: Fix file description comment. [ include/opcode/ChangeLog ] 2003-01-02 Chris Demetriou <cgd@broadcom.com> * mips.h: Update copyright years to include 2002 (which had been missed previously) and 2003. Make comments about "+A", "+B", and "+C" operand types more descriptive.
2002-12-31[ bfd/ChangeLog ]Chris Demetriou1-2/+4
2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-09-30[gas/]Richard Sandiford1-0/+11
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181, vr5400 and vr5500. Add entry for -mfix-vr4122-bugs. * config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros. (hilo_interlocks): True for CPU_VR5500. (gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500. (mips_fix_vr4122_bugs): New. (append_insn): Work around 4122 errors if mips_fix_vr4122_bugs. (mips_emit_delays): Likewise. (macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR. [M_ROLI]: Likewise ror if CPU_HAS_ROR. (validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'. (OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options. (md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs. (OPTION_ELF_BASE): Bump. (md_parse_option): Handle the new options. (mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181, vr5400 and vr5500. [gas/testsuite/] * gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to... * gas/mips/vr4111.[sd]: ...this new test. * gas/mips/vr4120.[sd], * gas/mips/vr4122.[sd], * gas/mips/vr5400.[sd], * gas/mips/vr5500.[sd]: New tests. * mips.exp: Run them.
2002-07-25[gas/]Richard Sandiford1-6/+3
* doc/c-mips.texi: Remove -mcpu. Document -mabi. * configure.in (MIPS_CPU_STRING_DEFAULT): New configuration macro. (USE_E_MIPS_ABI_O32, MIPS_DEFAULT_64BIT): New configuration macros. * configure, config.in: Regenerate. * config/tc-mips.c (file_mips_abi): Rename to mips_abi. (mips_set_options): Remove "abi" field. (mips_opts): Update accordingly. Replace all uses of mips_opts.abi with mips_abi. (mips_cpu): Remove. (mips_arch_string, mips_arch_info): New vars. (mips_tune_string, mips_tune_info): New vars. (ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New macros. (HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): Don't check the ABI. (mips_isa_to_str, mips_cpu_to_str): Remove. (mips_ip): If the selected architecture is a generic ISA rather than a processor, only mention the ISA level in error messages. (OPTION_MCPU): Remove. (OPTION_FP64): New. (md_longopts): Add -mfp64, remove -mcpu. (mips_set_option_string): New fn. (md_parse_option): Make -mipsN update file_mips_isa rather than mips_opts.isa. Use mips_set_option_string to set -march or -mtune. Don't let -mgp32 and -mfp32 change the ABI. (show): Move to end of file. Constify string argument. (md_show_usage): Move to the end of the file. Read available architectures from mips_cpu_info_table. (mips_set_architecture): New fn. (mips_after_parse_args): Rework. Remove -mcpu handling. -mipsN is an alias for -march=mipsN. Don't change the ABI based on other flags. Infer the register size from the ABI as well as the architecture. Complain about more conflicting arguments. Unify logic with GCC. (s_mipsset): Don't change the ABI. (mips_elf_final_processing): Check USE_E_MIPS_ABI_O32. (mips_cpu_info_table): Remove Generic-MIPS* entries, keeping just "mipsN"-type entries. Remove entries that vary only in the manufacturer's prefix, or that have "000" replaced by "k". Remove TARGET_CPU entries. Make r2000 entry use CPU_R3000. (mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns. (mips_parse_cpu): New fn. (mips_cpu_info_from_name, mips_cpu_info_from_cpu): Remove. (mips_cpu_info_from_isa): Minor formatting tweak. [gas/testsuite] * gas/mips/mips-gp32-fp64.d, * gas/mips/mips-gp32-fp64-pic.d: Add -mfp64.
2002-05-31[ gas/ChangeLog ]Chris Demetriou1-0/+14
2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mdmx" member. (mips_opts): Initialize "ase_mdmx" member. (file_ase_mdmx): New variable. (CPU_HAS_MDMX): New macro. (md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx based on command line options and configuration defaults. (macro_build): Note in comment that use of MDMX in macros is not currently allowed. (validate_mips_insn): Add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set, and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand types. (OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option): Add support for "-mdmx" and "-no-mdmx" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mdmx" and ".set nomdmx". (mips_elf_final_processing): Set MDMX ASE ELF header flag if file_ase_mdmx was set. * doc/as.texinfo: Document -mdmx and -no-mdmx options. * doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set nomdmx" directives. [ gas/testsuite/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mdmx.s: New file. * gas/mips/mips64-mdmx.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mdmx" test. [ include/opcode/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> * mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL) (MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH) (MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC) (INSN_MDMX): New constants, for MDMX support. (opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX. [ opcodes/ChangeLog ] 2002-05-30 Chris G. Demetriou <cgd@broadcom.com> Ed Satterthwaite <ehs@broadcom.com> * mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y', and 'Z' formats, for MDMX. (mips_isa_type): Add MDMX instructions to the ISA bit mask for bfd_mach_mipsisa64. * mips-opc.c: Add support for MDMX instructions. (MX): New definition. * mips-dis.c: Update copyright years to include 2002.
2002-05-30 * config/tc-mips.c (OPTION_NO_M7000_HILO_FIX): Rename toThiemo Seufer1-1/+1
OPTION_MNO_7000_HILO_FIX. Add alternate "mno-fix7000" command line switch conforming to gcc conventions. * doc/c-mips.texi: Document -mno-fix7000 instead of no-mfix-7000.
2002-03-16Wrap overly long line in last patch.Andreas Jaeger1-1/+2
2002-03-16 * doc/c-mips.texi (Machine Dependencies): Add new node.Andreas Jaeger1-0/+1
2002-03-16[ gas/ChangeLog ]Chris Demetriou1-0/+19
2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * config/tc-mips.c (mips_set_options): New "ase_mips3d" member. (mips_opts): Initialize "ase_mips3d" member. (file_ase_mips3d): New variable. (CPU_HAS_MIPS3D): New macro. (md_begin): Initialize mips_opts.ase_mips3d and file_ase_mips3d based on command line options and configuration defaults. (macro_build, mips_ip): Accept MIPS-3D instructions if mips_opts.ase_mips3d is set. (OPTION_MIPS3D, OPTION_NO_MIPS3D, md_longopts, md_parse_option): Add support for "-mips3d" and "-no-mips3d" options. (OPTION_ELF_BASE): Move to accomodate new options. (s_mipsset): Support ".set mips3d" and ".set nomips3d". (mips_elf_final_processing): Add a comment indicating that a MIPS-3D ASE ELF header flag should be set, when one exists. * doc/as.texinfo: Document -mips3d and -no-mips3d options. * doc/c-mips.texi: Likewise, and document ".set mips3d" and ".set nomips3d" directives. [ gas/testsuite/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * gas/mips/mips64-mips3d.s: New file. * gas/mips/mips64-mips3d.d: Likewise. * gas/mips/mips.exp: Run new "mips64-mips3d" test. [ include/opcode/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips.h (INSN_MIPS3D): New definition used to mark MIPS-3D instructions. (OPCODE_IS_MEMBER): Adjust comments to indicate that ASE bit masks may be passed along with the ISA bitmask. [ opcodes/ChangeLog ] 2002-03-15 Chris G. Demetriou <cgd@broadcom.com> * mips-dis.c (mips_isa_type): Add MIPS3D instructions to the ISA bit masks for bfd_mach_mips_sb1 and bfd_mach_mipsisa64. Add comments for bfd_mach_mipsisa32 and bfd_mach_mipsisa64 that indicate that they should dissassemble all applicable MIPS-specified ASEs. * mips-opc.c: Add support for MIPS-3D instructions. (M3D): New definition. * mips-opc.c: Update copyright years.
2001-08-02 * doc/c-mips.tex (-mgp32, -mfp32): Added -mfp32, unified with -mgp32.Richard Sandiford1-7/+11
* config/tc-mips.c (mips_fp32, mips_32bit_abi): New static variables. (md_long_opts): Add -mfp32 option. (md_parse_option): Handle it. Set mips_32bit_abi given -mabi=32. (md_show_usage): Show usage for -mfp32 and -mgp32. (HAVE_32BIT_GPRS, HAVE_32BIT_FPRS): New macros. (HAVE_64BIT_GPRS, HAVE_64BIT_FPRS): New macros, inverse of the above. (HAVE_32BIT_ADDRESSES): New macro. (load_register): Use HAVE_32BIT_GPRS to determine the register width. (load_address): Use HAVE_32BIT_ADDRESSES to determine the address size. (s_cprestore, s_cpadd): Likewise. (macro): Use HAVE_32BIT_GPRS to determine the width of registers used in branch and M_LI_D macros. Use HAVE_64BIT_FPRS to determine the width registers used in M_LI_DD macros. Use HAVE_32BIT_ADDRESSES to determine the width of addresses in load, store and jump macros. (macro2): Use HAVE_32BIT_GPRS to determine the width of registers used in set instructions; do not check the address size for them. Use HAVE_32BIT_ADDRESSES to determine the width of addresses in unaligned load and store macros. (mips_ip): Use the new macros to check the width of a register when processing float constants. Force a constant into memory if it is destined for an FPR and the FPRs are wider than the GPRs. Warn about odd FPR numbers if HAVE_32BIT_FPRS. Use HAVE_32BIT_GPRS rather than mips_gp32 to select synthetic instructions. (macro_build): Use HAVE_32BIT_GPRS rather than mips_gp32 to select synthetic instructions.
2001-07-042001-07-04 Eric Christopher <echristo@redhat.com>Eric Christopher1-0/+1
* doc/c-mips.texi (MIPS Opts): Document 12000 as valid cpu. * config/tc-mips.c (mips_cpu_info_table): Add rm5200, rm5231, rm5261, and rm5721 as valid cpu strings. (md_show_usage): Add rm5200, rm5231, rm5261, rm5721.
2001-06-292001-06-28 Eric Christopher <echristo@redhat.com>Eric Christopher1-4/+14
H.J. Lu <hjl@gnu.org>         * config/tc-mips.c (mips_arch): New. Use mips_arch instead         of mips_cpu for the ISA selection.         (md_longopts): Add OPTION_MARCH and OPTION_MTUNE.         (md_parse_option): Handle OPTION_MARCH and OPTION_MTUNE. (mips_tune): New. Use mips_tune for scheduling and optimization issues. (append_insn): Use mips_tune and mips_arch. (macro_build): Ditto. (mips_ip): Ditto. (md_begin): Handle mips_arch, mips_tune and mips_cpu. For backwards compatability mips_cpu generates arch and tune. (md_show_usage): Document new behavior. * doc/c-mips.texi (MIPS Opts): Document -march and -mtune. Deprecate -mcpu. * NEWS: Update. 2001-06-28 Eric Christopher <echristo@redhat.com> * gas/mips/usd.d: Change for march/mtune. * gas/mips/ulh-xgot.d: Ditto. * gas/mips/uld.d: Ditto. * gas/mips/trunc.d: Ditto. * gas/mips/rol.d: Ditto. * gas/mips/nodelay.d: Ditto. * gas/mips/mul.d: Ditto. * gas/mips/mul-ilocks.d: Ditto. * gas/mips/trap20.d: Ditto. * gas/mips/mips4.d: Ditto. * gas/mips/mips16.d: Ditto. * gas/mips/lif-xgot.d: Ditto. * gas/mips/lif-svr4pic.d: Ditto. * gas/mips/ld-xgot.d: Ditto. * gas/mips/ld-svr4pic.d: Ditto. * gas/mips/ld-ilocks-addr32.d: Ditto. * gas/mips/lb-xgot.d: Ditto. * gas/mips/jal-xgot.d: Ditto. * gas/mips/jal-svr4pic.d: Ditto. * gas/mips/delay.d: Ditto. * gas/mips/lb-xgot-ilocks.d: Ditto. * gas/mips/div.d: Ditto. * gas/mips/break20.d: Ditto. * gas/mips/delay.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/lineno.d: Ditto. * gas/mips/mips16.d: Ditto. * gas/mips/mips4.d: Ditto. * gas/mips/mips4010.d: Ditto. * gas/mips/mips4650.d: Ditto.
2001-06-112001-06-11 H.J. Lu <hjl@gnu.org>H.J. Lu1-0/+4
* NEWS: Updated for the new -n option for the MIPS assembler. * config/tc-mips.c (md_show_usage): Add -n. * doc/as.texinfo: Document the new -n option. * doc/c-mips.texi: Likewise. * doc/as.1: Regenerated.
2001-03-08Fix copyright noticesNick Clifton1-1/+2
2000-12-12Fix formatting.Nick Clifton1-19/+17
2000-12-02Add MIPS SB1 machineNick Clifton1-1/+2
2000-12-02Add MIPS V and MIPS 64 machine numbersNick Clifton1-6/+13
2000-12-01Add MIPS32 as a seperate MIPS architectureNick Clifton1-9/+9
2000-09-14Add support for the MIPS32Nick Clifton1-0/+3
2000-07-15 * doc/c-mips.texi (MIPS Opts): Remove erroneous space afterIan Lance Taylor1-1/+1
@code.
2000-07-14Add new command line switch --no-construct-floatsNick Clifton1-0/+15
2000-06-16Add -mcpu=rmXXXX switch.Nick Clifton1-0/+6
2000-02-26 * doc/c-mips.texi (MIPS Opts): Fix typo in last patch.Jeff Law1-1/+1
2000-02-222000-02-22 Andrew Haley <aph@cygnus.com>Andrew Haley1-0/+13
* doc/c-mips.texi (MIPS Opts): Document -mgp32 and -mgp64.
2000-02-21 * config/tc-mips.c (MF_HILO_INSN): Define.Catherine Moore1-0/+5
(mips_7000_hilo_fix): Declare. (append_insn): Conditionally insert nops after an mfhi/mflo insn. (md_parse_option): Check for 7000_HILO_FIX options. (OPTION_M7000_HILO_FIX): Define. (OPTION_NO_M7000_HILO_FIX): Define. * doc/c-mips.texi (-mfix7000): Describe.
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+257