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AgeCommit message (Expand)AuthorFilesLines
2019-04-19RX Assembler: Ensure that the internal limit on the number of relaxation iter...Nick Clifton2-8/+22
2019-04-18Improve warning message for $0 constraint on MIPSR6 branchesMatthew Fortune1-1/+4
2019-04-18MSP430 Assembler: Define symbols for functions to run through.Jozef Lawrynowicz1-6/+38
2019-04-17MSP420 assembler: Add -m{u,U} options to enable/disable NOP warnings for unk...Jozef Lawrynowicz1-8/+37
2019-04-16Move fixup fx_bit_fixP and fx_im_disp fields to TC_FIX_TYPEAlan Modra5-36/+30
2019-04-16Make fixup fx_where unsignedAlan Modra4-6/+6
2019-04-16Make frag fr_fix unsignedAlan Modra7-13/+11
2019-04-15[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registersAndre Vieira1-4/+120
2019-04-15[binutils, ARM, 15/16] Add support for VSCCLRMAndre Vieira1-14/+103
2019-04-15[binutils, ARM, 13/16] Add support for CLRMAndre Vieira1-29/+85
2019-04-15[binutils, ARM, 12/16] Scalar Low Overhead loop instructions for Armv8.1-M Ma...Andre Vieira1-0/+113
2019-04-15[binutils, ARM, 11/16] New BFCSEL instruction for Armv8.1-M MainlineAndre Vieira1-0/+83
2019-04-15[binutils, ARM, 10/16] BFCSEL infrastructure with new global reloc R_ARM_THM_...Andre Vieira1-0/+35
2019-04-15[binutils, ARM, 9/16] New BFL instruction for Armv8.1-M MainlineAndre Vieira1-0/+21
2019-04-15[binutils, ARM, 8/16] BFL infrastructure with new global reloc R_ARM_THM_BF18Andre Vieira1-0/+35
2019-04-15[binutils, ARM, 7/16] New BFX and BFLX instruction for Armv8.1-M MainlineAndre Vieira1-0/+9
2019-04-15[binutils, ARM, 6/16] New BF instruction for Armv8.1-M MainlineAndre Vieira1-0/+61
2019-04-15[binutils, ARM, 5/16] BF insns infrastructure with new global reloc R_ARM_THM...Andre Vieira1-0/+35
2019-04-15[binutils, ARM, 4/16] BF insns infrastructure with array of relocs in struct ...Andre Vieira1-271/+304
2019-04-15[binutils, ARM, 3/16] BF insns infrastructure with new bfd_reloc_code_real fo...Andre Vieira1-0/+54
2019-04-15[GAS, ARM, 2/16] Add CLI extension support for Armv8.1-M MainlineAndre Vieira1-4/+16
2019-04-15[binutils, ARM, 1/16] Add support for Armv8.1-M Mainline CLIAndre Vieira1-45/+47
2019-04-13[MIPS] Add i6500 CPU and fix i6400 default ASEsMatthew Fortune1-1/+3
2019-04-13[MIPS] Apply ASE information for the selected processorMatthew Fortune1-7/+15
2019-04-12GAS: S12Z: Remove definition of macro TC_M68K.John Darrington1-3/+0
2019-04-12GAS: tc-s12z.c: int -> bfd_booleanJohn Darrington1-206/+206
2019-04-11xtensa: gas: clean up literal management codeMax Filippov1-60/+54
2019-04-11xtensa: gas: put .literal_position at section startMax Filippov1-13/+9
2019-04-11[BINUTILS, AArch64, 2/2] Update Store Allocation Tag instructionsSudakshina Das1-0/+2
2019-04-10Disable R_X86_64_PLT32 generation as branch marker on Solaris/x86Rainer Orth1-0/+6
2019-04-10te-cloudabi.hAlan Modra3-5/+32
2019-04-08x86: Define GNU_PROPERTY_X86_ISA_1_AVX512_BF16H.J. Lu1-0/+2
2019-04-05x86: Support Intel AVX512 BF16Xuepeng Guo1-0/+3
2019-04-03gas: use literals/const16 for xtensa loop relaxationMax Filippov2-142/+55
2019-04-01[GAS, Arm] CLI with architecture sensitive extensionsAndre Vieira1-38/+278
2019-03-21Teach a few targets to resolve BFD_RELOC_8Alan Modra3-27/+14
2019-03-19x86: Correct EVEX vector load/store optimizationH.J. Lu1-13/+30
2019-03-19x86: Correct EVEX to 128-bit EVEX optimizationH.J. Lu1-9/+2
2019-03-18Fix MRI mode testsuite failuresAlan Modra1-7/+4
2019-03-18x86: Optimize EVEX vector load/store instructionsH.J. Lu1-0/+50
2019-03-18x86: Encode 256-bit/512-bit VEX/EVEX insns with 128-bit VEXH.J. Lu1-11/+11
2019-03-17x86: Set optimize to INT_MAX for -OsH.J. Lu1-1/+12
2019-03-17x86: Correctly optimize EVEX to 128-bit VEX/EVEXH.J. Lu1-5/+13
2019-03-15Fix a potential illegal memory access whilt parsing an x86 insn.Li Hao1-32/+36
2019-02-24Re: PowerPC __tls_get_addr arg parsingAlan Modra1-0/+2
2019-02-24PR24144, pdp11-ld overwriting section data with zerosAlan Modra1-11/+21
2019-02-22[arm][gas] Add support for Neoverse N1Kyrylo Tkachov1-1/+3
2019-02-22[AArch64][gas] Add support for Neoverse E1Kyrylo Tkachov1-0/+5
2019-02-22[AArch64][gas] Add support for Neoverse N1Kyrylo Tkachov1-0/+5
2019-02-21PowerPC __tls_get_addr arg parsingAlan Modra1-40/+52
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