Age | Commit message (Collapse) | Author | Files | Lines |
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* obj-coffbfd.h: define WARN_SIGNED_OVERFLOW_WORD.
obj-coffbfd.c (fixup_segment): check for signed .word overflow if
WARN_SIGNED_OVERFLOW_WORD.
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* obj-coffbfd.c (fixup_segment): fixed missing parens in
expression checking for byte or word overflow.
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* tc-m68k.c (m68k_ip, m68k_ip_op, get_num, try_moto_index): merge
Motorola and MIT syntax; gas can now assemble either type of
file.
tc-m68kmote.c, tc-m68kmote.h: removed now superfluous files.
From Steve Chamberlain:
m68kcoff.mt: for m68k COFF.
obj-coffbfd.c: (fixup_mdeps) added
(size_section) removed bad sanity check
(fill_section) added rs_machine_dependent case
(write_object_file) call fixup_mdeps
(fixup_segment) set fx_subsy to 0.
obj-coffbfd.h: define WORKING_DOT_WORD (too hard to support) and
handle m68k.
tc-m68k.c, config/tc-m68k.h: added m68k COFF support and Motorala
pseudo ops.
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* obj-bout.h, obj-bout.c (obj_header_append, obj_symbol_to_chars),
tc-i960.c (md_ri_to_chars): Always output bout object file in
little endian byte order (used to use endianness of host).
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data, so that "bc" is available to 68040 cache instructions. Added
"tt0", "tt1", and 68ec030 variants.
(md_assemble): Complain if 68000 (only) and 68881 are specified.
(enum _register): Added TT0, TT1.
(m68k_ip, cases '3' and 't'): Handle new operand type codes. Pass
line number correctly in "internal error" messages. Don't print
architecture-mismatch message for operand errors.
From Colin Smith (colin@wrs.com):
* config/tc-m68k.c (m68k_ip, case '_'): Use addword twice rather than
install_operand.
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* tc-m68k.c: use TARGET_CPU to choose default cpu type.
* te-generic.h: default to LOCAL_LABELS_DOLLAR and LOCAL_LABELS_FB
so that we can assemble hand-written libgcc code.
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Wed Aug 19 11:20:59 1992 Ian Lance Taylor (ian@cygnus.com)
* tc-m68k.c, tc-m68kmote.c: the cas2 instruction is supposed to be
written with indirection on the last two operands, which can be
either data or address registers. Added a new operand type 'r'
which accepts either register type. Added '(' to notend stuff in
tc-m68kmote.c to accept (a0):(a2) in cas2 instruction.
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selected architecture, print a message saying so and listing what
processors support it, rather than saying "operands mismatch".
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if TN_SUN3; otherwise align to 2**N-byte bounary.
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two bytes of any constant with 0xff:
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the right way; for just the 68k. Sun 3 .align is nbytes, not ptwo.
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assembling for an older CPU than a 68020.
This bug was found at Adobe because GAS did not diagnose incorrect
68020 code generated by GCC when compiling for 68010. We had to debug it
in the target system as failing instructions.
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processor/opcode mismatch, so reword the error message.
(md_assemble): If no CPU has been set (even if FPU/PMMU
characteristics have been), default to 68020. Don't need extra
quotes around error string.
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* config/obj-bout.[ch] : maintain the a_relaxable file header info
* config/tc-i960.c: new option -linkrelax
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* read.c (potable): align should be nbytes, not ptwo!
* write.c (write_object_file): extra glue for new bss attributes
(relax_segment): SEG_BSS is ok now
* config/tc-m68k.c (m68k_ip_op): can now parse more @( modes
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* app.c (process_escape): new function to handle escapes the right
way, (do_scrub_next_char): use new function
* cond.c (s_ifdef): do ifdef/ifndef right
* read.c (s_fill): make the , expressions optional like the doc
says
* config/tc-h8300.[ch]: better warnings
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* tc-m68k.c (m68kip): Fix typo so that only arch's >=68020 do
pcrel data stuff. (md_estimate_size_before_relax): when relaxing a
68010 bxx into a bra+6 jmpxx, put the bytes of the jmp opcode into
the right place. (s_bss): Don't put .bss stuff into SEG_DATA, put
it into SEG_BSS
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* expr.c(expr): allow SEG_REGISTER in expressions.
* read.c(pseudo_set): register expressions can be the source of a
set.
* subsegs.c (subseg_new): Now -R forces all changes to SEG_DATA to
goto SEG_TEXT (if a.out)
* write.c (write_object_file): If a.out don't use the old way for
-R.
* config/obj-a.out (s_sect): complain if the user tries to use a
subsegment with a value which might interfere with out -R hackery.
* config/tc-m68k.c (m68k_reg_parse): lookup names in symbol table
rather than use ugly if tree. (init_regtable): insert register
names into symbol table.
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calc the base of relocs correctly.
* tc-a29k.c (parse_operand): allow expressions to be in any section.
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h8300.mt: configurey
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add a new enum to the class, with a value of 0.
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tc-m68k.h to te-sun3.h.
* te-sun3.h: add LOCAL_LABELS_DOLLAR.
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* as.c: fix typo recently introduced.
* as.h : Don't include aout/reloc.h - it's not right for COFF!
* expr.c: Much rewriting, to accomodate MRI syntax for
expressions. Also easier to read now.
* listing.c: Put back defuns
* read.c: modified to accept MRI syntax, put back listing pseudo
ops so that an assembler built with NO_LISTING ignores list ops
rather than pukes.
* write.c, write.h: fixs - only keep a reloc type in a fix if the target
machine is a SPARC or a 29K.
* config/obj-aout.c: added s_sect pseudo op
* config/obj-coffbfd.c: lints, set the filehdr flags right and
fill in the timestamp.
* config/obj-coffbfd.h: Since we don't include aout/reloc.h
anymore, define all the relocs which the tc-<x> bit will use so we
can translate from them to the coff types.
* config/tc-a29k.c: reloc_type isn't ane enum any more
* config/tc-m68k.c: Added NO_RELOC definition.
Now compiles for sparc aout, 68k aout (MRI and MIT syntax),
29k coff.
So far works as replacement for sparc and 68k /bin/as.
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