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2004-11-082004-11-08 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi2-2/+18
2004-11-08Add support fpr MAXQ processorNick Clifton3-0/+3362
2004-11-08Fix support for PECOFF weak symbolsNick Clifton3-56/+166
2004-11-05 * config/tc-xtensa.c (total_frag_text_expansion): New.Bob Wilson1-3/+16
2004-11-052004-11-05 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-351/+266
2004-11-04 * config/tc-xtensa.c: Remove XTENSA_SECTION_RENAME ifdefs.Bob Wilson2-81/+54
2004-11-04./Daniel Jacobowitz1-35/+11
2004-11-04 * configure.in (crisv32): Recognize. AC_DEFINE_UNQUOTEDHans-Peter Nilsson2-145/+1121
2004-11-04gas/Jan Beulich2-137/+413
2004-11-03 * symbols.c (colon) [!WORKING_DOT_WORD]: Don't declareHans-Peter Nilsson8-17/+14
2004-10-282004-10-28 Tomer Levi <Tomer.Levi@nsc.com>Tomer Levi1-0/+1
2004-10-27* config/tc-crx.c: Remove global variable 'post_inc_mode'.Tomer Levi1-265/+270
2004-10-252004-10-25 David Mosberger-Tang <davidm@hpl.hp.com>H.J. Lu1-1/+7
2004-10-252004-10-25 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-3/+6
2004-10-25Add ARM CFI supportNick Clifton2-1/+41
2004-10-251. Check unsigned immediate operands validity. 2. Update coprocessor id to be...Tomer Levi1-1/+16
2004-10-18 * config/tc-i386.c (O_secrel): Delete.Alan Modra2-2/+22
2004-10-18Accept and ignore @fptr() directives for 4-byte fixups.Nick Clifton1-3/+19
2004-10-12bfd ChangeLogBob Wilson2-249/+136
2004-10-12bfd ChangeLogBob Wilson5-2569/+1622
2004-10-122004-10-12 Paul Brook <paul@codesourcery.com>Paul Brook1-3/+3
2004-10-08bfd/Daniel Jacobowitz2-0/+15
2004-10-08m68k-parse.h (enum m68k_register): New control register, MBAR2 (for MCF5249)Nick Clifton2-1/+11
2004-10-08bfd ChangeLogBob Wilson5-2606/+7452
2004-10-07 * config/tc-mips.c (append_insn): Use fix_new rather than fix_new_expRichard Sandiford1-32/+31
2004-10-07 * config/tc-mips.c (append_insn): Set fx_tcbit for composite relocs.Richard Sandiford1-11/+16
2004-10-07Add error checking for Co-Processor instructionsTomer Levi1-1/+17
2004-10-07Add support for CRX co-processor opcodesNick Clifton1-2/+15
2004-10-05Add support for generating ARM unwind tables.Nick Clifton1-174/+1255
2004-10-042004-10-04 Eric Christopher <echristo@redhat.com>Eric Christopher1-1/+0
2004-10-022004-10-01 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu3-1/+40
2004-10-01The patch below adds binutils support for the SHT_ARM_EXIDX, as defined byNick Clifton2-0/+17
2004-10-01Fixes for the encoding and decoding of the PDP11's SOB instructionNick Clifton1-1/+2
2004-10-01(TARGET_FORMAT): Remove LynxOS COFF definition.Nick Clifton1-5/+1
2004-10-01 * config/tc-arc.c (tc_gen_reloc): Don't assume fixP->fx_addsy is anAlan Modra1-2/+3
2004-09-30(select_control_regs): Add mcf5249.Nick Clifton1-0/+1
2004-09-30Apply Paul Brook's patch to implement armv6k instructionsNick Clifton1-2/+87
2004-09-30Use ISO C90 semanticsNick Clifton1-3399/+2714
2004-09-30(mav_reg_required_here): Allow REG_TYPE_CN as alternative when REG_TYPE_MVF,Nick Clifton1-2/+20
2004-09-21Fix error in unwind info for psp relative offsets.Jim Wilson1-13/+19
2004-09-20Handle load/stor unique instructions before parsingTomer Levi1-8/+19
2004-09-17bfd/Paul Brook1-1/+67
2004-09-14 * config/tc-mmix.c [!LLONG_MIN]: Correct #elsif to #elif.Hans-Peter Nilsson1-3/+3
2004-09-13bfd/Paul Brook1-3/+3
2004-09-11 * gas/config/tc-avr.c: Add support forMarek Michalkiewicz1-1/+8
2004-09-08 * config/obj-elf.c (obj_elf_section_type): Handle init_array,Paul Brook2-6/+6
2004-09-03 * config.bfd (arm*-*-symbianelf*): Use OS-specific target vectors.Mark Mitchell2-0/+9
2004-09-03Add LD and GAS testsuites for CRX port.Nick Clifton1-65/+29
2004-09-01Argh! missing comma...Richard Earnshaw1-1/+1
2004-09-01* tc-arm.c (arm_cpus, arm_fpus): Allow <cpu>-s as well as <cpu>sRichard Earnshaw1-0/+6
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