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2004-03-052004-03-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+13
* config/tc-ia64.c (md_assemble): Properly handle NULL align_frag. (ia64_handle_align): Don't abort if failed to add a stop bit.
2004-03-032004-03-03 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-7/+24
* config/tc-ia64.c (dot_align): New. (ia64_do_align): Make it static. (md_pseudo_table): Use "dot_align" for "align". (ia64_md_do_align): Don't set align_frag here. (ia64_handle_align): Add a stop bit to the previous bundle if needed. * config/tc-ia64.h (ia64_do_align): Removed.
2004-03-032003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-15/+56
opcodes: * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions accordingly. bfd: * archures.c: Add bfd_mach_sh4_nommu_nofpu. * cpu-sh.c: Ditto. * elf32-sh.c: Ditto. * bfd-in2.h: Regenerate. include/elf: * sh.h: Add EF_SH4_NOMMU_NOFPU. gas: * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. (sh_elf_final_processing): Output BFD type sh4_nofpu if that is the most general type or the user specifically requested it. (md_assemble): Add a new error message for when an instruction is understood, but is not allowed due to an -isa option.
2004-03-032004-03-02 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-2/+35
* config/tc-ia64.c (align_frag): New. (md_assemble): Set the tc_frag_data field in align_frag for IA64_OPCODE_FIRST instructions. (ia64_md_do_align): Set align_frag. (ia64_handle_align): Add a stop bit if needed. * config/tc-ia64.h (TC_FRAG_TYPE): New. (TC_FRAG_INIT): New.
2004-03-01Add fr450 support.Richard Sandiford1-1/+51
2004-02-27Add -no-bitinst switch for M32R2Nick Clifton1-3/+11
2004-02-27Undo previous deltaNick Clifton1-6/+5
Fix underlying problem by changing the order of tests of rel->howto.
2004-02-27 * config/tc-s390.c (s390_insn): Correct range check for opcode inMartin Schwidefsky1-3/+9
.insn pseudo operation.
2004-02-27Fix seg fault on erroneous inputNick Clifton1-2/+4
2004-02-262004-02-26 Eric Christopher <echristo@redhat.com>Eric Christopher2-2/+14
* config/tc-mips.c (mips_dwarf2_addr_size): New. * config/tc-mips.h (DWARF2_ADDR_SIZE): Use.
2004-02-262004-02-23 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-0/+4
gas: * tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01 nibble types to assembler. opcodes: * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to ensure that double registers have even numbers. Add REG_N_B01 for nn01 (binary 01) nibble to ensure that reserved instruction 0xfffd does not decode the same as 0xfdfd (ftrv). * sh-opc.h: Add REG_N_D nibble type and use it whereever REG_N refers to a double register. Add REG_N_B01 nibble type and use it instead of REG_NM in ftrv. Adjust the bit patterns in a few comments.
2004-02-26Patch reviewed and approved by nickc@redhat.com.Fred Fish1-2/+2
2004-02-25 Fred Fish <fnf@redhat.com> * config/tc-iq2000.c: Add missing \n\ in multiline string literal.
2004-02-21Fix unwind info problems with .align.Jim Wilson2-13/+49
* config/tc-ia64.c (slot_index): New arg before_relax. Use instead of finalize_syms. (fixup_unw_records): New arg before_relax. Pass to slot_index. (ia64_estimate_size_before_relax): New. (ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment. (generate_unwind_image): Pass 1 to fixup_unw_records. * config/tc-ia64.h (ia64_estimate_size_before_relax): Declare. (md_estimate_size_before_relax): Call ia64_estimate_size_before_relax.
2004-02-19Yet another fix for -falign-loops problems.Jim Wilson1-4/+26
* config/tc-ia64.c (ia64_flush_insns): In addition to prologue, body, and endp, allow unwind records which do not have a "t" (time/instruction) field.
2004-02-18Apply fixes for Maverick CrunchNick Clifton1-18/+20
2004-02-11Patch from Steve Ellcey for ia64-hpux.Jim Wilson2-0/+23
* config/tc-ia64.h (ia64_frob_symbol): New declaration. (tc_frob_symbol): New macro definition. * config/tc-ia64.c (ia64_frob_symbol): New routine.
2004-02-09 * config/tc-arm.c (md_begin): Mark .note.gnu.arm.ident asDaniel Jacobowitz1-0/+3
read-only.
2004-02-07Fix unwind abort while compiling glibc, reported by HJ.Jim Wilson1-2/+4
* config/tc-ia64.c (dot_endp): Delete call to output_endp. (generate_unwind_image): Re-add it here.
2004-02-05Fix region length calculations when regions end with .align padding.Jim Wilson2-62/+29
* config/tc-ia64.c (output_endp): New. (count_bits): Delete. (ia64_flush_insns, process_one_record, optimize_unw_records): Handle endp unwind records. (fixup_unw_records): Handle endp unwind records. Delete code for shortening prologue regions not followed by a body record. (dot_endp): Call add_unwind_entry to emit endp unwind record. * config/tc-ia64.h (unw_record_type): Add endp.
2004-02-04Fix testcase from David Mosberger.Jim Wilson1-22/+54
* config/tc-ia64.c (ia64_convert_frag): Call md_number_to_chars to fill padding bytes with zeroes. (emit_one_bundle): New locals last_ptr, end_ptr. Rewrite code that sets unwind_record slot_number and slot_frag fields.
2004-02-02gas/Maciej W. Rozycki1-34/+37
* config/tc-mips.c (add_got_offset_hilo): New function. (macro): Use load_register() and add_got_offset_hilo() to load constants instead of hardcoding code sequences throughout. gas/testsuite/ * gas/mips/div.d: Update to accomodate changes in macro expansions. gas/mips/elf-rel-got-n32.d: Likewise. gas/mips/elf-rel-got-n64.d: Likewise. gas/mips/elf-rel-xgot-n32.d: Likewise. gas/mips/elf-rel-xgot-n64.d: Likewise. gas/mips/la-svr4pic.d: Likewise. gas/mips/la-xgot.d: Likewise. gas/mips/lca-svr4pic.d: Likewise. gas/mips/lca-xgot.d: Likewise.
2004-01-282004-01-28 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* config/tc-ia64.c (emit_one_bundle): Add proper indentation.
2004-01-26(EXTERN_FORCE_RELOC): Handle m68k-uclinux specially, like m68k-elf.Nick Clifton2-5/+8
(RELAXABLE_SYMBOL): Use EXTERN_FORCE_RELOC instead of hard-coded test for TARGET_OS=elf.
2004-01-252004-01-24 Chris Demetriou <cgd@broadcom.com>Chris Demetriou1-9/+24
* config/tc-mips.c (hilo_interlocks): Change definition so that MIPS32, MIPS64 and later ISAs are included, along with the already-included machines. Update comments.
2004-01-24 * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): Remove.Richard Sandiford1-5/+0
2004-01-23 * config/tc-arm.c (tc_gen_reloc): Improve error message forDaniel Jacobowitz1-0/+10
undefined local labels.
2004-01-23 * config/tc-mips.c (load_address, macro): Update comments aboutRichard Sandiford1-6/+9
NewABI GP relaxation.
2004-01-23 * config/tc-mips.c (macro_build): Remove place and counter arguments.Richard Sandiford1-998/+735
(mips_build_lui, macro_build_ldst_constoffset): Likewise. (mips16_macro_build, macro_build_jalr): Remove counter argument. (set_at, load_register, load_address, move_register): Likewise. (load_got_offset, add_got_offset): Likewise. Update all calls and tidy accordingly.
2004-01-23 * config/tc-mips.c (RELAX_ENCODE): Remove WARN argument.Richard Sandiford1-53/+138
(RELAX_FIRST, RELAX_SECOND): Turn into 8-bit quantities. (RELAX_USE_SECOND): Bump to 0x10000. (RELAX_SECOND_LONGER, RELAX_NOMACRO, RELAX_DELAY_SLOT): New flags. (mips_macro_warning): New variable. (md_assemble): Wrap macro expansion in macro_start() and macro_end(). (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Likewise. (relax_close_frag): Set mips_macro_warning.first_frag. Adjust use of RELAX_ENCODE. (append_insn): Update mips_macro_warning.sizes. (macro_start, macro_warning, macro_end): New functions. (macro_build): Don't emit warnings here. (macro_build_lui, md_estimate_size_before_relax): ...or here. (md_convert_frag): Check for cases where one macro alternative needs a warning and the other doesn't. Emit a warning if the longer sequence was chosen.
2004-01-23 * config/tc-mips.h (tc_frag_data_type, TC_FRAG_TYPE): Remove.Richard Sandiford1-685/+491
* config/tc-mips.c (RELAX_ENCODE): Take three arguments: the size of the first sequence, the size of the second sequence, and a flag that says whether we should warn. (RELAX_OLD, RELAX_NEW, RELAX_RELOC[123]): Delete. (RELAX_FIRST, RELAX_SECOND): New. (mips_relax): New variable. (relax_close_frag, relax_start, relax_switch, relax_end): New fns. (append_insn): Remove "place" argument. Use mips_relax.sequence rather than "place" to check whether we're expanding the second alternative of a relaxable macro. Remove redundant check for branch relaxation. If generating a normal insn, and there is not enough room in the current frag, call relax_close_frag() to close it. Update mips_relax.sizes[]. Emit fixups for the second version of a relaxable macro. Record the first relaxable fixup in mips_relax. Remove tc_gen_reloc workaround. (macro_build): Remove all uses of "place". Use mips_relax.sequence in the same way as in append_insn. (mips16_macro_build): Remove "place" argument. (macro_build_lui): As for macro_build. Don't drop the add_symbol when generating the second version of a relaxable macro. (load_got_offset, add_got_offset): New functions. (load_address, macro): Use new relaxation machinery. Remove tc_gen_reloc workarounds. (md_estimate_size_before_relax): Set RELAX_USE_SECOND if the second version of a relaxable macro is needed. Return -RELAX_SECOND if the first version is needed. (tc_gen_reloc): Remove relaxation handling. (md_convert_frag): Go through the fixups for a relaxable macro and mark those that belong to the unneeded alternative as done. If the second alternative is needed, adjust the fixup addresses to account for the deleted first alternative. testsuite/ * gas/mips/elf-rel19.[sd]: New test. * gas/mips/mips.exp: Run it.
2004-01-21 * config/tc-mips.c (append_insn): Don't do r3900 interlockThiemo Seufer1-5/+5
optimization for -mtune=r3900, as this will break on other CPUs.
2004-01-21Stop indexed move byte instructions from being relaxed.Nick Clifton1-9/+45
2004-01-18* config/tc-sparc.c (sparc_ip): Disallow %f32-%f63 for singleJakub Jelinek1-1/+7
precision operands.
2004-01-14gas/Maciej W. Rozycki1-19/+59
* config/tc-mips.c (append_insn): Properly detect variant frags that preclude swapping of relaxed branches. Correctly swap instructions between frags when dealing with relaxed branches. gas/testsuite/ * gas/mips/relax-swap1-mips1.d: New test for branch relaxation with swapping for MIPS1. * gas/mips/relax-swap1-mips2.d: New test for branch relaxation with swapping for MIPS2. * gas/mips/relax-swap1.l: Stderr output for the new tests. * gas/mips/relax-swap1.s: Source for the new tests. * gas/mips/relax-swap2.d: New test for branch likely relaxation with swapping. * gas/mips/relax-swap2.l: Stderr output for the new test. * gas/mips/relax-swap2.s: Source for the new test. * gas/mips/mips.exp: Run the new tests.
2004-01-12Add support for relaxation of bit manipulation instructions.Nick Clifton1-4/+18
2004-01-12gas/Richard Sandiford1-1/+1
* config/tc-mips.c (macro_build_jalr): When adding an R_MIPS_JALR reloc, reserve space for the delay slot as well as the jalr itself. gas/testsuite/ * gas/mips/elf-rel18.[sd]: New test. * gas/mips/mips.exp: Run it.
2004-01-09 * gas/config/tc-arm.c (do_vfp_reg2_from_sp2): Rename fromPaul Brook1-9/+34
do_vfp_sp_reg2. (do_vfp_sp2_from_reg2): New function. (insns): Use them. (do_vfp_dp_from_reg2): Check return values properly. * opcodes/arm-opc.h (arm_opcodes): Move generic mcrr after known specific opcodes. * gas/testsuite/gas/arm/vfp2.s, gas/arm/vfp2.d: New test. * gas/testsuite/gas/arm/arm.exp: Add them.
2004-01-09 * config/tc-mips.c (warn_nops): Remove static variable.Ian Lance Taylor1-21/+3
(macro): Remove test of warn_nops. (md_shortops): Remove 'n'. (md_parse_option): Remove 'n' case. (md_show_usage): Remove -n. * doc/as.texinfo (Overview): Remove MIPS -n option. * doc/c-mips.texi (MIPS Opts): Remove mention -n. * NEWS: Mention removal of MIPS -n option.
2004-01-09 * config/tc-mips.c (ISA_HAS_COPROC_DELAYS): Remove.Ian Lance Taylor1-79/+69
(cop_interlocks): Check ISA level. (cop_mem_interlocks): Define. (reg_needs_delay): Check cop_interlocks rather than ISA_HAS_COPROC_DELAYS. (append_insn): Likewise. Use cop_mem_interlocks rather than directly checking mips_opts.isa. (mips_emit_delays): Likewise.
2004-01-072004-01-07 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu2-105/+109
* config/tc-ia64.c (unwind): Move next_slot_number and next_slot_frag to ... (unw_rec_list): Here. (free_list_records): Removed. (output_unw_records): Likewise. (generate_unwind_image): Make it void. (alloc_record): Initialize next_slot_number and next_slot_frag. (slot_index): Take .org, .space and .align into account. (fixup_unw_records): Don't set slot_number to 0. Use list->next_slot_number and list->next_slot_frag instead of unwind.next_slot_number and unwind.next_slot_frag. (ia64_convert_frag): New. (generate_unwind_image): Generate a rs_machine_dependent frag for unwind record. (emit_one_bundle): Use list->next_slot_number and list->next_slot_frag instead of unwind.next_slot_number and unwind.next_slot_frag. * config/tc-ia64.h (md_convert_frag): Defined as ia64_convert_frag. (md_estimate_size_before_relax): Defined as (f)->fr_var.
2004-01-062003-12-19 Alexandre Oliva <aoliva@redhat.com>Alexandre Oliva2-5/+57
* config/tc-frv.h (md_apply_fix3): Don't define. * config/tc-frv.c (md_apply_fix3): New. Shift/truncate %hi/%lo operands. * config/tc-frv.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define. 2003-10-07 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (line_separator_chars): Add `!'. 2003-09-19 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (md_assemble): Clear insn upfront. 2003-09-18 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (OPTION_FDPIC): New macro. (md_longopts): Add mfdpic. (md_parse_option): Handle it. 2003-08-04 Alexandre Oliva <aoliva@redhat.com> * config/tc-frv.c (md_cgen_lookup_reloc) <FRV_OPERAND_D12, FRV_OPERAND_S12>: Use reloc type encoded in fix-up. (frv_pic_ptr): Parse funcdesc.
2003-12-29 * gas/config/tc-arm.c (arm_cpus): Add 926ejs and 1026ejs.Paul Brook1-0/+2
* gas/doc/c-arm.texi: Document them.
2003-12-23 * config/tc-arm.c (arm_archs): Add armv6.Paul Brook1-0/+1
2003-12-20(md_apply_fix3): Handle the case where a .byte directive generates aNick Clifton1-4/+13
pc-relative relocation.
2003-12-19Add support for m32r-linux target, including a RELA ABI and PIC.Nick Clifton2-10/+167
2003-12-18bfd/Richard Sandiford1-116/+32
* elf32-mips.c (elf_mips_howto_table_rel): Replace all uses of mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc. Use _bfd_mips_elf_hi16_reloc for R_MIPS_HI16 and R_MIPS_GNU_REL_HI16, _bfd_mips_elf_lo16_reloc for R_MIPS_LO16 and R_MIPS_GNU_REL_LO16, and _bfd_mips_elf_got16_reloc for R_MIPS_GOT16. Change rightshift to 16 for R_MIPS_HI16 and R_MIPS_GNU_REL_HI16. (mips_elf_generic_reloc, struct mips_hi16, mips_elf_hi16_reloc) (mips_elf_lo16_reloc, mips_elf_got16_reloc): Delete. (_bfd_mips_elf32_gprel16_reloc): Remove special case. (mips_elf_gprel32_reloc, mips32_64bit_reloc): Likewise. * elf64-mips.c (mips_elf64_howto_table_rel): Replace all uses of mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc. Use _bfd_mips_elf_hi16_reloc for R_MIPS_HI16, _bfd_mips_elf_lo16_reloc for R_MIPS_LO16 and _bfd_mips_elf_got16_reloc for R_MIPS_GOT16. Change R_MIPS_HI16's rightshift to 16. (mips_elf64_howto_table_rela): Replace all uses of mips_elf_generic_reloc with _bfd_mips_elf_generic_reloc. Use _bfd_mips_elf_generic_reloc for R_MIPS_GOT16 as well. (mips_elf64_hi16_reloc, mips_elf64_got16_reloc): Delete. (mips_elf64_shift6_reloc): Remove special case. Use _bfd_mips_elf_generic_reloc instead of returning bfd_reloc_continue. * elfn32-mips.c (prev_reloc_section): Delete. (prev_reloc_address, prev_reloc_addend): Delete. (elf_mips_howto_table_rel, elf_mips_howto_table_rela): As for elf64-mips.c (GET_RELOC_ADDEND, SET_RELOC_ADDEND): Delete. (mips_elf_generic_reloc, struct mips_hi16, mips_elf_hi16_reloc) (mips_elf_lo16_reloc, mips_elf_got16_reloc): Delete. (mips_elf_gprel16_reloc): Delete use of GET_RELOC_ADDEND. (mips_elf_literal_reloc, mips_elf_gprel32_reloc): Likewise. (mips16_jump_reloc, mips16_gprel_reloc): Likewise. (mips_elf_shift6_reloc): Likewise. Delete use of SET_RELOC_ADDEND. * elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Use _bfd_relocate_contents to install an in-place addend. (mips_hi16): New structure. (mips_hi16_list): Moved from elf32-mips.c. (_bfd_mips_elf_hi16_reloc, _bfd_mips_elf_got16_reloc): New functions. (_bfd_mips_elf_lo16_reloc, _bfd_mips_elf_generic_reloc): New functions. (mips_elf_calculate_relocation): Assume addend is unshifted. (_bfd_mips_elf_relocate_section): Don't apply the howto rightshift on top of the usual high-part shift. Don't shift the addend right before calling mips_elf_calculate_relocation. * elfxx-mips.h (_bfd_mips_elf_hi16_reloc): Declare. (_bfd_mips_elf_got16_reloc, _bfd_mips_elf_lo16_reloc): Declare. (_bfd_mips_elf_generic_reloc): Declare. gas/ * config/tc-mips.c (mips_need_elf_addend_fixup): Delete. (md_apply_fix3): Remove bfd_install_relocation workarounds. (tc_gen_reloc): Likewise. Factor handling of pc-relative relocations and treat fx_addnumber as relative to the relocation address. gas/testsuite/ * gas/mips/mips16-jalx.d: Use -mabi=o64. * gas/mips/mips16.d: Likewise. * gas/mips/elf-rel17.[sd]: New test. * gas/mips/mips.exp: Run it.
2003-12-18 * config/tc-mips.c (s_change_section): When parsing the MIPS-specificRichard Sandiford1-0/+16
.section syntax, map SHT_MIPS_DWARF to SHT_PROGBITS.
2003-12-18 * config/tc-arm.c (arm_archs): Change "armv6" to "armv6j".Mark Mitchell1-1/+1
* doc/c-arm.texi (ARM Options): Likewise.
2003-12-17Replace --error-explicit-parallel-conflicts with --ignore-parallel-conflitcs.Nick Clifton1-46/+44
Add test of parallel constraint checking.
2003-12-16Remove -8 bias on PC-relative load instructions for arm-wince-pe targetNick Clifton1-0/+4