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2014-03-03Fix various copyright issuesAlan Modra7-8/+7
binutils/ * README: Add "Copyright Notices" paragraph. gas/ * config/bfin-lex-wrapper.c: Correct copyright date. * config/tc-frv.c: Correct copyright punctuation. * config/tc-ip2k.c: Likewise. * config/tc-iq2000.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic4x.h: Likewise. ld/testsuite/ * ld-scripts/phdrs2.exp: Correct copyright punctuation. * ld-v850/v850.exp: Correct copyright typo. opcodes/ * i386-gen.c (process_copyright): Emit copyright notice on one line. gold/ * dwp.cc (print_version): Update copyright year to current.
2014-03-01 * config/tc-avr.c: Remove atxmega16x1.Denis Chertykov1-1/+0
2014-02-21Add support for CPUID PREFETCHWT1Ilya Tocar1-0/+2
Latest AVX512 spec http://download-software.intel.com/sites/default/files/managed/50/1a/319433-018.pdf Has CPUID PREFETCHWT1 for prefetchwt1 instruction, which we list as AVX512PF. This patch introduces CPUID PREFETCHWT1. gas/ * config/tc-i386.c (cpu_arch): Add .prefetchwt1. * doc/c-i386.texi: Document .prefetchwt1/prefetchwt1. opcodes/ * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/ (cpu_flags): Add CpuPREFETCHWT1. * i386-init.h: Regenerate. * i386-opc.h (CpuPREFETCHWT1): New. (i386_cpu_flags): Add cpuprefetchwt1. * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1. * i386-tbl.h: Regenerate. gas/testsuite * gas/i386/avx512pf-intel.d: Remove prefetchwt1. * gas/i386/avx512pf.s: Ditto. * gas/i386/avx512pf.d: Ditto. * gas/i386/x86-64-avx512pf-intel.d: Ditto. * gas/i386/x86-64-avx512pf.s: Ditto. * gas/i386/x86-64-avx512pf.d: Ditto. * gas/i386/prefetchwt1-intel.d: New file. * gas/i386/prefetchwt1.s: Ditto. * gas/i386/prefetchwt1.d: Ditto. * gas/i386/x86-64-prefetchwt1-intel.d: Ditto. * gas/i386/x86-64-prefetchwt1.s: Ditto. * gas/i386/x86-64-prefetchwt1.d: Ditto.
2014-02-12Add clflushopt, xsaves, xsavec, xrstorsIlya Tocar1-0/+6
gas/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * config/tc-i386.c (cpu_arch): Add .clflushopt, .xsavec, .xsaves. * doc/c-i386.texi: Document .xsavec/xsavec/.xsaves/xsaves/ clflushopt/.clfushopt. gas/testsuite/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * gas/i386/clflushopt-intel.d: New. * gas/i386/clflushopt.d: Ditto. * gas/i386/clflushopt.s: Ditto. * gas/i386/i386.exp: Run new tests. * gas/i386/x86-64-clflushopt-intel.d: New. * gas/i386/x86-64-clflushopt.d: Ditto. * gas/i386/x86-64-clflushopt.s: Ditto. * gas/i386/x86-64-xsavec-intel.d: Ditto. * gas/i386/x86-64-xsavec.d: Ditto. * gas/i386/x86-64-xsavec.s: Ditto. * gas/i386/x86-64-xsaves-intel.d: Ditto. * gas/i386/x86-64-xsaves.d: Ditto. * gas/i386/x86-64-xsaves.s: Ditto. * gas/i386/xsavec-intel.d: Ditto. * gas/i386/xsavec.d: Ditto. * gas/i386/xsavec.s: Ditto. * gas/i386/xsaves-intel.d: Ditto. * gas/i386/xsaves.d: Ditto. * gas/i386/xsaves.s: Ditto. opcodes/ 2014-02-12 Ilya Tocar <ilya.tocar@intel.com> * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4, MOD_0FC7_REG_5. (PREFIX enum): Add PREFIX_0FAE_REG_7. (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5. (prefix_table): Add clflusopt. (mod_table): Add xrstors, xsavec, xsaves. * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS, CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS. (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC. * i386-init.h: Regenerate. * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves, xsaves64, xsavec, xsavec64. * i386-tbl.h: Regenerate.
2014-02-03Nios II large-GOT relocationsSandra Loosemore1-4/+20
2014-02-03 Sandra Loosemore <sandra@codesourcery.com> include/elf/ * nios2.h (R_NIOS2_GOT_LO, R_NIOS2_GOT_HA): New. (R_NIOS2_CALL_LO, R_NIOS2_CALL_HA): New. (R_NIOS2_ILLEGAL): Adjust. gas/ * config/tc-nios2.c (md_apply_fix): Test for new relocs. (nios2_special_reloc): Add %call_lo, %call_hiadj, %got_lo, %got_hiadj relocation operators. Sort table and add comment to explain ordering. (nios2_fix_adjustable): Test for new relocs. * doc/c-nios2.texi (Nios II Relocations): Document new relocation operators. bfd/ * reloc.c (BFD_RELOC_NIOS2_GOT_LO, BFD_RELOC_NIOS2_GOT_HA): New. (BFD_RELOC_NIOS2_CALL_LO, BFD_RELOC_NIOS2_CALL_HA): New. * libbfd.h: Regenerated. * bfd-in2.h: Regenerated. * elf32-nios2.c (elf_nios2_howto_table_rel): Add new relocations. (nios2_reloc_map): Likewise. (GOT_USED, CALL_USED): Renamed from GOT16_USED and CALL16_USED. Fixed all references. (nios2_elf32_relocate_section): Add new relocations. (nios2_elf32_check_relocs): Likewise. (nios2_elf32_gc_sweep_hook): Likewise.
2014-01-30Nios II CALL26 linker relaxationSandra Loosemore1-2/+9
2014-01-30 Sandra Loosemore <sandra@codesourcery.com> bfd/ * bfd-in2.h: Update from reloc.c. * elf32-nios2.c: Include elf32-nios2.h. (elf_nios2_howto_table_rel): Add entry for R_NIOS2_CALL26_NOAT. (nios2_reloc_map): Likewise. (enum elf32_nios2_stub_type): Declare. (struct elf32_nios2_stub_hash_entry): Declare. (nios2_stub_hash_entry, nios2_stub_hash_lookup): New macros. (struct elf32_nios2_link_hash_entry): Add hsh_cache field. (struct elf32_nios2_link_hash_table): Add new fields bstab, stub_bfd, add_stub_section, layout_sections_again, stub_group, bfd_count, top_index, input_list, all_local_syms. (nios2_call26_stub_entry): New. (nios2_elf32_install_imm16): Move up in file. (nios2_elf32_install_data): Move up in file. (hiadj): Move up in file. (stub_hash_newfunc): New. (link_hash_newfunc): Initialize hsh_cache field. (STUB_SUFFIX): New. (nios2_stub_name): New. (nios2_get_stub_entry): New. (nios2_add_stub): New. (nios2_elf32_setup_section_lists): New. (nios2_elf32_next_input_section): New. (CALL26_SEGMENT): New. (MAX_STUB_SECTION_SIZE): New. (group_sections): New. (nios2_type_of_stub): New. (nios2_build_one_stub): New. (nios2_size_one_stub): New. (get_local_syms): New. (nios2_elf32_size_stubs): New. (nios2_elf32_build_stubs): New. (nios2_elf32_do_call26_relocate): Correct CALL26 overflow test. (nios2_elf32_relocate_section): Handle R_NIOS2_CALL26_NOAT. Add trampolines for R_NIOS2_CALL26 stubs. (nios2_elf32_check_relocs): Handle R_NIOS2_CALL26_NOAT. (nios2_elf32_gc_sweep_hook): Likewise. (nios2_elf32_link_hash_table_create): Initialize the stub hash table. (nios2_elf32_link_hash_table_free): New. (bfd_elf32_bfd_link_hash_table_free): Define. * elf32-nios2.h: New file. * libbfd.h: Update from reloc.c. * reloc.c (BFD_RELOC_NIOS2_CALL26_NOAT): New. gas/ * config/tc-nios2.c (md_apply_fix): Handle BFD_RELOC_NIOS2_CALL26_NOAT. (nios2_assemble_args_m): Likewise. (md_assemble): Likewise. gas/testsuite/ * gas/nios2/call26_noat.d: New. * gas/nios2/call26_noat.s: New. * gas/nios2/call_noat.d: New. * gas/nios2/call_noat.s: New. include/elf/ * nios2.h (elf_nios2_reloc_type): Add R_NIOS2_CALL26_NOAT. ld/ * Makefile.am (enios2elf.c, enios2linux.c): Update dependencies. * Makefile.in: Regenerated. * emulparams/nios2elf.sh (EXTRA_EM_FILE): Set. * emulparams/nios2linux.sh (EXTRA_EM_FILE): Set. * emultempl/nios2elf.em: New file. * gen-doc.texi (NIOSII): Set. * ld.texinfo (NIOSII): Set. ld/testsuite/ * ld-nios2/relax_call26.s: New. * ld-nios2/relax_call26_boundary.ld: New. * ld-nios2/relax_call26_boundary.s: New. * ld-nios2/relax_call26_boundary_c8.d: New. * ld-nios2/relax_call26_boundary_cc.d: New. * ld-nios2/relax_call26_boundary_d0.d: New. * ld-nios2/relax_call26_boundary_d4.d: New. * ld-nios2/relax_call26_boundary_d8.d: New. * ld-nios2/relax_call26_boundary_dc.d: New. * ld-nios2/relax_call26_boundary_f0.d: New. * ld-nios2/relax_call26_boundary_f4.d: New. * ld-nios2/relax_call26_boundary_f8.d: New. * ld-nios2/relax_call26_boundary_fc.d: New. * ld-nios2/relax_call26_cache.d: New. * ld-nios2/relax_call26_cache.ld: New. * ld-nios2/relax_call26_cache.s: New. * ld-nios2/relax_call26_multi.d: New. * ld-nios2/relax_call26_multi.ld: New. * ld-nios2/relax_call26_norelax.d: New. * ld-nios2/relax_call26_shared.d: New. * ld-nios2/relax_call26_shared.ld: New.
2014-01-24Add .data and .bss refsym symbolsDJ Delorie2-4/+56
For each object, if it has a nonempty .data or .bss section, emit a symbol that could cause the startup code to selectively link in the code to initialize those sections. * config/tc-msp430.c (msp430_section): Always flag data sections, regardless of -md. (msp430_frob_section): New. Make sure all sections are noticed if they have content. (msp430_lcomm): New. Flag bss if .lcomm is seen. (msp430_comm): New. Likewise. (md_pseudo_table): Add them. * config/tc-msp430.h (msp430_frob_section): Declare. (tc_frob_section): Define.
2014-01-23Remove the display of known MCU names from the MSP430 port of GAS.Nick Clifton1-36/+16
New MSP430 MCU parts are being created by TI all the time and the list is basically always out of date. Instead any name will be accepted by the -mmcu= command line option. ISA selection is now based upon the -mcpu= command line option, just as is done for GCC. gas/ChangeLog * config/tc-msp430.c (show_mcu_list): Delete. (md_parse_option): Accept any MCU name. Accept several more variants for the -mcpu option. (md_show_usage): Do not call show_mcu_list.
2014-01-22Add .refsym to msp430 backendDJ Delorie1-0/+10
* config/tc-msp430.c (msp430_refsym): New: ".refsym <symbol>" * doc/c-msp430.texi (MSP430 Directives): Document it. The purpose of this patch is to provide a way for one object file to require the inclusion of another object, without having to allocate space for a .word address reference.
2014-01-22Remove regzmm from AVX2 gather assertMichael Zolotukhin1-4/+2
Since regzmm can't be used in AVX2 gather instructions, there is no need to check regzmm in AVX2 gather assert. 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * config/tc-i386.c (check_VecOperands): Remove regzmm from AVX2 gather assert.
2014-01-22Add check for invalid register in AVX512 gathersMichael Zolotukhin1-0/+16
AVX512 gather instructions shouldn't accept the same register for both destination and index. gas/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * config/tc-i386.c (check_VecOperands): Add check for invalid register set in AVX512 gathers. gas/testsuite/ 2014-01-22 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> PR gas/16489 * gas/i386/vgather-check.s: Add tests for AVX512 gathers. * gas/i386/x86-64-vgather-check.s: Likewise. * gas/i386/vgather-check-error.l: Update correspondingly. * gas/i386/vgather-check-none.d: Likewise. * gas/i386/vgather-check-warn.d: Likewise. * gas/i386/vgather-check-warn.e: Likewise. * gas/i386/vgather-check.d: Likewise. * gas/i386/x86-64-vgather-check-error.l: Likewise. * gas/i386/x86-64-vgather-check-none.d: Likewise. * gas/i386/x86-64-vgather-check-warn.d: Likewise. * gas/i386/x86-64-vgather-check-warn.e: Likewise. * gas/i386/x86-64-vgather-check.d: Likewise.
2014-01-22Fix gas build breakageAlan Modra1-1/+1
* config/tc-tic4x.c (md_shortopts): s/CONST/const/.
2014-01-21Ensure that %func() expressions are outermost termsDJ Delorie1-1/+35
This is to avoid expressions like: %hi(foo) + 1, which will not do what you expect. The complex relocations can handle it, but the internal fixups can't.
2014-01-17gas: ARM: Fix encoding of VCVTr.s32.f64 instructionsWill Newton1-1/+1
The direct rounding floating-point VCVT instructions introduced in ARMv8 encode the s32.f64 variant incorrectly. The op bit should be set to 1 for all signed conversions. gas/ChangeLog: 2014-01-17 Will Newton <will.newton@linaro.org> * config/tc-arm.c (do_vfp_nsyn_cvt_fpv8): Set OP to 1 for the s32.f64 flavours of VCVT. gas/testsuite/ChangeLog: 2014-01-17 Will Newton <will.newton@linaro.org> * gas/arm/armv8-a+fp.d: Correct encoding of vcvta.s32.f64.
2014-01-14 PR gas/16434Nick Clifton1-7/+5
* config/tc-z80.c (wrong_match): Provide format string to as_warn. (parse_exp_not_indexed): Delete unused variable dummy. (emit_byte): Delete unused variable fixp.
2014-01-08Remove regbnd and vec_disp8H.J. Lu1-3/+1
* config/tc-i386.c (regbnd): Removed. (vec_disp8): Likewise.
2014-01-07remove VA_* from binutilsTom Tromey1-4/+4
This removes the last uses of the obsolete VA_* macros from binutils. All the binutils and bfd changes were tested by rebuilding. I didn't rebuild the gas change but I think it is obviously correct. 2014-01-07 Tom Tromey <tromey@redhat.com> * elf32-xtensa.c (vsprint_msg): Don't use old VA_* compatibility wrappers. 2014-01-07 Tom Tromey <tromey@redhat.com> * bucomm.c (fatal, non_fatal): Replace obsolete VA_* macros with stdarg macros. * dlltool.c (inform): Replace obsolete VA_* macros with stdarg macros. * dllwrap.c (inform, warn): Replace obsolete VA_* macros with stdarg macros. 2014-01-07 Tom Tromey <tromey@redhat.com> * config/tc-tic30.c (debug): Avoid old VA_* compatibility wrappers.
2014-01-07remove uses of PARAMS from binutilsTom Tromey1-2/+2
This removes the last uses of PARAMS from binutils. The two changes in binutils were tested by rebuilding. I didn't rebuild the gas change but I think it is obviously correct. 2014-01-07 Tom Tromey <tromey@redhat.com> * coffgrok.h (coff_ofile): Don't use PARAMS. * nlmheader.y (strerror): Don't use PARAMS. 2014-01-07 Tom Tromey <tromey@redhat.com> * config/tc-microblaze.h (parse_cons_expression_microblaze): Don't use PARAMS.
2014-01-07remove ANSI_PROTOTYPESTom Tromey1-3/+1
This removes the last use of ANSI_PROTOTYPES in the tree. It appears in gas. I didn't even rebuild this but I think it is obviously correct. 2014-01-07 Tom Tromey <tromey@redhat.com> * config/tc-xc16x.h: Don't use ANSI_PROTOTYPES.
2014-01-07[AArch64] Add GAS recognition for "xgene-1"Philipp Tomsich1-0/+1
* config/tc-aarch64.c (aarch64_cpus): Add entry for "xgene-1" This adds support for the AppliedMicro X-Gene 1 processor to the assembler.
2013-12-18gas/Yufeng Zhang1-8/+8
* config/tc-aarch64.c (md_assemble): Defer the feature checking until do_encode () succeeds. gas/testsuite/ * gas/aarch64/rm-simd-ext.d: New file. * gas/aarch64/rm-simd-ext.l: Likewise. * gas/aarch64/rm-simd-ext.s: Likewise.
2013-12-18 * config/tc-rx.c (rx_include): Rename 'eof' to 'last_char' inNick Clifton1-11/+11
order to avoid conflict with same named variable in MinGW system header file.
2013-12-13 * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.Nick Clifton1-4/+17
(OPTION_INTR_NOPS): Define. (gen_interrupt_nops): Default to FALSE. (md_parse_opton): Add support for OPTION_INTR_NOPS. (md_longopts): Add -mn. (md_show_usage): Add -mn. (msp430_operands): Generate NOPs for all MCUs not just 430Xv2. * doc/c-msp430.c: Document -mn.
2013-12-13Add support for Andes NDS32:Kuan-Lin Chen2-0/+6184
BFD: * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32 files. * Makefile.in: Regenerate. * archures.c (bfd_nds32_arch): Add nds32 target. * bfd-in2.h: Regenerate. * config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec and bfd_elf32_nds32belin_vec. (nds32*be-*-linux*): Likewise. (nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec. (nds32*be-*-*): Likewise. * configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. * configure: Regenerate. * cpu-nds32.c: New file for nds32. * elf-bfd.h: Add NDS32_ELF_DATA. * elf32-nds32.c: New file for nds32. * elf32-nds32.h: New file for nds32. * libbfd.h: Regenerate. * reloc.c: Add relocations for nds32. * targets.c (bfd_elf32_nds32be_vec): New declaration for nds32. (bfd_elf32_nds32le_vec): Likewise. (bfd_elf32_nds32belin_vec): Likewise. (bfd_elf32_nds32lelin_vec): Likewise. BINUTILS: * readelf.c: Include elf/nds32.h (guess_is_rela): Add case for EM_NDS32. (dump_relocations): Add case for EM_NDS32. (decode_NDS32_machine_flags): New. (get_machine_flags): Add case for EM_NDS32. (is_32bit_abs_reloc): Likewise. (is_16bit_abs_reloc): Likewise. (process_nds32_specific): New. (process_arch_specific): Add case for EM_NDS32. * NEWS: Announce Andes nds32 support. * MAINTAINERS: Add nds32 maintainers. TESTSUITE: * binutils-all/objdump.exp: Add NDS32 cpu. * binutils-all/readelf.r: Skip extra reloc created by NDS32. GAS: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c. (TARGET_CPU_HFILES): Add config/tc-nds32.h. * Makefile.in: Regenerate. * configure.in (nds32): Add nds32 target extension config support. * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*. * configure: Regenerate. * config/tc-nds32.c: New file for nds32. * config/tc-nds32.h: New file for nds32. * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi. * doc/Makefile.in: Regenerate. * doc/as.texinfo: Add nds32 options. * doc/all.texi: Set NDS32. * doc/c-nds32.texi: New file dor nds32 document. * NEWS: Announce Andes nds32 support. TESTSUITE: * gas/all/gas.exp: Add expected failures for NDS32. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Use alternate test. * gas/macros/irp.d: Skip for NDS32. * gas/macros/macros.exp: Skip some tests for the NDS32. * gas/macros/rept.d: Skip for NDS32. * gas/macros/test3.d: Skip for NDS32. * gas/nds32: New directory. * gas/nds32/alu-1.s: New test. * gas/nds32/alu-1.d: Likewise. * gas/nds32/alu-2.s: Likewise. * gas/nds32/alu-2.d: Likewise. * gas/nds32/br-1.d: Likewise. * gas/nds32/br-1.s: Likewise. * gas/nds32/br-2.d: Likewise. * gas/nds32/br-2.s: Likewise. * gas/nds32/ji-jr.d: Likewise. * gas/nds32/ji-jr.s: Likewise. * gas/nds32/ls.d: Likewise. * gas/nds32/ls.s: Likewise. * gas/nds32/lsi.d: Likewise. * gas/nds32/lsi.s: Likewise. * gas/nds32/to-16bit-v1.d: Likewise. * gas/nds32/to-16bit-v1.s: Likewise. * gas/nds32/to-16bit-v2.d: Likewise. * gas/nds32/to-16bit-v2.s: Likewise. * gas/nds32/to-16bit-v3.d: Likewise. * gas/nds32/to-16bit-v3.s: Likewise. * gas/nds32/nds32.exp: New test driver. LD: * Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target. * Makefile.in: Regenerate. * configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*, nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*. * emulparams/nds32belf.sh: New file for nds32. * emulparams/nds32belf_linux.sh: Likewise. * emulparams/nds32belf16m.sh: Likewise. * emulparams/nds32elf.sh: Likewise. * emulparams/nds32elf_linux.sh: Likewise. * emulparams/nds32elf16m.sh: Likewise. * emultempl/nds32elf.em: Likewise. * scripttempl/nds32elf.sc}: Likewise. * gen-doc.texi: Set NDS32. * ld.texinfo: Set NDS32. * NEWS: Announce Andes nds32 support. TESTSUITE: * lib/ld-lib.exp: Add NDS32 to list of targets that do not support shared library generation. * ld-nds32: New directory. * ld-nds32/branch.d: New test. * ld-nds32/branch.ld: New test. * ld-nds32/branch.s: New test. * ld-nds32/diff.d: New test. * ld-nds32/diff.ld: New test. * ld-nds32/diff.s: New test. * ld-nds32/gp.d: New test. * ld-nds32/gp.ld: New test. * ld-nds32/gp.s: New test. * ld-nds32/imm.d: New test. * ld-nds32/imm.ld: New test. * ld-nds32/imm.s: New test. * ld-nds32/imm_symbol.s: New test. * ld-nds32/relax_jmp.d: New test. * ld-nds32/relax_jmp.ld: New test. * ld-nds32/relax_jmp.s: New test. * ld-nds32/relax_load_store.d: New test. * ld-nds32/relax_load_store.ld: New test. * ld-nds32/relax_load_store.s: New test. * ld-nds32/nds32.exp: New file. OPCODES: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c and nds32-dis.c. * Makefile.in: Regenerate. * configure.in: Add case for bfd_nds32_arch. * configure: Regenerate. * disassemble.c (ARCH_nds32): Define. * nds32-asm.c: New file for nds32. * nds32-asm.h: New file for nds32. * nds32-dis.c: New file for nds32. * nds32-opc.h: New file for nds32. INCLUDE: * dis-asm.h (print_insn_nds32): Add nds32 target. * elf/nds32.h: New file for nds32. * opcode/nds32.h: New file for nds32.
2013-12-07strip off +x bits on non-executable/script filesMike Frysinger3-0/+0
These files are source files and have no business being +x. We couldn't easily fix it in CVS (you need login+write access to the raw rcs files), but we can fix this w/git. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2013-12-03Fix crash on intelbad.Tristan Gingold1-6/+4
gas/ 2013-12-03 Tristan Gingold <gingold@adacore.com> * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic overflow on pointers.
2013-11-20Revert "Do not issue error messages when parsing a PSTATE register".Yufeng Zhang1-4/+1
This reverts commit 03e621be975dacc9cec9f5782698bdb098f6a49c.
2013-11-19 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messagesNick Clifton1-1/+4
for deprecated system registers when parsing pstate fields.
2013-11-192013-11-19 Catherine Moore <clm@codesourcery.com>Catherine Moore1-2/+31
gas/ * config/tc-mips.c (mips_fix_pmc_rm7000): Declare. (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000. (INSN_DMULT): Define. (INSN_DMULTU): Define. (insns_between): Detect PMC RM7000 errata. (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000. * doc/as.texinfo: Document new options. * doc/c-mips.texi: Likewise. gas/testsuite/ * gas/mips/fix-pmc-rm7000-1.d: New. * gas/mips/fix-pmc-rm7000-1.s: New. * gas/mips/fix-pmc-rm7000-2.d: New. * gas/mips/fix-pmc-rm7000-2.s: New. * gas/mips/micromips@fix-pmc-rm7000-1.d: New. * gas/mips/micromips@fix-pmc-rm7000-2.d: New. * gas/mips/mips.exp: Run new tests.
2013-11-18Add a dummy "int bnd_prefix" argumentH.J. Lu1-2/+3
* config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix" argument.
2013-11-18Add support for armv7ve to gas.Yufeng Zhang1-7/+5
gas/ * config/tc-arm.c (arm_archs): New armv7ve architecture option. (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15. (cpu_arch_ver): Likewise. * doc/c-arm.texi: Document armv7ve. gas/testsuite/ * gas/arm/attr-march-armv7ve.d: New test case for armv7ve. include/opcode/ * arm.h (ARM_AEXT_V7VE): New define. (ARM_ARCH_V7VE): New define. (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
2013-11-18gas/Yufeng Zhang1-5/+5
* config/tc-aarch64.c (parse_sys_reg): Support S2_<op1>_<Cn>_<Cm>_<op2>. gas/testsuite/ * gas/testsuite/sysreg.s: Add test. * gas/testsuite/sysreg.d: Update.
2013-11-18Revert "Add support for AArch64 trace unit registers."Yufeng Zhang1-33/+8
This reverts commit 75468c93c14e9f14dd9020712538c5303a455876.
2013-11-17Add R_X86_64_PC32_BND and R_X86_64_PLT32_BNDH.J. Lu2-14/+45
bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (R_X86_64_standard): Replace R_X86_64_RELATIVE64 with R_X86_64_PLT32_BND. (IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND. (x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and R_X86_64_PLT32_BND. (elf_x86_64_gc_sweep_hook): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Return BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if bnd_prefix isn't zero. (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var if needed. (output_jump): Update reloc call. (output_interseg_jump): Likewise. (output_disp): Likewise. (output_imm): Likewise. (x86_cons_fix_new): Likewise. (lex_got): Add an argument, bnd_prefix, to indicate if instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND if needed. (x86_cons): Update lex_got call. (i386_immediate): Likewise. (i386_displacement): Likewise. (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and BFD_RELOC_X86_64_PLT32_BND. (tc_gen_reloc): Likewise. * config/tc-i386-intel.c (i386_operator): Update lex_got call. gas/testsuite/ * gas/i386/i386.exp: Run x86-64-mpx-branch-1 and x86-64-mpx-branch-2 on 64-bit ELF targets. * gas/i386/x86-64-mpx-branch-1.d: New file. * gas/i386/x86-64-mpx-branch-1.s: Likewise. * gas/i386/x86-64-mpx-branch-2.d: Likewise. * gas/i386/x86-64-mpx-branch-2.s: Likewise. include/elf/ * x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND. ld/testsuite/ * ld-x86-64/mpx.exp: New file. * ld-x86-64/mpx1.out: Likewise. * ld-x86-64/mpx1a.c: Likewise. * ld-x86-64/mpx1a.rd: Likewise. * ld-x86-64/mpx1b.c: Likewise. * ld-x86-64/mpx1c.c: Likewise. * ld-x86-64/mpx1c.rd: Likewise.
2013-11-15gas/Yufeng Zhang1-8/+33
* config/tc-aarch64.c (set_other_error): New function. (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set the variable to which it points with 'o'. (parse_operands): Update; check for write to read-only system registers or read from write-only ones. gas/testsuite/ * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/tracereg-illegal.d: New file. * gas/aarch64/tracereg-illegal.l: Ditto. * gas/aarch64/tracereg-illegal.s: Ditto. * gas/aarch64/tracereg.d: Ditto. * gas/aarch64/tracereg.s: Ditto. include/opcode * aarch64.h (aarch64_sys_reg_readonly_p): New declaration. (aarch64_sys_reg_writeonly_p): Ditto. opcodes/ * aarch64-opc.c (CPENT): New define. (F_READONLY, F_WRITEONLY): Likewise. (aarch64_sys_regs): Add trace unit registers. (aarch64_sys_reg_readonly_p): New function. (aarch64_sys_reg_writeonly_p): Ditto.
2013-11-15Reorder invalid default mask checkMichael Zolotukhin1-8/+8
gas/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * config/tc-i386.c (check_VecOperands): Reorder checks. gas/testsuite/ 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com> * gas/i386/inval-avx512f.s: Add invalid test for gather instruction with default mask. * gas/i386/inval-avx512f.l: Update correspondingly.
2013-11-112013-11-11 Catherine Moore <clm@codesourcery.com>Catherine Moore1-4/+4
gas/ * config/mips/tc-mips.c (convert_reg_type): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (reg_needs_delay): Likewise. (insns_between): Likewise. include/ * opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to... (INSN_LOAD_MEMORY): ...this. opcodes/ * mips-dis.c (print_insn_mips): Use INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY. (print_insn_micromips): Likewise. * mips-opc.c (LDD): Remove. (CLD): Include INSN_LOAD_MEMORY. (LM): New. (mips_builtin_opcodes): Use LM instead of LDD. Add LM to load instructions.
2013-11-112013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.deJan-Benedict Glaw1-1/+1
* config/tc-ppc.c (ppc_elf_localentry): Add cast. [BR]: https://sourceware.org/ml/binutils/2013-11/msg00064.html
2013-11-05gas/Yufeng Zhang1-2/+7
* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg; call aarch64_sys_reg_deprecated_p and warn about the deprecated system registers. gas/testsuite/ * gas/aarch64/deprecated.d: New file. * gas/aarch64/deprecated.l: New file. * gas/aarch64/deprecated.s: New file. * gas/aarch64/sysreg-1.s: Add tests. * gas/aarch64/sysreg-1.d: Add tests. include/opcode/ * aarch64.h (aarch64_sys_reg): New typedef. (aarch64_sys_regs): Change to define with the new type. (aarch64_sys_reg_deprecated_p): Declare. opcodes/ * aarch64-opc.c (F_DEPRECATED): New macro. (aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with F_DEPRECATED. (aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on AARCH64_OPND_SYSREG.
2013-11-05gas/Yufeng Zhang1-0/+8
* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1. gas/testsuite/ * gas/aarch64/alias.s: Add tests. * gas/aarch64/alias.d: Update. * gas/aarch64/no-aliases.d: Update. * gas/aarch64/diagnostic.s: Add tests. * gas/aarch64/diagnostic.l: Update. * gas/aarch64/illegal.s: Add tests. * gas/aarch64/illegal.l: Update. include/opcode/ * aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND. (enum aarch64_opnd): Add AARCH64_OPND_COND1. opcodes/ * aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'. (convert_from_csel): Likewise. * aarch64-opc.c (operand_general_constraint_met_p): Handle AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1. (aarch64_print_operand): Handle AARCH64_OPND_COND1. * aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of COND for cinc, cset, cinv, csetm and cneg. (AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1. * aarch64-asm-2.c: Re-generated. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto.
2013-11-05config/tc-aarch64.c: Avoid trying to parse a vector mov as immediate.Will Newton1-1/+2
Parsing a vector mov instruction currently leads to a phantom undefined symbol being added to the symbol table. e.g.: .text mov x0, v0.D[0] Produces an undefined symbol called "v0.D". gas/ChangeLog: 2013-11-05 Will Newton <will.newton@linaro.org> PR gas/16103 * config/tc-aarch64.c (parse_operands): Avoid trying to parse a vector register as an immediate. gas/testsuite/ChangeLog: 2013-11-05 Will Newton <will.newton@linaro.org> * gas/aarch64/advsimd-mov-bad.d: New file. * gas/aarch64/advsimd-mov-bad.s: Likewise.
2013-11-04x86-64/gas: fix an asymmetry in suffix/register checkingJan Beulich1-5/+6
Without this, constructs like "orw %rax, (%rax)" aren't being rejected (other than any other wrong suffix/register combination). gas/ 2013-11-04 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (check_long_reg): Correct comment indentation. (check_qword_reg): Correct comment and its indentation. (check_word_reg): Extend comment and correct its indentation. Also check for 64-bit register. gas/testsuite/ 2013-11-04 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-suffix-bad.[sl]: New. * gas/i386/i386.exp: Run new test.
2013-10-30Add ELFv2 .localentry support.Alan Modra1-0/+106
This defines the ELF symbol st_other field used to encode the number of instructions between a function "global entry" and its "local entry", and adds support related to the local entry offset. include/elf/ * ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define. (ppc64_decode_local_entry, ppc64_encode_local_entry): New functions. (PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define. bfd/ * elf64-ppc.c (struct ppc_stub_hash_entry): Add "other". (stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one we forgot, "plt_ent". (ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have st_other bits only valid in ELFv2. (ppc64_elf_merge_symbol_attribute): New function. (ppc_type_of_stub): Add local_off param to test branch range. (ppc_build_one_stub): Adjust destinations for ELFv2 locals. (ppc_size_one_stub, toc_adjusting_stub_needed): Similarly. (ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub. Set "other" field. (ppc64_elf_relocate_section): Adjust destination for ELFv2 local calls. gas/ * config/tc-ppc.c (md_pseudo_table): Add .localentry. (ppc_elf_localentry): New function. (ppc_force_relocation): Force relocs on all branches to localenty symbols. (ppc_fix_adjustable): Don't reduce such symbols to section+offset. binutils/ * readelf.c (get_ppc64_symbol_other): New function. (get_symbol_other): Use it for EM_PPC64.
2013-10-30Add .abiversion related support for ELFv2Alan Modra2-0/+42
Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2, adds .abiversion directive to explicitly choose the ABI, and code to check and automatically select ABI. include/elf/ * ppc64.h (EF_PPC64_ABI): Define. bfd/ * elf64-ppc.c (abiversion, set_abiversion): New functions. (ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd. (struct ppc_link_hash_table): Add opd_abi. (ppc64_elf_check_relocs): Check no .opd with ELFv2. (ppc64_elf_merge_private_bfd_data): New function. (ppc64_elf_print_private_bfd_data): New function. (ppc64_elf_tls_setup): Set htab->opd_abi. (ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic tags for ELFv2. (ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc. (ppc64_elf_finish_dynamic_symbol): Likewise binutils/ * readelf.c (get_machine_flags): Display ABI version for EM_PPC64. gas/ * config/tc-ppc.c: Include elf/ppc64.h. (ppc_abiversion): New variable. (md_pseudo_table): Add .abiversion. (ppc_elf_abiversion, ppc_elf_end): New functions. * config/tc-ppc.h (md_end): Define.
2013-10-30Report overflow on PowerPC64 @h and @ha relocations.Alan Modra1-36/+103
This changes the behaviour of @h and @ha on PowerPC64 to report errors on 32-bit overflow. The motivation for this change is that on PowerPC64, most uses of @h and @ha modifiers and their corresponding relocations are to build up 32-bit offsets. We'd like to know when such offsets overflow. Only rarely do people use @h or @ha with the high 32-bit modifiers to build a 64-bit constant. Those uses will now need to use two new modifiers, @high and @higha, if the constant isn't known at assembly time. For now, we won't report overflow at assembly time.. This also fixes an error when applying some of the HIGHER and HIGHEST relocations. include/elf/ * ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New. (IS_PPC64_TLS_RELOC): Match new tls relocs. bfd/ * reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA, BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA, BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New. * elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs. Make all _HA and _HI relocs report signed overflow. (ppc64_elf_reloc_type_lookup): Handle new relocs. (must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise. (dec_dynrel_count, ppc64_elf_relocate_section): Likewise. (ppc64_elf_relocate_section): Don't apply 0x8000 adjust to R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST, R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (SEX16): Don't mask. (REPORT_OVERFLOW_HI): Define as zero. (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha, @tprel@high, and @tprel@higha modifiers. (md_assemble): Ignore X_unsigned when applying 16-bit insn fields. Add (disabled) code to check @h and @ha reloc overflow for powerpc64. Handle new relocs. (md_apply_fix): Similarly. elfcpp/ * powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA, R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA, R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define. gold/ * powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs. (Target_powerpc::Scan::global, local): Likewise. (Target_powerpc::Relocate::relocate): Likewise. Check for overflow on all ppc64 @h and @ha relocs.
2013-10-182013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu1-2/+10
* config/tc-mips.c (fpr_read_mask): Test MSA registers. (fpr_write_mask): Test MSA registers. (can_swap_branch_p): Check fpr write followed by fpr read.
2013-10-18 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.Nick Clifton1-1/+1
2013-10-15revert previous delta.Nick Clifton1-1/+1
2013-10-142013-10-14 Richard Sandiford <rdsandiford@googlemail.com>Chao-ying Fu1-43/+134
Chao-ying Fu <Chao-ying.Fu@imgtec.com> * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA. (md_longopts): Add mmsa and mno-msa. (mips_ases): Add msa. (RTYPE_MASK): Update. (RTYPE_MSA): New define. (OT_REG_ELEMENT): Replace with... (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types. (mips_operand_token): Replace reg_element with index. (mips_parse_argument_token): Treat vector indices as separate tokens. Handle register indices. (md_begin): Add MSA register names. (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL. (match_mdmx_imm_reg_operand): Update accordingly. (match_imm_index_operand): New function. (match_reg_index_operand): New function. (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX. (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v. (md_show_usage): Print -mmsa and -mno-msa. * doc/as.texinfo: Document -mmsa and -mno-msa. * doc/c-mips.texi: Document -mmsa and -mno-msa. Document .set msa and .set nomsa.
2013-10-14 * gen-aout.c (main): Fix formatting. Close file.Nick Clifton2-2/+2
* emultempl/aix.em (_read_file): Close file at end of function. * gas/all/itbl-test.c (main): Close fas. * read.c (add_include_dir): Use xrealloc. * config/tc-score.c (do_macro_bcmp): Initialise inst_main. * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg. * readelf.c (decode_arm_unwind): Initialise addr structure. (process_symbol_table): Free lengths. * srcconv.c (wr_sc): Free info. * chew.c (perform): Free next.
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