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AgeCommit message (Expand)AuthorFilesLines
2016-03-29replace some obstack_alloc () calls with the XOBNEW wrapperTrevor Saunders3-7/+7
2016-03-28add more const qualifiersTrevor Saunders6-15/+16
2016-03-25split up cr16s md_assemble ()Trevor Saunders1-25/+37
2016-03-25rename flag_size_check to flag_allow_nonconst_size and make it a boolTrevor Saunders1-1/+1
2016-03-24gas: sparc: allow ASR registers in the 0..31 range in V9 and laterJose E. Marchesi1-16/+16
2016-03-24make microblaze build with -Wwrite-stringsTrevor Saunders1-4/+4
2016-03-24localize string returned from visium's md_atof ()Trevor Saunders1-1/+1
2016-03-22make more variables constTrevor Saunders10-26/+29
2016-03-22tc-pdp11.c: remove useless codeTrevor Saunders1-2/+0
2016-03-22tc-sparc.c: get rid of wierd usage of strchr ()Trevor Saunders1-6/+13
2016-03-22use do_align () directly in tc-ia64.cTrevor Saunders1-19/+10
2016-03-22Remove more alloca callsAlan Modra2-5/+10
2016-03-21arc/opcodes: Use flag operand class to handle multiple flag matchesAndrew Burgess1-6/+16
2016-03-21arc: Add nps400 machine type, and assembler flag.Andrew Burgess1-0/+3
2016-03-21arc: Remove EF_ARC_CPU_GENERIC constant.Andrew Burgess1-4/+3
2016-03-21arc/gas: default mach is arc700, initialised in md_beginAndrew Burgess1-41/+38
2016-03-21Remove use of alloca.Nick Clifton15-108/+150
2016-03-20tc-i386.c: store encoded instructions in unsigned char[]Trevor Saunders1-33/+33
2016-03-16[ARM] Support ARMv8.2 FP16 simd instructionsJiong Wang1-23/+73
2016-03-16Fix checking bignum values that are being inserted into byte sized containers.Nick Clifton1-3/+8
2016-03-10PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targetsMickael Guene1-8/+25
2016-03-09fixup -Wshadow warnings on gcc-4.7Trevor Saunders1-17/+18
2016-03-07[ARM] Add support for Cortex-R8Thomas Preud'homme1-0/+3
2016-03-07Add const qualifiers at various places.Trevor Saunders13-146/+119
2016-03-04[ARM] Build attributes for ARMv8.1-A AdvSIMDMatthew Wahab1-1/+3
2016-03-04[ARM] Add feature check for ARMv8.1 AdvSIMD instructions.Matthew Wahab1-15/+54
2016-02-29[ARC] Local symbols relocation cleanupClaudiu Zissulescu1-2/+23
2016-02-29[ARC] General fixes.Claudiu Zissulescu1-1/+1
2016-02-25Convert more variables to a constant form.Trevor Saunders37-124/+124
2016-02-24[GAS][ARM][3/3]Add armv8.2 fp16 scalar instruction support. Based on SE_H ins...Renlin Li1-39/+236
2016-02-24[GAS][ARM][2/3]Add SE_H shape to represent fp16 type.Renlin Li1-7/+72
2016-02-24[ARM][gas] Add support for Cortex-A32Kyrylo Tkachov1-0/+2
2016-02-22Add more const type qualifiers to GAS sources.Trevor Saunders21-68/+61
2016-02-20[i386] Check RegVRex in register_numberH.J. Lu1-0/+3
2016-02-19[ARM] Add FP16 feature extension for ARMv8.2 architectureJiong Wang1-0/+6
2016-02-17xtensa: fix .init/.fini literals movingMax Filippov1-2/+10
2016-02-17Update list of known MSP430 MCUs.Nick Clifton1-1/+15
2016-02-16[ARC] Enable .cfi_* pseudo-ops.Claudiu Zissulescu2-0/+31
2016-02-16[PR19620][GAS][AArch64]Remove mov[z,k,n] relocation symbol name restriction.Renlin Li1-9/+1
2016-02-15Correct opcode generated for RX indirect MOVs without an offset.Vinay Kumar G1-0/+9
2016-02-15Enhance GAS's .section directive so that it can take numeric values for the f...Nick Clifton2-9/+49
2016-02-10Add support for ARC instruction relaxation in the assembler.Claudiu Zissulescu2-957/+1480
2016-02-08FIx formatting that triggers a new compile time warning message.Nick Clifton1-2/+3
2016-02-04Remove support for creating ARM NOREAD sections.Nick Clifton3-22/+0
2016-02-04Fix the encoding of the MSP430's RRUX instruction.Nick Clifton1-57/+3
2016-02-03xtensa: fix signedness of gas relocationsMax Filippov1-3/+3
2016-02-03Add -mrelax-relocations= to x86 assemblerH.J. Lu1-3/+27
2016-02-03msp430: Set DWARF2_ADDR_SIZE to 4.Kevin Buettner1-0/+2
2016-02-01Fix ARC TLS support.Claudiu Zissulescu1-2/+9
2016-02-01Fix a problem building the ARM assembler using LLVM.Loria1-1/+4
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