Age | Commit message (Collapse) | Author | Files | Lines |
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2005-11-14 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (md): Rename regsym to indregsym and move
it to the end of the structure.
(ar): Field regnum is unsigned.
(cr): Likewise:
(indirect_reg): Likewise.
(declare_register_set): Parameter regnum is unsigned.
(declare_register): Parameter numregs and base_regnum are
unsigned. So is the local loop variable.
(md_begin): Restrict scope of local variable regnum, which
also is unsigned. Replace loops with function calls where
possible. Re-order things so that register groups are kept
together. Remove all uses of regsym except for indirect
registers. Replace use of regsym by indregsym for indirect
registers.
(ia64_optimize_expr): Replace use of regsym by indregsym for
indirect registers, with appropriate bias.
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instructions. Define MIPS16_ALL_ARGS and MIPS16_ALL_STATICS for
save/restore encoding of the args field.
* mips16-opc.c: Add MIPS16e save/restore opcodes.
* mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
codes for save/restore.
* config/tc-mips.c (mips16_ip): Add handling of 'm' and 'M' codes
for the MIPS16e save/restore instructions.
* gas/mips/mips.exp: Run new save/restore tests.
* gas/testsuite/gas/mips/mips16e-save.s: New test for generating
different styles of save/restore instructions.
* gas/testsuite/gas/mips/mips16e-save.d: New.
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2005-11-10 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (intel_e11): Don't special-case segment
registers in brackets.
gas/testsuite/
2005-11-10 Jan Beulich <jbeulich@novell.com>
* gas/i386/intelbad.d: Add tests for ill registers in brackets.
* gas/i386/intelbad.l: Adjust.
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(arm_reg_parse_multi): Return NULL rather than FAIL.
(arm_reg_parse): Fix comment, the function returns FAIL rather than NULL if
it is unable to parse the register name.
(do_ldrex): Use BAD_ADDR_MODE.
Change error message for PC-relative addressing.
(do_strex): Likewise.
(do_t_ldrex): Use BAD_ADDR_MODE.
(do_t_strex): Likewise.
* gas/arm/archv6t2-bad.s: Add tests of badly composed ldrex and strex
instructions.
* gas/arm/archv6t2-bad.l: Add expected error messages.
* gas/arm/r15-bad.l: Adjust error messages for r15 usage in ldrex and strex
instructions.
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Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
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* config/tc-hppa.c (md_apply_fix): Use number_to_chars_bigendian to
output constant data.
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* config/obj-coff.c (obj_coff_section): Set readonly flag with the 'x'
attribute. Remember the actions of the 'w' and 'n' attributes and do not
allow the 'x','s' or 'd' attributes to change them.
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* config/tc-i386.c (line_comment_chars): Use '/' unconditionally.
(i386_comment_chars): Add.
(md_parse_options): Process OPTION_DIVIDE.
(md_show_usage): Describe --divide option.
* doc/c-i386.texi: Document --divide option.
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* config/tc-z80.h: Define O_SINGLE_EQ as O_eq.
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Contribute the following change:
2005-09-19 Dave Brolley <brolley@redhat.com>
* config/tc-m32c.c (default_isa): New static variable.
(m32c_isa): Now of type CGEN_BITSET.
(md_begin): Pass &m32c_isa to m32c_cgen_cpu_open.
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* config/tc-arm.c (aeabi_set_public_attributes): Use selected_cpu
instead of mcpu_cpu_opt.
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refer to "ports" instead of "queues".
(check_t1_t2_reads_and_writes): Pass correct interface values to
xtensa_interface_inout.
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2005-10-27 Jan Beulich <jbeulich@novell.com>
* read.c (assign_symbol): Also consider equates already defined.
* symbols.c (symbol_clone): Also clone the underlying BFD symbol.
* config/obj-coff.h (obj_symbol_clone_hook): New.
(coff_obj_symbol_clone_hook): Declare.
* config/obj-coff.c (coff_obj_symbol_clone_hook): New.
gas/testsuite/
2005-10-27 Jan Beulich <jbeulich@novell.com>
* gas/all/gas.exp: Don't xfail equiv1 test anymore.
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md_convert_frag): Add jsr.w support.
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itself.
(md_cgen_lookup_reloc): Add m32c bitbase operands. Add 8-s24
and imm-8-HI operands.
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gas/
* config/tc-arm.c (insns): Correct "sel" entry.
gas/testsuite/
* gas/arm/archv6.d: Adjust expected output.
opcodes/
* arm-dis.c (arm_opcodes): Correct "sel" entry.
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2005-10-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (i386_operand): Don't check register prefix here.
(parse_real_register): Rename from parse_register.
(parse_register): New.
(i386_parse_name): New.
(md_operand): New.
(intel_e11): Don't tolerate registers in offset expressions anymore.
(intel_get_token): Don't check register prefix here. Copy the actual
register token, not the canonical register name.
* config/tc-i386.h (md_operand): Delete.
(i386_parse_name): Declare.
(md_parse_name): Define.
gas/testsuite/
2005-10-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Replace register used in offset expression.
* gas/i386/intel.e: Adjust.
* gas/i386/intelbad.l: Adjust.
* gas/i386/equ.[sed]: New.
* gas/i386/i386.exp: Run new test.
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make a single reloc with an offset rather than a stack.
* config/tc-bfin.h (MD_APPLY_SYM_VALUE): Define to 0.
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* read.c (potable): Add weakref.
(s_weakref): New.
* read.h (s_weakref): Declare.
* struc-symbol.h (struct symbol): Add sy_weakrefr and sy_weakrefd.
* symbols.c (colon): Clear weakrefr.
(symbol_find_exact): Rename to, and reimplement in terms of...
(symbol_find_exact_noref): ... new function.
(symbol_find): Likewise...
(symbol_find_noref): ... ditto.
(resolve_symbol_value): Resolve weakrefr without setting their
values.
(S_SET_WEAK): Call hook.
(S_GET_VALUE): Follow weakref link.
(S_SET_VALUE): Clear weakrefr.
(S_IS_WEAK): Follow weakref link.
(S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): New.
(S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): New.
(symbol_set_value_expression, symbol_set_frag): Clear weakrefr.
(symbol_mark_used): Follow weakref link.
(print_symbol_value_1): Print weak, weakrefr and weakrefd.
* symbols.h (symbol_find_noref, symbol_find_exact_noref): Declare.
(S_IS_WEAKREFR, S_SET_WEAKREFR, S_CLEAR_WEAKREFR): Declare.
(S_IS_WEAKREFD, S_SET_WEAKREFD, S_CLEAR_WEAKREFD): Declare.
* write.c (adust_reloc_syms): Follow weakref link. Do not
complain if target is undefined.
(write_object_file): Likewise. Remove weakrefr symbols. Drop
unreferenced weakrefd symbols.
* config/obj-coff.c (obj_frob_symbol): Do not force WEAKREFD
symbols EXTERNAL.
(pecoff_obj_set_weak_hook, pecoff_obj_clear_weak_hook): New.
* config/obj-coff.h (obj_set_weak_hook, obj_clear_weak_hook): Define.
* doc/as.texinfo: Document weakref.
* doc/internals.texi: Document new struct members, internal
functions and hooks.
gas/testsuite/ChangeLog:
* gas/all/weakref1.s, gas/all/weakref1.d: New test.
* gas/all/weakref1g.d, gas/all/weakref1l.d: New tests.
* gas/all/weakref1u.d, gas/all/weakref1w.d: New tests.
* gas/all/weakref2.s, gas/all/weakref3.s: New tests.
* gas/all/gas.exp: Run new tests.
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* elf32-bfin.c (bfd_bfin_elf32_create_embedded_relocs): Fix signedness
warning.
gas/
* Makefile.am (bfin-parse.h): Renamed from bfin-parse.tab.h.
(EXTRA_DIST): Add bfin-parse.h and bfin-lex.c.
* Makefile.in: Regenerate.
* config/bfin-lex.l: Include bfin-parse.h instead of bfin-parse.tab.h.
* config/tc-bfin.c (md_chars_to_number): Change the type of first
argument from unsigned char * to char * to remove signedness warnings.
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2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
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2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (declare_register): Call symbol_create.
(md_begin): Remove local variables total, ar_base, and cr_base.
Start loops for registers at their respective first one. Don't
update md.regsym for alias names. Generate alias name tp for r13.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/regs.pl: Also check tp alias of r13.
* gas/ia64/regs.s: Regenerate.
* gas/ia64/regs.d: Adjust.
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names unstead of numbers.
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into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
hence avoiding to emit a nop.
* gas/mips/mips.exp: Run new test.
* gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
jalr/jr to the compact jalrc/jrc instructions.
* gas/testsuite/gas/mips/mips16e-jrc.d: New.
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LEX_BEGIN_NAME.
(bfin_start_line_hook): Remove the workaround for LSETUP(.
(bfin_name_is_register): Remove the workarounds for LSETUP(
and SAA(.
(bfin_start_label): Ditto.
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default_lit_sections regardless of use_literal_section.
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unsigned line number. Do not include "dwarf2dbg.h".
* config/tc-xtensa.c (md_pseudo_table): Remove entry for "loc".
(xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): Delete.
(xg_build_to_insn, xg_build_token_insn): Update TInsn uses.
(md_assemble): Use as_where instead of dwarf2_where.
(xg_assemble_vliw_tokens): Use unsigned line numbers instead of
dwarf2_line_infos. Change to call new_logical_line followed by
dwarf2_emit_insn.
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* config/tc-hppa.c (pa_ip): Use as_bad instead of as_fatal when an
unknown opcode is found.
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tidy up the code.
* config/tc-avr.h: Likewise.
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2005-10-12 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (dot_reg_val): Use expression_and_evaluate.
(dot_pred_rel): Likewise.
(parse_operand): Likewise.
(ia64_unrecognized_line): Likewise.
(md_operand): Likewise.
gas/testsuite/
2005-10-12 Jan Beulich <jbeulich@novell.com>
* gas/ia64/forward.[sd]: New.
* gas/ia64/ia64.exp: Run new test.
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- allowing true forward references (which will always assume the referenced
symbols have at the point of use) through the new .eqv pseudo-op and the
new == operator
- disallowing changing .equiv-generated equates (so that the protection this
provides is both forward and backward)
- snapshotting equates when their value gets changed so that previous uses
don't get affected by the new value.
- allowing expressions in places where absolute expressions (or register
names) are needed which were not completely resolvable at the point of
their definition but which are fully resolvable at the point of use
In addition it fixes PR/288.
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(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
found. Simplify handling of "ma" and "mb" completers.
* hppa.h (FLAG_STRICT): Revise comment.
(pa_opcode): Revise ordering rules. Add/move strict pa10 variants
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
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bfd/
* elf32-arm.c: Move #include "elf/arm.h" after libbfd.h.
(NUM_KNOWN_ATTRIBUTES): Define.
(aeabi_attribute, aeabi_attribute_list): Define.
(elf32_arm_obj_tdata): Add known_eabi_attributes and
other_eabi_attributes.
(uleb128_size, is_default_attr, eabi_attr_size,
elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int,
elf32_arm_add_eabi_attr_compat, copy_eabi_attributes,
elf32_arm_merge_eabi_attributes): New functions.
(elf32_arm_copy_private_bfd_data): Copy EABI object attributes.
(elf32_arm_fake_sections): Handle .ARM.attributes.
(elf32_arm_parse_attributes): New function.
(elf32_arm_section_from_shdr): Use it.
(bfd_elf32_bfd_final_link): Define.
gas/
* config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.
(arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name):
New variables.
(arm_cpu_option_table): Add canonical_name.
(arm_cpus): Populate canonical_name field.
(s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu,
aeabi_set_public_attributes, arm_md_end): New functions.
(md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute".
(md_assemble): Set thumb_arch_used and arm_arch_used.
(md_begin): Set defaut cpu if CPU_DEFAULT not defined.
* config/tc-arm.h (md_end): Define.
* doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute.
gas/testsuite/
* gas/arm/eabi_attr_1.s: New test.
* gas/arm/eabi_attr_1.d: New test.
* gas/arm/arm7t.d: Only disassemble code sections.
* gas/arm/bignum1.d: Ignore Arm object attribute sections.
* gas/arm/mapping.d: Ditto.
* gas/arm/unwind.d: Ditto.
* gas/elf/section0.d: Ditto.
* gas/elf/section1.d: Ditto.
* gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
* gas/elf/section2.e-armeabi: New file.
include/elf/
* arm.h: Add prototypes for BFD object attribute routines.
ld/testsuite/
* ld-arm/arm-rel31.d: Ignore Arm object attribute sections.
* ld-arm/arm-target1-abs.d: Ditto.
* ld-arm/arm-target1-rel.d: Ditto.
* ld-arm/arm-target2-abs.d: Ditto.
* ld-arm/arm-target2-got-rel.d: Ditto.
* ld-arm/arm-target2-rel.d: Ditto.
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(parse_reg_without_prefix): New function.
(parse_reg): Check for '$' register prefix if --allow-reg-prefix is set.
(option md_longopts): Add allow-reg-prefix option.
* doc/c-sh.texi: Document --allow-reg-prefix option.
* NEWS: Mention the new switch.
* gas/sh/basic.exp: Run reg-prefix test.
* gas/sh/reg-prefix.s: New
* gas/sh/reg-prefix.d: New
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2005-09-30 Jan Beulich <jbeulich@novell.com>
* config/tc-tic4x.c (tic4x_set): Advance input_line_pointer past
(removed) comma.
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* Makefile.in: Regenerated.
* aclocal.m4: Regenerated.
* configure: Regenerated.
* configure.in: Bfin support.
* configure.tgt: Bfin support.
* config/bfin-aux.h: New file.
* config/bfin-defs.h: New file.
* config/bfin-lex.l: New file.
* config/bfin-parse.y: New file.
* config/tc-bfin.c: New file.
* config/tc-bfin.h: New file.
* doc/Makefile.am: Recognize c-bfin.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Bfin support.
* doc/as.texinfo: Likewise.
* doc/c-bfin.texi: Document bfin-specific syntax and
directives.
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gas/
* config/tc-arm.c (opcode_tag): Add OT_cinfix3_legacy.
(opcode_lookup): Handle OT_cinfix3_legacy. Revert earlier change for
normal infix conditions.
(C3E): Include Thumb-2 definition.
(CL, cCL): Define.
(insns): Use them for legacy mnemonics.
gas/testsuite/
* gas/arm/fpa-mem.s: Remove incorrect comments.
* gas/arm/fpa-mem.d: Update expected results.
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2005-09-29 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_operands): Always parse first operand of
alloc.
gas/testsuite/
2005-09-29 Jan Beulich <jbeulich@novell.com>
* gas/ia64/alloc.[sl]: New.
* gas/ia64/ia64.exp: Run new test.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Disable signedness check for 4-byte
relocations in 16- and 32-bit modes.
(i386_displacement): Make pc-relative branch handling dependent
upon operand (rather than address) size.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s: Enable all insns.
* gas/i386/mixed-mode-reloc32.d: Adjust.
* gas/i386/mixed-mode-reloc64.d: Adjust.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
(TC_CONS_FIX_NEW): Define unconditionally.
(x86_pe_cons_fix_new): Remove.
* config/tc-i386.c (signed_cons): New.
(md_pseudo_table): Add slong.
(x86_cons_fix_new): Declare unconditionally.
(x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
(tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
conversion.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Also test .slong.
* gas/i386/reloc64.l: Adjust.
* gas/i386/reloc64.d: Adjust.
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* config/arm.c (arm_cpus): Add more cpu names.
* doc/c-arm.texi: Document them.
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with label.
(dwarf2_loc_mark_labels): New.
(dwarf2_gen_line_info_1): Split out of ...
(dwarf2_gen_line_info): ... here. Create the temp symbol here.
(dwarf2_emit_label): New.
(dwarf2_directive_loc_mark_labels): New.
(out_set_addr): Take a symbol instead of frag+ofs.
(relax_inc_line_addr): Likewise.
(emit_inc_line_addr): Assert delta non-negative.
(process_entries): Remove dead code. Update to work with temp
symbols instead of frag+ofs.
* dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare.
(dwarf2_emit_label, dwarf2_loc_mark_labels): Declare.
* config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels.
* config/obj-elf.h (obj_frob_label): New.
* config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label.
* config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c,
config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c:
Similarly in the respective tc_frob_label implementation functions.
* config/tc-i386.c (md_pseudo_table): Move file and loc to
non-elf section; add loc_mark_labels.
* config/tc-ia64.c (struct label_fix): Add dw2_mark_labels.
(ia64_flush_insns): Check for marked labels; emit line entry if so.
(emit_one_bundle): Similarly.
(ia64_frob_label): Record marked labels.
* config/tc-m68hc11.h (tc_frob_label): Remove.
* config/tc-ms1.c (md_pseudo_table): Remove file and loc.
* config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label.
* config/tc-sh64.h (tc_frob_label): Likewise.
* doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
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2005-09-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
registers, floating point control and status words, and mxcsr as
well as (for 64-bit code) segment base registers and rflags.
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* config/tc-msp430.c (msp430_operands): Undo last changes. Instead...
(msp430_relax_frag): add a guard check to ensure that final fr_subtype
has been reached.
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bfd/
* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
opcodes/
* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
* config/tc-arm.c (do_smi, do_t_smi): Rename ...
(do_smc, do_t_smc): ... to this.
(insns): Remane smi to smc.
(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
BFD_RELOC_ARM_SMC.
gas/testsuite/
* gas/arm/arch6zk.d: Rename smi to smc.
* gas/arm/arch6zk.s: Ditto.
* gas/arm/thumb32.d: Ditto.
* gas/arm/thumb32.s: Ditto.
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guard to suppress calling frag_grow if the current instruction is
one that allows a delay slot.
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