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2007-10-122007-10-12 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-9/+13
* config/tc-i386.c (process_operands): Simplify implicit xmm0 handling.
2007-10-12gas/H.J. Lu1-51/+46
2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (process_operands): Check the firstxmm0 field in opcode_modifier for instruction with a implicit xmm0 as the first operand. opcodes/ 2007-10-12 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (opcode_modifiers): Add FirstXmm0. * i386-opc.h (FirstXmm0): New. (IsPrefix): Updated. (i386_opcode_modifier): Add firstxmm0. * i386-opc.tbl (blendvpd): Replace RegKludge with FirstXmm0. (blendvps): Likewise. (pblendvb): Likewise. * i386-tbl.h: Regenerated.
2007-10-12* config/tc-avr.c (mcu_types): Add new devices: AT90PWM2B, AT90PWM3B.Nick Clifton1-0/+2
* doc/c-avr.texi: Document new devices.
2007-10-12* elf32-cr16.c (elf32_cr16_relax_section): Fix condition check typo.Nick Clifton1-1/+1
* config/tc-cr16.c: Update the md_relax_table for 1 word b<cc> instruction range information.
2007-10-11* config/obj-elf.c (obj_elf_section): When pushing a section, if there is aNick Clifton1-2/+10
comma then the following argument must be a subsection number. * testsuite/gas/elf/elf.exp (run_elf_list_test): Run section6 test. * testsuite/gas/elf/section6.s: New file: Check behaviour of .pushsection with a subsection argument. * testsuite/gas/elf/section6.d: New file: Expected disassembly.
2007-10-11PR gas/5161Nick Clifton1-167/+165
* config/tc-ia64.c: Allow for translations of error and warning messages. * po/gas.pot: Regenerate.
2007-10-11PR gas/5158Nick Clifton1-7/+7
* config/tc-h8300.c (tc_gen_reloc): Allow for translation of error message. * po/gas.pot: Regenerate.
2007-10-11PR gas/5155Nick Clifton1-20/+17
* config/tc-msp430.c: Fix spelling typos.
2007-10-08gas/:Maciej W. Rozycki1-24/+47
* config/tc-mips.c (AT): Rename to... (ATREG): ... this. (AT): New definition. (mips_set_options): Rename "noat" to "at"; change the type. (mips_opts): Update accordingly. (append_insn): Likewise. (macro_build_ldst_constoffset): Likewise. (load_address): Likewise. (macro, macro2): Likewise. (s_mipsset): Handle ".set at=REG". Update handling of ".set at" and ".set noat". gas/testsuite/: * gas/mips/at-1.d, gas/mips/at-2.l: New tests to check the ".set at=REG" directive. * gas/mips/at-1.s, gas/mips/at-2.s: Sources for the new tests. * gas/mips/mips.exp: Run the new tests.
2007-10-08PR 5142: Allow for translation of error messagesNick Clifton1-4/+4
2007-10-08PR gas/5121 gas/5122 gas/5123 gas/5124 gas/5125 gas/5126 gas/5129 gas/5131 ↵Nick Clifton6-80/+80
gas/5132 gas/5137 gas/5143 * Makefile.am (CFILES): Add cgen.c (TARGET_CPU_CFILES): Add tc-iq2000.c, tc-maxq.c, tc-mt.c, tc-tic4x.c and xtensa-relax.c. (TARGET_CPU_HFILES): Add tc-iq2000.h, tc-maxq.h, tc-mt.h, tc-tic4x.h and xtensa-relax.h. (TARG_ENV_HFILES): Remove te-aux.h, te-delta.h, te-delt88.h, te-ic960.h, te-linux.h. Add te-aix5.h, te-armeabi.h, te-freebsd.h, te-gnu.h, te-interix.h, te-vxworks.h. (CONFIG_ATOF_CFILES): New variable. (POTFILES): Add CONFIG_ATOF_CFILES to dependencies. Fix typo with dependency upon TARG_ENV_HFILES. (DEPTC): Do not put "#include opcodes/<foo>-desc.h" into cgen-desc.h when foo-desc.h does not exit. Run make dep-am. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * po/POTFILES.in: Regenerate. * po/es.po: Regenerate. * po/fr.po: Regenerate. * po/gas.pot: Regenerate. * po/rw.po: Regenerate. * po/tr.po: Regenerate. * config/obj-elf.c (obj_elf_vtable_inherit): Allow for translation of error messages. * config/obj-som.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-bfin.c: Likewise. * config/tc-frv.c: Likewise.
2007-10-08* config/tc-avr.c (mcu_types): Add new devices: AT90PWM216, AT90PWM316.Nick Clifton1-0/+2
* doc/c-avr.texi: Document new devices.
2007-10-08* config/tc-avr.c (mcu_types): Add new devices: ATtiny43U, ATtiny48.Nick Clifton1-0/+2
* doc/c-avr.texi: Document new devices.
2007-10-08PR gas/5134Nick Clifton1-1/+1
* config/tc-arm.c (md_apply_fix): Likewise.
2007-10-08PR gas/5133Nick Clifton1-1/+1
* config/tc-arm.c (md_apply_fix): Correct error message
2007-10-08PR gas/5135Nick Clifton1-2/+2
(Expr_Node_Gen_Reloc_R): Fix spelling typos in error messages.
2007-10-08PR gas/5136Nick Clifton1-1/+1
* config/tc-bfin.c (md_apply_fix): Fix error message.
2007-10-052007-10-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+5
* config/tc-i386.c (build_modrm_byte): Check the first 2 8bit immediate operands directly for instructions with 4 operands.
2007-10-04gas/H.J. Lu1-1/+5
2007-10-04 H.J. Lu <hongjiu.lu@intel.com> PR gas/5109 * config/tc-i386.c (process_suffix): Clear QWORD suffix if it is ignored in Intel mode. gas/testsuite/ 2007-10-04 H.J. Lu <hongjiu.lu@intel.com> PR gas/5109 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add more tests. * gas/i386/x86-64-simd.s: Likewise.
2007-10-04* read.c (potable): Add string8, string16, string32 and string64. Add bit ↵Nick Clifton11-18/+17
size for stringer function. (stringer_append_char): New. (stringer): Use stringer_append_char(). * config/obj-coff.c (obj_coff_ident): Add bit size for stringer function. * config/obj-elf.c (obj_elf_ident): Likewise. * config/tc-alpha.c (s_alpha_stringer): Likewise. * config/tc-dlx.c (dlx_pseudo_table): Likewise. * config/tc-hppa.c (pa_stringer): Likewise. * config/tc-ia64.c (md_pseudo_table, pseudo_opcode): Likewise. * config/tc-m68hc11.c (md_pseudo_table): Likewise. * config/tc-mcore.c (md_pseudo_table): Likewise. * config/tc-mips.c (mips_pseudo_table): Likewise. * config/tc-spu.c (md_pseudo_table): Likewise. * config/tc-s390.c (md_pseudo_table): Likewise. Replace '2' by '1'. * doc/as.texinfo (ABORT): Fix identing. (String): Document new string8, string16, string32, string64 functions. * NEWS: Mention the new feature. * testsuite/gas/all/gas.exp: Include new test "strings". * testsuite/gas/all/string.s: New * testsuite/gas/all/string.d: New.
2007-10-03PR gas/5078Nick Clifton1-1/+1
* config/tc-avr.c (avr_get_constant): Extend error message to mention that the constant must be positive.
2007-10-03PR gas/5089 * config/tc-arm.c (s_arm_unwind_handlerdata): Fix spelling typo.Nick Clifton1-2/+2
PR gas/5090 (md_assemble): Fix spelling typo.
2007-10-01Various CR16 fixesNick Clifton1-370/+432
2007-09-30gas/H.J. Lu1-6/+8
2007-09-30 H.J. Lu <hongjiu.lu@intel.com> PR gas/5080 * config/tc-i386.c (check_long_reg): Also handle cvttss2si. (check_qword_reg): Also handle cvttsd2si. gas/testsuite/ 2007-09-30 H.J. Lu <hongjiu.lu@intel.com> PR gas/5080 * gas/i386/simd-intel.d: Updated. * gas/i386/simd.d: Likewise. * gas/i386/x86-64-simd-intel.d: Likewise. * gas/i386/x86-64-simd.d: Likewise. * gas/i386/simd.s: Add new tests for cvttsd2si and cvttss2si. * gas/i386/x86-64-simd.s: Likewise.
2007-09-27gas/Kazu Hirata2-5/+6
* config/m68k-parse.h (m68k_register): Use MBO instead of MBB. (last_movec_reg): Change to MBO. * config/tc-m68k.c (fido_ctrl): Use MBO instead of MBB. (m68k_ip): Use MBO instead of MBO. (init_table): Use MBO instead of MBO. Add an entry for mbo. gas/testsuite/ * gas/m68k/fido.s: Add tests for %mbo. * gas/m68k/fido.d: Update accordingly. opcodes/ * m68k-dis.c (print_insn_arg): Use %mbo instead of %mbb.
2007-09-26gas/Jan Beulich1-2/+4
2007-09-26 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (build_modrm_byte): Also check for RegEip when considering IP-relative addressing. gas/testsuite/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * gas/i386/reloc64.s: Adjust for %eip-relative addressing no longer generating errors. * gas/i386/reloc64.d, gas/i386/reloc64.l: Update. * gas/i386/x86-64-addr32.s: Remove explicit addr32 prefix for %eip-realtive addressing case. opcodes/ 2007-09-26 Jan Beulich <jbeulich@novell.com> * i386-opc.h (RegEip): Define. (RegEiz): Adjust. * i386-reg.tbl: Add eip. Mark rip and eip with RegRex64. * i386-tbl.h: Re-generate.
2007-09-26gas/Jan Beulich2-0/+3
2007-09-26 Jan Beulich <jbeulich@novell.com> * config/tc-i386.h (md_register_arithmetic): Define. * config/tc-ia64.h (md_register_arithmetic): Likewise. * doc/internals.texi: Document md_register_arithmetic. * expr.c (make_expr_symbol): Force O_register expressions into reg_section. (expr): Provide default for md_register_arithmetic. Don't resolve adding/subtracting constants to/from registers if md_register_arithmetic is zero.
2007-09-26gas/Jan Beulich1-6/+3
2007-09-26 Jan Beulich <jbeulich@novell.com> * config/tc-ia64.c (dot_pred_rel): Replace specialized handling with simple call to parse_operand.
2007-09-26gas/Jan Beulich1-1/+0
2007-09-26 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (NUM_FLAG_CODE): Remove.
2007-09-26gas/H.J. Lu1-27/+30
2007-09-25 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (output_insn): Use i.tm.opcode_length to check opcode length. opcodes/ 2007-09-25 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (process_i386_opcodes): Process opcode_length. * i386-opc.h (template): Add opcode_length. * 386-opc.tbl: Likewise. * i386-tbl.h: Regenerated.
2007-09-25* config/tc-m68k.c (LONG_BRANCH_VIA_COND): New.Nick Clifton1-8/+43
(BRANCHBWPL, FRAG_VAR_SIZE): New. (md_relax_table): Add BRANCHBWPL entries. (m68k_ip): Choose BRANCHBWPL relaxation if necessary. (md_assemble): Use FRAG_VAR_SIZE. (md_convert_frag_1): Add BRANCHBWPL cases. (md_estimate_size_before_relaz): Likewise. * gas/m68k/br-isaa.d: Dump relocs too. * gas/m68k/br-isab.d: Likewise. * gas/m68k/br-isac.d: Likewise. Adjust for long branch relaxation. Index: gas/config/tc-m68k.c
2007-09-24gas/Carlos O'Donell1-1/+1
2007-09-24 Carlos O'Donell <carlos@codesourcery.com> * config/tc-mips.c (s_align): Set max_alignment to 28. gas/testsuite/ 2007-09-24 Carlos O'Donell <carlos@codesourcery.com> * gas/mips/align.s, gas/mips/align.d: New test. * gas/mips/mips.exp: Run it.
2007-09-20gas/H.J. Lu1-20/+34
2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Removed. (set_allow_index_reg): New. (allow_index_reg): Likewise. (md_pseudo_table): Add "allow_index_reg" and "disallow_index_reg". (build_modrm_byte): Set i.sib.index to NO_INDEX_REGISTER for fake index registers. (i386_scale): Updated. (i386_index_check): Support fake index registers. (parse_real_register): Return NULL on eiz/riz if fake index registers aren't allowed. gas/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * gas/i386/i386.exp: Run sib-intel, x86-64-sib and x86-64-sib-intel. * gas/i386/nops-1-i386-i686.d: Updated. * gas/i386/nops-1-i386.d: Likewise. * gas/i386/nops-1.d: Likewise. * gas/i386/nops-2-i386.d: Likewise. * gas/i386/nops-2-merom.d: Likewise. * gas/i386/nops-2.d: Likewise. * gas/i386/nops-3-i386.d: Likewise. * gas/i386/nops-3.d : Likewise. * gas/i386/sib.d: Likewise. * gas/i386/sib.s: Use %eiz in testcases. * gas/i386/sib-intel.d: New. * gas/i386/x86-64-sib-intel.d: Likewise. * gas/i386/x86-64-sib.d: Likewise. * gas/i386/x86-64-sib.s: Likewise. ld/testsuite/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * ld-i386/tlsbin.dd: Updated. * ld-i386/tlsld1.dd: Likewise. opcodes/ 2007-09-20 H.J. Lu <hongjiu.lu@intel.com> PR 658 * 386-dis.c (index64): New. (index32): Likewise. (intel_index64): Likewise. (intel_index32): Likewise. (att_index64): Likewise. (att_index32): Likewise. (print_insn): Set index64 and index32. (OP_E_extended): Use index64/index32 for index register for SIB with INDEX == 4. * i386-opc.h (RegEiz): New. (RegRiz): Likewise. * i386-reg.tbl: Add eiz and riz. * i386-tbl.h: Regenerated.
2007-09-19* config/tc-h8300.c (md_apply_fix): Do not abort or handle 8 byte fixups.Nick Clifton1-0/+7
2007-09-18 * config/bfin-parse.y (asm_1): Slightly improve error messagesBernd Schmidt1-0/+2
for "reg += const;".
2007-09-18gas/H.J. Lu1-3/+2
2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (baseindex): Removed. (build_modrm_byte): Check reg_num for RIP register instead of reg_type. (i386_index_check): Likewise. opcodes/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (RegRip): New. * i386-reg.tbl (rip): Use RegRip for reg_num. * i386-tbl.h: Regenerated.
2007-09-172007-09-17 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-1/+0
PR gas/5035 * config/obj-coff.c (obj_coff_endef): Remove checking size of def_symbol_in_progress.
2007-09-17gas/H.J. Lu1-3/+0
2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (intel_e04): Revert the last change. gas/testsuite/ 2007-09-17 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-rip.s: Revert the last change. * gas/i386/x86-64-rip-intel.d: Likewise. * gas/i386/x86-64-rip.d: Likewise.
2007-09-15gas/H.J. Lu1-0/+3
2007-09-15 H.J. Lu <hongjiu.lu@intel.com> PR gas/5034 * config/tc-i386.c (intel_e04): Return 1 if cur_token.code is T_NIL. gas/testsuite/ 2007-09-15 H.J. Lu <hongjiu.lu@intel.com> PR gas/5034 * gas/i386/x86-64-rip.s: Add Intel mode testcases. * gas/i386/x86-64-rip-intel.d: Updated. * gas/i386/x86-64-rip.d: Likewise.
2007-09-152007-09-14 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-2/+2
* config/tc-i386.c (build_modrm_byte): Adjust comment line wrap.
2007-09-142007-09-14 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-7/+7
* config/tc-i386.c (build_modrm_byte): Use (A || B) instead of (A || B) != 0.
2007-09-142007-09-14 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-30/+31
* config/tc-i386.c (build_modrm_byte): Adjust indentation.
2007-09-14Add AMD SSE5 supportMichael Meissner2-13/+467
2007-09-12gas/Jan Beulich1-14/+7
2007-09-12 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (md_assemble): Move handling of extrq/insertq after generic operand swapping, and swap only the immediate operands. gas/testsuite/ 2007-09-12 Jan Beulich <jbeulich@novell.com> * gas/i386/amdfam10.s, gas/i386/x86-64-amdfam10.s: Add Intel syntax code. * gas/i386/amdfam10.d, gas/i386/x86-64-amdfam10.d: Adjust.
2007-09-11bfd/Kazu Hirata1-0/+4
* archures.c: Add bfd_mach_mcf_isa_c_nodiv, bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac. * ieee.c (ieee_write_processor): Update coldfire architecture list. * bfd-in2.h: Rebuilt. * cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures. (m68k_arch_features): Likewise. * elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV. (elf32_m68k_print_private_bfd_data): Likewise. gas/ * config/tc-m68k.c (m68k_ip): Add mcfisa_c case. (m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV. include/elf/ * m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-092007-09-09 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-5/+5
* tc-i386.c (output_insn): Only check SSE4.2 and ABM for 3 byte opcode.
2007-09-092007-09-08 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-179/+241
* config/tc-i386.c (cpu_flags_check_x64): Renamed to ... (cpu_flags_check_cpu64): This. Inline. (uints_all_zero): New. (uints_set): Likewise (uints_equal): Likewise (UINTS_ALL_ZERO): Likewise (UINTS_SET): Likewise (UINTS_CLEAR): Likewise (UINTS_EQUAL): Likewise (cpu_flags_and): Likewise. (cpu_flags_or): Likewise. (operand_type_and): Likewise. (operand_type_or): Likewise. (operand_type_xor): Likewise. (cpu_flags_not): Inline and use switch instead of loop. (cpu_flags_match): Updated. (operand_type_match): Likewise. (smallest_imm_type): Likewise. (set_cpu_arch): Likewise. (pt): Likewise. (md_assemble): Likewise. (parse_insn): Likewise. (optimize_imm): Likewise. (match_template): Likewise. (process_suffix): Likewise. (update_imm): Likewise. (finalize_imm): Likewise. (process_operands): Likewise. (build_modrm_byte): Likewise. (i386_immediate): Likewise. (i386_displacement): Likewise. (i386_index_check): Likewise. (i386_operand): Likewise. (i386_target_format): Likewise. (intel_e11): Likewise. (operand_type): Remove implicitregister. (operand_type_check): Updated. Inline. (cpu_flags_all_zero): Removed. (operand_type_all_zero): Likewise. (i386_array_biop): Likewise. (cpu_flags_biop): Likewise. (operand_type_biop): Likewise.
2007-09-09gas/H.J. Lu2-649/+1210
2007-09-08 H.J. Lu <hongjiu.lu@intel.com> * configure.in (AC_CHECK_HEADERS): Add limits.h. * configure: Regenerated. * config.in: Likewise. * config/tc-i386.c: Include "opcodes/i386-init.h". (_i386_insn): Use i386_operand_type for types. (cpu_arch_flags): Updated to new types with bitfield. (cpu_arch_tune_flags): Likewise. (cpu_arch_isa_flags): Likewise. (cpu_arch): Likewise. (i386_align_code): Likewise. (set_code_flag): Likewise. (set_16bit_gcc_code_flag): Likewise. (set_cpu_arch): Likewise. (md_assemble): Likewise. (parse_insn): Likewise. (process_operands): Likewise. (output_branch): Likewise. (output_jump): Likewise. (parse_real_register): Likewise. (mode_from_disp_size): Likewise. (smallest_imm_type): Likewise. (pi): Likewise. (type_names): Likewise. (pt): Likewise. (pte): Likewise. (swap_2_operands): Likewise. (optimize_imm): Likewise. (optimize_disp): Likewise. (match_template): Likewise. (check_string): Likewise. (process_suffix): Likewise. (check_byte_reg): Likewise. (check_long_reg): Likewise. (check_qword_reg): Likewise. (check_word_reg): Likewise. (finalize_imm): Likewise. (build_modrm_byte): Likewise. (output_insn): Likewise. (disp_size): Likewise. (imm_size): Likewise. (output_disp): Likewise. (output_imm): Likewise. (gotrel): Likewise. (i386_immediate): Likewise. (i386_displacement): Likewise. (i386_index_check): Likewise. (i386_operand): Likewise. (parse_real_register): Likewise. (i386_intel_operand): Likewise. (intel_e09): Likewise. (intel_bracket_expr): Likewise. (intel_e11): Likewise. (cpu_arch_flags_not): New. (cpu_flags_check_x64): Likewise. (cpu_flags_all_zero): Likewise. (cpu_flags_not): Likewise. (i386_cpu_flags_biop): Likewise. (cpu_flags_biop): Likewise. (cpu_flags_match); Likewise. (acc32): New. (acc64): Likewise. (control): Likewise. (reg16_inoutportreg): Likewise. (disp16): Likewise. (disp32): Likewise. (disp32s): Likewise. (disp16_32): Likewise. (anydisp): Likewise. (baseindex): Likewise. (regxmm): Likewise. (imm8): Likewise. (imm8s): Likewise. (imm16): Likewise. (imm32): Likewise. (imm32s): Likewise. (imm64): Likewise. (imm16_32): Likewise. (imm16_32s): Likewise. (imm16_32_32s): Likewise. (operand_type): Likewise. (operand_type_check): Likewise. (operand_type_match): Likewise. (operand_type_register_match): Likewise. (update_imm): Likewise. (set_code_flag): Also update cpu_arch_flags_not. (set_16bit_gcc_code_flag): Likewise. (md_begin): Likewise. (parse_insn): Use cpu_flags_check_x64 to check 64bit support. Use cpu_flags_match to match instructions. (i386_target_format): Update cpu_arch_isa_flags and cpu_arch_tune_flags to i386_cpu_flags type with bitfield. (smallest_imm_type): Check cpu_arch_tune to tune for i486. (match_template): Don't initialize overlap0, overlap1, overlap2, overlap3 and operand_types. (process_suffix): Handle crc32 with 64bit register. (MATCH): Removed. (CONSISTENT_REGISTER_MATCH): Likewise. * config/tc-i386.h (arch_entry): Updated to i386_cpu_flags type. opcodes/ 2007-09-08 H.J. Lu <hongjiu.lu@intel.com> * configure.in (AC_CHECK_HEADERS): Add limits.h. * configure: Regenerated. * config.in: Likewise. * i386-gen.c: Include "sysdep.h" instead of <stdlib.h> and <string.h>. Use xstrerror instead of strerror. (initializer): New. (cpu_flag_init): Likewise. (bitfield): Likewise. (BITFIELD): New. (cpu_flags): Likewise. (opcode_modifiers): Likewise. (operand_types): Likewise. (compare): Likewise. (set_cpu_flags): Likewise. (output_cpu_flags): Likewise. (process_i386_cpu_flags): Likewise. (output_opcode_modifier): Likewise. (process_i386_opcode_modifier): Likewise. (output_operand_type): Likewise. (process_i386_operand_type): Likewise. (set_bitfield): Likewise. (operand_type_init): Likewise. (process_i386_initializers): Likewise. (process_i386_opcodes): Call process_i386_opcode_modifier to process opcode_modifier. Call process_i386_operand_type to process operand_types. (process_i386_registers): Call process_i386_operand_type to process reg_type. (main): Check unused bits in i386_cpu_flags and i386_operand_type. Sort cpu_flags, opcode_modifiers and operand_types. Call process_i386_initializers. * i386-init.h: New. * i386-tbl.h: Regenerated. * i386-opc.h: Include <limits.h>. (CHAR_BIT): Define as 8 if not defined. (Cpu186): Changed to position of bitfiled. (Cpu286): Likewise. (Cpu386): Likewise. (Cpu486): Likewise. (Cpu586): Likewise. (Cpu686): Likewise. (CpuP4): Likewise. (CpuK6): Likewise. (CpuK8): Likewise. (CpuMMX): Likewise. (CpuMMX2): Likewise. (CpuSSE): Likewise. (CpuSSE2): Likewise. (Cpu3dnow): Likewise. (Cpu3dnowA): Likewise. (CpuSSE3): Likewise. (CpuPadLock): Likewise. (CpuSVME): Likewise. (CpuVMX): Likewise. (CpuSSSE3): Likewise. (CpuSSE4a): Likewise. (CpuABM): Likewise. (CpuSSE4_1): Likewise. (CpuSSE4_2): Likewise. (Cpu64): Likewise. (CpuNo64): Likewise. (D): Likewise. (W): Likewise. (Modrm): Likewise. (ShortForm): Likewise. (Jump): Likewise. (JumpDword): Likewise. (JumpByte): Likewise. (JumpInterSegment): Likewise. (FloatMF): Likewise. (FloatR): Likewise. (FloatD): Likewise. (Size16): Likewise. (Size32): Likewise. (Size64): Likewise. (IgnoreSize): Likewise. (DefaultSize): Likewise. (No_bSuf): Likewise. (No_wSuf): Likewise. (No_lSuf): Likewise. (No_sSuf): Likewise. (No_qSuf): Likewise. (No_xSuf): Likewise. (FWait): Likewise. (IsString): Likewise. (RegKludge): Likewise. (IsPrefix): Likewise. (ImmExt): Likewise. (NoRex64): Likewise. (Rex64): Likewise. (Ugh): Likewise. (Reg8): Likewise. (Reg16): Likewise. (Reg32): Likewise. (Reg64): Likewise. (FloatReg): Likewise. (RegMMX): Likewise. (RegXMM): Likewise. (Imm8): Likewise. (Imm8S): Likewise. (Imm16): Likewise. (Imm32): Likewise. (Imm32S): Likewise. (Imm64): Likewise. (Imm1): Likewise. (BaseIndex): Likewise. (Disp8): Likewise. (Disp16): Likewise. (Disp32): Likewise. (Disp32S): Likewise. (Disp64): Likewise. (InOutPortReg): Likewise. (ShiftCount): Likewise. (Control): Likewise. (Debug): Likewise. (Test): Likewise. (SReg2): Likewise. (SReg3): Likewise. (Acc): Likewise. (FloatAcc): Likewise. (JumpAbsolute): Likewise. (EsSeg): Likewise. (RegMem): Likewise. (OTMax): Likewise. (Reg): Commented out. (WordReg): Likewise. (ImplicitRegister): Likewise. (Imm): Likewise. (EncImm): Likewise. (Disp): Likewise. (AnyMem): Likewise. (LLongMem): Likewise. (LongMem): Likewise. (ShortMem): Likewise. (WordMem): Likewise. (ByteMem): Likewise. (CpuMax): New (CpuLM): Likewise. (CpuNumOfUints): Likewise. (CpuNumOfBits): Likewise. (CpuUnused): Likewise. (OTNumOfUints): Likewise. (OTNumOfBits): Likewise. (OTUnused): Likewise. (i386_cpu_flags): New type. (i386_operand_type): Likewise. (i386_opcode_modifier): Likewise. (CpuSledgehammer): Removed. (CpuSSE4): Likewise. (CpuUnknownFlags): Likewise. (Reg): Likewise. (WordReg): Likewise. (ImplicitRegister): Likewise. (Imm): Likewise. (EncImm): Likewise. (Disp): Likewise. (AnyMem): Likewise. (LLongMem): Likewise. (LongMem): Likewise. (ShortMem): Likewise. (WordMem): Likewise. (ByteMem): Likewise. (template): Use i386_cpu_flags for cpu_flags, use i386_opcode_modifier for opcode_modifier, use i386_operand_type for operand_types. (reg_entry): Use i386_operand_type for reg_type. * Makefile.am (HFILES): Add i386-init.h. ($(srcdir)/i386-init.h): New rule. ($(srcdir)/i386-tbl.h): Depend on $(srcdir)/i386-init.h instead. * Makefile.in: Regenerated.
2007-09-06gas/H.J. Lu1-4/+16
2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (match_template): Handle invlpga, vmload, vmrun and vmsave in SVME. (process_suffix): Likewise. gas/testsuite/ 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/svme.s: Updated to allow eax in 64bit. * gas/i386/svme.d: Updated. * gas/i386/svme64.d: Likewise. opcodes/ 2007-09-06 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Correct SVME instructions to allow 32bit register operand in 64bit mode. * i386-tbl.h: Regenerated.
2007-09-052007-09-05 H.J. Lu <hongjiu.lu@intel.com>H.J. Lu1-4/+5
* config/tc-i386.c (i386_index_check): Don't use RegRex on the reg_type field. (parse_real_register): Use `||' instead of `|'.
generated by cgit v1.1 at 2024-11-28 12:33:55 +0000