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Sept 1999; RVA relocs need to be treated more like DIR32 relocs
for cygwin import libraries to work properly.
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for m68hc11 and m68hc12 processors.
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Explicitly mention `;' in line_separator_chars in each backend.
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is the integer register $r28, vs. both $r28 and the floating point
register $f28.
This quiets a bogus warning about needing ".set noat".
Approved by: Nick Clifton <nickc@cygnus.com>
Message-Id: <200006081749.KAA12558@elmo.cygnus.com>
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* config/tc-ia64.c (generate_unwind_image): Call ia64_flush_insns.
(dot_endp): Don't call ia64_flush_insns.
(emit_one_bundle): Don't delete prologue/body records from
unwind_record list in first loop. Rewrite second loop to account for
this.
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* config/tc-ia64.c: Add missing prototypes.
(generate_unwind_image): Cast argument to output_unw_records call.
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(REGISTER_P): likewise.
(avr_opcodes): uses include/opcode/avr.h
(avr_operand): enable ld r,Z or st r,Z for at90s1200.
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correctly.
mrs lr, spsr
The string pointer is advanced to far before the check to set
the SPSR bit.
Thu Jun 01 2000 Scott Bambrough <scottb@netwinder.org>
* config/tc-arm.c (do_mrs): Allow SPSR_BIT to be set correctly.
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it is modified, and use the real_size to compute the frag address
for dwarf2 line info.
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(md_longopts): Add -relax and -no-relax options.
(md_parse_options, md_show_usage): Likewise.
(md_apply_fix3): Optimize tail call into branch always if possible.
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* config/tc-ia64.c (dot_restorereg_p): New function.
(md_pseudo_table): Add restorereg.p.
...
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md_estimate_size_before_relax, replacing old kludge.
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(pseudo_func): Add pcrel.
(operand_match): Handle IA64_OPND_TGT64.
(build_insn): Likewise.
(md_begin): Initialize pseudo_func[FUNC_PC_RELATIVE].
(ia64_gen_real_reloc_type): Handle FUNC_PC_RELATIVE.
(fix_insn): Handle all three 64-bit relocation types.
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s_set_other, s_set_desc, s_get_type, s_set_type,
separate_stab_sections, init_stab_section.
* config/obj-multi.h: Update GPL notice to v2.
(obj_begin): New.
(obj_app_file): New.
(S_SET_SIZE): Test s_set_size for NULL before calling.
(S_SET_ALIGN): Similar for s_set_align.
(S_SET_OTHER): New.
(S_SET_DESC): New.
(S_GET_TYPE): New.
(S_SET_TYPE): New.
(SEPARATE_STAB_SECTIONS): New.
(INIT_STAB_SECTION): New.
(EMIT_SECTION_SYMBOLS): New.
(AOUT_STABS) [OBJ_MAYBE_AOUT]: Define.
* config/obj-elf.h: Update GPL notice to v2.
Mention that this file is included from obj-multi.h.
(obj_begin): Wrap definition in ifndef.
(elf_file_symbol): Constify declaration.
(obj_app_file): Ditto.
(SEPARATE_STAB_SECTIONS, INIT_STAB_SECTION, OBJ_PROCESS_STAB):
Wrap in ifndef SEPARATE_STAB_SECTIONS.
* config/obj-elf.c (elf_s_set_other): New.
(elf_file_symbol): Constify argument.
(elf_separate_stab_sections): New.
(elf_init_stab_section): New.
(elf_format_ops): Add new members. Remove comma at end.
* config/obj-ecoff.c (ecoff_separate_stab_sections): New.
(ecoff_format_ops): Add new fields. Remove comma at end.
Mention inconsistency for emit_section_symbols.
* config/obj-coff.h (c_dot_file_symbol): Constify declaration.
* config/obj-coff.c (c_dot_file_symbol): Constify argument.
(coff_separate_stab_sections): New.
(coff_format_ops): Add new members.
* config/obj-aout.c (obj_aout_sec_sym_ok_for_reloc): New.
(obj_aout_s_set_other): New.
(obj_aout_s_set_desc): New.
(obj_aout_s_get_type): New.
(obj_aout_s_set_type): New.
(obj_aout_separate_stab_sections): New.
(aout_format_ops): New members added. Use obj_aout_process_stab,
not 0. Use obj_aout_sec_sym_ok_for_reloc, not 0.
(obj_aout_frob_symbol): Add ATTRIBUTE_UNUSED to args as
appropriate.
(obj_aout_line, obj_aout_weak, obj_aout_type): Ditto.
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instruction to reflect change in re_assemble_*.
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Don't rely on short being 16 bits.
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Remove useless -m flag_do_long_jump from x86 gas.
If BFD_ASSEMBLER, store --defsym value in a bfd_vma, and use scan_bfd_vma.
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(mn10300_finalize): Declare.
* config/tc-mn10300.c: Include dwarf2dbg.h.
(debug_line): Define.
(md_assemble): Generate dwarf2 line info.
(mn10300_finalize): New function. Finalize dwarf2 info.
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the relocation for weak symbols.
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* config/tc-ia64.c (output_P7_format, case mem_stack_f): Output fixed
frame size in units of 16 bytes, as required per SW Conventions manual.
(output_unw_records): Output info-block header as a dword to get
byte-order right.
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unit registers.
(md_parse_option): Recognize -m7400.
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don't permit lp to become less than the words array.
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it now compiles even if it doesn't work too well.
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More comments added.
(md_begin): Removed "construct symbols for each register name".
Because register names conflicts with GCC generated function
names.
(avr_operand): Now constant numbers can be used as a register
identifiers (0 as r0, 31 as r31).
(md_assemble): use skip_space () before parsing instruction
operands.
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(md_assemble): Handle opcodes with optional operands (lpm,elpm).
(avr_operand): Handle 'a', 'v' and 'z' constraint letters needed
for `fmul', `movw' and `lpm R,Z' instructions.
(avr_operands): Warn if current opcode is a two-word instruction
and previous opcode was cpse/sbic/sbis/sbrc/sbrs.
(avr_opcodes): New commands added.
(REGISTER_P): Check 'a' and 'v' constraint letters.
(mcu_types): New MCU added.
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bfd:
* Makefile.am (coff64-rs6000.lo): New rule.
* Makefile.in: Regenerate.
* coff-rs6000.c (xcoff_mkobject, xcoff_copy_private_bfd_data,
xcoff_is_local_label_name, xcoff_rtype2howto,
xcoff_reloc_type_lookup, xcoff_slurp_armap, xcoff_archive_p,
xcoff_read_ar_hdr, xcoff_openr_next_archived_file, xcoff_write_armap,
xcoff_write_archive_contents): No longer static, and prefix with _bfd_.
(NO_COFF_SYMBOLS): Define.
(xcoff64_swap_sym_in, xcoff64_swap_sym_out, xcoff64_swap_aux_in,
xcoff64_swap_aux_out): New functions; handle xcoff symbol tables
internally.
(MINUS_ONE): New macro.
(xcoff_howto_tabl, xcoff_reloc_type_lookup): Add 64 bit POS
relocation.
(coff_SWAP_sym_in, coff_SWAP_sym_out, coff_SWAP_aux_in,
coff_SWAP_aux_out): Map to the new functions.
* coff64-rs6000.c: New file.
* libcoff.h (bfd_coff_backend_data): Add new fields
_bfd_coff_force_symnames_in_strings and
_bfd_coff_debug_string_prefix_length.
(bfd_coff_force_symnames_in_strings,
bfd_coff_debug_string_prefix_length): New macros for above fields.
* coffcode.h (coff_set_arch_mach_hook): Handle XCOFF64 magic.
Set machine to 620 for XCOFF64. Use bfd_coff_swap_sym_in instead
of using coff_swap_sym_in directly.
(FORCE_SYMNAMES_IN_STRINGS): New macro, defined for XCOFF64.
(coff_set_flags) Set magic for XCOFF64.
(coff_compute_section_file_positions): Add symbol name length to
string section length if bfd_coff_debug_string_prefix_length is
true.
(coff_write_object_contents): Don't do reloc overflow for XCOFF64.
(coff_slurp_line_table): Use bfd_coff_swap_lineno_in instead of
using coff_swap_lineno_in directly.
(bfd_coff_backend_data): Add _bfd_coff_force_symnames_in_strings
and _bfd_coff_debug_string_prefix_length fields.
* coffgen.c (coff_fix_symbol_name, coff_write_symbols): Force
symbol names into strings table when
bfd_coff_force_symnames_in_strings is true.
* coffswap.h (MAX_SCNHDR_NRELOC, MAX_SCNHDR_NLNNO, GET_RELOC_VADDR,
SET_RELOC_VADDR): New macros.
(coff_swap_reloc_in, coff_swap_reloc_out): Use above macros.
(coff_swap_aux_in, coff_swap_aux_out): Remove RS6000COFF_C
code.
(coff_swap_aouthdr_in, coff_swap_aouthdr_out): Handle XCOFF64
changes within RS6000COFF_C specific code.
(coff_swap_scnhdr_out): Use PUT_SCNHDR_NLNNO, PUT_SCNHDR_NRELOC,
MAX_SCNHDR_NRELOC, and MAX_SCNHDR_NLNNO.
* reloc.c (bfd_perform_relocation, bfd_install_relocation):
Extend existing hack on target name.
* xcofflink.c (XCOFF_XVECP): Extend existing hack on
target name.
* coff-tic54x.c (ticof): Keep up to date with new fields
in bfd_coff_backend_data.
* config.bfd: Add bfd_powerpc_64_arch to targ_arch and define
targ_selvecs to include rs6000coff64_vec for rs6000.
* configure.in: Add rs6000coff64_vec case.
* cpu-powerpc.c: New bfd_arch_info_type.
gas:
* as.c (parse_args): Allow md_parse_option to override -a listing
option.
* config/obj-coff.c (add_lineno): Change type of offset parameter
from "int" to "bfd_vma."
* config/tc-ppc.c (md_pseudo_table): Add "llong" and "machine."
(ppc_mach, ppc_subseg_align, ppc_target_format): New.
(ppc_change_csect): Align correctly for XCOFF64.
(ppc_machine): New function, which discards "ppc_machine" line.
(ppc_tc): Cons for 8 when code is 64 bit.
(md_apply_fix3): Don't check operand->insert. Handle 64 bit
relocations.
(md_parse_option): Handle -a64 and -a32.
(ppc_xcoff64): New.
* config/tc-ppc.h (TARGET_MACH): Define.
(TARGET_FORMAT): Move to function.
(SUB_SEGMENT_ALIGN): Use ppc_subseg_align.
include:
* include/coff/rs6k64.h: New file.
opcodes:
* configure.in: Add bfd_powerpc_64_arch.
* disassemble.c (disassembler): Use print_insn_big_powerpc for
64 bit code.
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Fix as.1 typo.
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Remove incomplete v5e code from tc-arm.c
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