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symbols.
* config/tc-mips.c (md_apply_fix): Adjust accordingly.
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* config/tc-mn10300.c (r_registers): Add missing registers.
(xr_registers): New set of registers.
(xr_register_name): New function.
(md_assemble): Handle XRREG and PLUS operands. Tweak handling of
RREG operand insertion. Handle new D6 and D7 instruction formats.
end-sanitize-am33
* config/tc-mn10300.c (mn10300_insert_operand): Do not hardcode the
shift amount for a repeated operand. The shift amount for the
repeated copy comes from the size of the operand.
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(r_register_name): New function.
(md_assemble): Handle new am33 operand types.
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section vma.
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and .quad directives.
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lower insn is missing.
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* config/tc-i386.h: Change Data16 to Size16, Data32 to Size32,
IgnoreDataSize to IgnoreSize as they are used for address size as
well as data size.
* config/tc-i386.c: Likewise. Add code to reject addr32/data32 in
32-bit mode, similarly addr16/data16 and variants.
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PR 16132.
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* config/tc-i386.c: REPNE renamed to REPNE_PREFIX_OPCODE, and
likewise for REPE.
* config/tc-i386.c (reloc): Add braces.
* config/tc-i386.c (struct _i386_insn): Rename bi to sib to be
consistent with Intel naming.
* config/tc-i386.h (base_index_byte): Rename to sib_byte. Don't
use bitfields in sib_byte.
(modrm_byte): Don't use bitfields here either.
* config/tc-i386.c (current_templates): Add const.
(parse_register): Add const to return, param, and char *s.
(i386_operand): Add const to reg_entry *r.
* config/tc-i386.h (templates): Add const to start, end.
Inspired by code for 16 bit gas support from Martynas Kunigelis
<martynas@nm3.ktu.lt>:
* config/tc-i386.c (md_assemble): Add full support for 16 bit
modrm, and Jump, JumpByte, JumpDword, JumpInterSegment insns.
(uses_mem_addrmode): Remove.
(md_estimate_size_before_relax): Add support here too.
(md_relax_table): Rewrite interface to md_relax for 16 bit
support.
(BYTE, WORD, DWORD, UNKNOWN_SIZE): Remove.
(opcode_suffix_to_type): Remove.
(CODE16, SMALL, SMALL16, BIG, BIG16): Define.
(SIZE_FROM_RELAX_STATE): Modify to suit above.
(md_convert_frag): Likewise.
(i386_operand): Add support for 16 bit base/index regs,
immediates, and displacements. Remove some unnecessary casts, and
localise end_of_operand_string, displacement_string_start,
displacement_string_end variables. Add GCC_ASM_O_HACK.
* config/tc-i386.h (NO_BASE_REGISTER_16): Define.
* config/tc-i386.c (prefix_hash): Remove.
(md_begin): Rewrite without obstacks. Remove prefix hash table
handling. Rewrite lexical table handling.
(i386_print_statistics): Don't print prefix statistics.
(md_assemble): Rewrite instruction parser so that line is not
converted to lower case. Don't do a hash_find for prefixes,
instead recognise them via opcode modifier.
(expecting_operand, paren_not_balanced): Localise variables.
* config/tc-i386.h (IsPrefix): Define.
(prefix_entry): Remove.
* config/tc-i386.h (PREFIX_SEPERATOR): Don't define.
* config/tc-i386.c (PREFIX_SEPARATOR): Define here instead, using
'\\' in case where comment_chars contains '/'.
* config/tc-i386.c (MATCH): Ensure given operand and template
match for JumpAbsolute. Makes e.g. `ljmp table(%ebx)' invalid;
you must write `ljmp *table(%ebx)'.
From H.J. Lu <hjl@gnu.org>:
* config/tc-i386.c (BFD_RELOC_16, BFD_RELOC_16_PCREL): Define
as 0 ifndef BFD_ASSEMBLER.
(md_assemble): Allow immediate operands without suffix or
other reg operand to default in size to the current code size.
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* config/tc-v850.c (md_begin): Restore creation of
.call_table_text and .call_table_data sections.
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* config/tc-i386.c (mode_from_disp_size): Disp16 is mode 2.
(i386_operand): Simplify checks for valid base/index combinations.
Disallow `in 4(%dx),%al'.
* config/tc-i386.c (struct _i386_insn): Make regs, base_reg, and
index_reg const.
(add_prefix): Change parameter from char to int.
* config/tc-i386.h (Ugh): Define opcode modifier.
* config/tc-i386.c (md_assemble): Print warnings for Ugh insns.
* config/tc-i386.c (md_assemble): Rewrite MATCH and
CONSISTENT_REGISTER_MATCH macros to check register types more
thoroughly. Check for illegal suffix/operand combinations
when matching insns with operands. Handle new `s' suffix, and
associated FloatMF opcode modifier for float insns with memory
operands.
* config/tc-i386.h (FloatMF): Define new opcode modifier.
(No_sSuf, No_bSuf, No_wSuf, No_lSuf): Likewise.
(SHORT_OPCODE_SUFFIX, LONG_OPCODE_SUFFIX): Define.
* config/tc-i386.c: Rename WORD_PREFIX_OPCODE to
DATA_PREFIX_OPCODE throughout.
* config/tc-i386.c (REGISTER_WARNINGS): Define.
(md_assemble): Rewrite suffix/register operand checking code to be
more thorough. Remove Abs8,16,32. Change occurrences of Mem to
AnyMem, the better to grep.
(pi): Remove Abs.
(i386_operand): Don't set Mem bits in i.types[this_operand] when
given a memory operand. Don't set Abs bits either.
(type_names): Remove Mem*, Abs*.
* config/tc-i386.h (Mem8, Mem16, Mem32, Abs8, Abs16, Abs32): Don't
define opcode_modifiers as these cases are handled by Disp8,
Disp16, Disp32 and suffix checks.
(COMES_IN_BOTH_DIRECTIONS): Remove.
(FloatR): Define. It's OK to share the bit with ReverseRegRegmem.
* config/tc-i386.c (md_assemble): Don't emit operand size prefix
if IgnoreDataSize modifier given. Remove ShortformW modifier
test. Add test for ShortForm in W base_opcode modification.
Merge Seg2ShortForm and Seg3ShortForm code.
* config/tc-i386.h (ShortFormW): Remove.
(IgnoreDataSize): Define.
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* config/tc-i386.c (END_STRING_AND_SAVE): Protect arguments of
macros and enclose in do while(0).
(RESTORE_END_STRING): Likewise.
(md_assemble): Add one to printed operand number so we start
from 1 not 0. Add some more gettext invocations.
(i386_operand): Fix `%%s' -> `%%%s'. Inc printed operand
number here too.
* config/tc-i386.h (WAIT_PREFIX, LOCKREP_PREFIX, ADDR_PREFIX,
DATA_PREFIX, SEG_PREFIX): Define.
* config/tc-i386.c (struct _i386_insn): Remove wait_prefix field.
(check_prefix): Remove function.
(add_prefix): New function. Add prefix to i.prefix as well as
doing checks.
(md_assemble): Changes for add_prefix. Remove hack for wait
prefix, instead always output prefixes in fixed order. Test
for jcxz/loop when selecting between word & dword operations,
and add address size prefix rather than operand size prefix.
Remove operand -> address size hack when emitting jcxz/loop.
(i386_operand): Remove O_Absent check as it's done in expr.
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* config/tc-i386.c (SCALE1_WHEN_NO_INDEX): Define.
(ebp, esp): Remove static variables.
(MATCH): Remove test for InOutPortReg.
(i386_operand): Properly handle InOutPortReg here instead.
Disallows `inb (%dx,2)', `inb %es:(%dx)' and `mov (%dx),%ax'
(md_assemble): Simplify and correct modrm and sib generation.
(i386_operand): Add warning for scale without index.
Rewrite checks for valid base/index combinations.
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(create_vuoverlay_section): Entries are 4 bytes not 8.
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reorder block as soon as possible.
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* config/tc-alpha.c (s_alpha_comm): Allow alignment parameter in
OBJ_EVAX case.
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(s_func): Call it.
* config/tc-dvp.c (md_pseudo_table): Add .func/.endfunc.
(s_dvp_func): New function.
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* config/te-go32.h (TE_GO32): Define.
* config/tc-i386.h (LOCAL_LABEL): Don't define if TE_GO32.
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(VUOVERLAY_SECTION_PREFIX,VUOVERLAY_TABLE_SECTION_NAME): Delete.
* config/tc-dvp.c (vuoverlay_string_section): New static global.
(md_begin): Create overlay string section.
(create_vuoverlay_section): Put section name in overlay string section.
Put string's offset in overlay table entry.
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* config/tc-alpha.h (WORKING_DOT_WORD): Define.
* config/tc-arm.h (WORKING_DOT_WORD): Define.
* config/tc-h8300.h (WORKING_DOT_WORD): Define.
* config/tc-h8500.h (WORKING_DOT_WORD): Define.
* config/tc-hppa.h (WORKING_DOT_WORD): Define.
* config/tc-i860.h (WORKING_DOT_WORD): Define.
* config/tc-i960.h (WORKING_DOT_WORD): Define.
* config/tc-tic30.h (WORKING_DOT_WORD): Define.
* config/tc-w65.h (WORKING_DOT_WORD): Define.
* config/tc-z8k.h (WORKING_DOT_WORD): Define.
* config/tc-a29k.c: Don't define md_short_jump_size,
md_long_jump_size, md_create_short_jump or md_create_long_jump.
* config/tc-alpha.c: Likewise.
* config/tc-alpha.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-h8500.c: Likewise.
* config/tc-hppa.c: Likewise.
* config/tc-i860.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sparc.h: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-w65.c: Likewise.
* config/tc-z8k.c: Likewise.
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* config/tc-vax.c (_): Delete this macro used for placeholder
values in vax_operand_width_size; it conflicts with the _() macro
used for internationalization.
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(build_mri_control_operand): Call mri_assemble rather than
md_assemble.
(s_mri_else, s_mri_break, s_mri_next, s_mri_for): Likewise.
(s_mri_endf, s_mri_endw): Likewise.
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(dvp_frob_file): Declare.
(tc_frob_file): Define.
(VUOVERLAY_SECTION_PREFIX,VUOVERLAY_TABLE_SECTION_NAME): New macros.
* config/tc-dvp.c (VUOVERLAY_START_PREFIX): New macro.
(vuoverlay_section_name,create_vuoverlay_section): New functions.
(vuoverlay_section,vuoverlay_table_section): New static globals.
(ovlysym_table): New static global.
(md_begin): Create .vuoverlay_table section.
(assemble_vif): Call create_vuoverlay_section for each mpg.
(dvp_frob_label): Record vu labels in ovlysym_table for later
movement from absolute section to their overlay section.
(dvp_frob_file): New function.
(md_apply_fix3): For 8/16/32/64 bit relocs, only process if fx_done.
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write data in sparc_handle_align.
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Removed documentation about the switch.
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Mon May 18 12:37:38 1998 Frank Ch. Eigler <fche@cygnus.com>
* config/tc-mips.c (macro): For R5900, use "B" operand format for
"break" instructions generated in macro (div etc.) instructions.
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(OPTION_WARN_PARALLEL): Rename from OPTION_WARN.
(OPTION_NO_WARN_PARALLEL): Rename from OPTION_NO_WARN.
(md_longopts): Recognize --{no-,}warn-unmatched-high.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
(m32r_frob_file): Likewise.
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(d30v_current_align, d30v_current_align_seg): New variables.
(d30v_last_label): New variable.
(d30v_align, s_d30v_align, s_d30v_text): New functions.
(s_d30v_data, s_d30v_section): Likewise.
(md_pseudo_table): Call them.
(md_begin): Initialize d30v_current_align_seg.
(md_assemble): Call d30v_align when needed by known current alignment.
(d30v_frob_label, d30v_cons_align): New functions.
* config/tc-d30v.h (md_do_align): Remove.
(tc_frob_label): Call d30v_frob_label.
(md_cons_align): New.
PR 15642
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* First batch of fixes for sky PR 15853 (20-bit break/sdbbp)
* Fixes for d30v test suite.
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* cgen.c: Include it.
(MAX_FIXUPS): Renamed to CGEN_MAX_FIXUPS.
(cgen_asm_finish_insn): Result is now void. New arg `result'.
All callers updated.
* config/tc-m32r.c: Include cgen.h.
(m23r_insn): New members num_fixups,fixups.
(assemble_parallel_insn): Initialize debug_sym_link for each insn.
(md_assemble): Simplify code to pack two insns in parallel.
When swapping two insns, update their fixups.
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a short format insn.
(md_assemble): Set it for explicitly packed insns.
PR 14601
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* config/tc-m32r.c (assemble_parallel_insn): No need to try
non-relaxable variant any more. Simplify test for nop insn.
(md_assemble): Only scan operands if m32rx. Set orig_insn in case
scan of operands yields an insn different from original (e.g. a macro).
Fix call to can_make_parallel.
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* read.c (s_set): Cast xmalloc return value to fragS *.
* config/tc-m68k.c (m68k_ip): Function made static to match
previous forward declaration.
(insert_reg, init_regtable, md_convert_frag_1): Likewise.
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