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2012-08-17Add AMD btver1 and btver2 supportH.J. Lu2-2/+9
gas/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. (i386_align_code): Add case for PROCESSOR_BT. * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT. * doc/c-i386.texi: Add -march={btver1, btver2} options. gas/testsuite/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * gas/i386/i386.exp: Run btver1 and btver2 test cases. * gas/i386/nops-1-btver1.d: New. * gas/i386/nops-1-btver2.d: New. * gas/i386/arch-10-btver1.d: New. * gas/i386/arch-10-btver2.d: New. * gas/i386/x86-64-nops-1-btver1.d: New. * gas/i386/x86-64-nops-1-btver2.d: New. * gas/i386/x86-64-arch-2-btver1.d: New. * gas/i386/x86-64-arch-2-btver2.d: New. opcodes/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. * i386-opc.h: Update CpuPRFCHW comment. * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
2012-08-14Terminate register name when reporting bad registerH.J. Lu1-0/+6
gas/ PR gas/14457 * config/tc-i386.c (i386_att_operand): Terminate register name when reporting bad register. gas/testsuite/ PR gas/14457 * gas/i386/i386.exp: Run reg-bad. * gas/i386/reg-bad.l: New. * gas/i386/reg-bad.s: Likewise.
2012-08-14 * config/tc-mmix.c (loc_asserts): New variable.Hans-Peter Nilsson1-5/+99
(mmix_greg_internal): Handle expressions not determinable at first pass. (s_loc): Ditto. Record expressions where the section isn't determinable at the first pass, and assume they don't refer to other sections. (mmix_md_end): Verify that recorded LOC expressions weren't to other sections, else emit error messages.
2012-08-13Add support for 64-bit ARM architecture: AArch64Nick Clifton2-0/+7580
2012-08-13 include/opcode/Maciej W. Rozycki1-39/+2
* mips.h (mips_opcode): Add the exclusions field. (OPCODE_IS_MEMBER): Remove macro. (cpu_is_member): New inline function. (opcode_is_member): Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Update comment. * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor instructions for IOCT as appropriate. * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with opcode_is_member. * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with the result of a check for the -Wno-missing-field-initializers GCC option. * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable. (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to compilation. (mips16-opc.lo): Likewise. (micromips-opc.lo): Likewise. * aclocal.m4: Regenerate. * configure: Regenerate. * Makefile.in: Regenerate. gas/ * config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros. (is_opcode_valid): Remove coprocessor instruction exclusions. Replace OPCODE_IS_MEMBER with opcode_is_member. (is_opcode_valid_16): Replace OPCODE_IS_MEMBER with opcode_is_member. (macro): Remove coprocessor instruction exclusions.
2012-08-13 * config/tc-mips.c (s_cpload, s_cpsetup): Fail if MIPS16 mode.Maciej W. Rozycki1-0/+35
(s_cplocal, s_cprestore, s_cpreturn): Likewise.
2012-08-07Despite them being ignored by the CPU, gas issues segment overrideJan Beulich1-10/+6
prefixes for other than FS/GS in 64-bit mode. If doing so at all, it should clearly do this correctly. Determining the default segment, however, requires to take into consideration RegRex (so far, RSP, RBP, R12, and R13 were all treated equally here). gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (build_modrm_byte): Split determining default segment from figuring out encoding. Honor RegRex for the former. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-segovr.{s,l}: New. * gas/i386/i386.exp: Run new test.
2012-08-07The VGATHER group of instructions requires that all three involvedJan Beulich1-29/+84
xmm/ymm registers are distinct. This patch adds code to check for this, and at once eliminates a superfluous check for not using PC-relative addressing for these instructions (the fact that an index register is required here already excludes valid PC-relative addresses). The severity of the resulting diagnostics can be controlled via command line option or directive. gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (set_check): Renamed from set_sse_check. Generalize to also handle operand checking option. (enum i386_error): New enumerator 'invalid_vector_register_set'. (match_template): Handle it. (enum check_kind): Give it a tag. Drop sse_ prefixes from enumerators. (operand_check): New. (md_pseudo_table): Add "operand_check". (check_VecOperands): Don't special case RIP addressing. Check that vSIB operands use distinct vector registers unless no checking was requested. (OPTION_MOPERAND_CHECK): New. (md_parse_option): Handle it. (OPTION_MAVXSCALAR, OPTION_X32): Adjust. (md_longopts): Add "moperand-check". (md_show_usage): Add help text for it. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/vgather-check-error.{s,l}: New. * gas/i386/vgather-check-none.{s,d}: New. * gas/i386/vgather-check-warn.{d,e}: New. * gas/i386/vgather-check.{s,d}: New. * gas/i386/x86-64-vgather-check-error.{s,l}: New. * gas/i386/x86-64-vgather-check-none.{s,d}: New. * gas/i386/x86-64-vgather-check-warn.{d,e}: New. * gas/i386/x86-64-vgather-check.{s,d}: New. * gas/i386/i386.exp: Run new tests.
2012-08-07There were several cases where the registers in the REX encoded rangeJan Beulich1-23/+25
got treated identically to the ones in the base range, due to not paying attention to the fact that reg_entry's reg_num field doesn't fully specify the register number (reg_flags also needs to be checked for RegRex). This patch introduces and uses a new (inline) function to obtain the full register number, and uses it to fix all those cases. It additionally adds the missing operand checks for SVME instructions (which match the monitor/mwait ones). gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (register_number): New function. (build_vex_prefix, process_immext, process_operands, build_modrm_byte, i386_index_check): Use it. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-specific-reg.{s,l}: New. * gas/i386/i386.exp: Run new test. opcodes/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
2012-08-07 * config/tc-i386.c (lex_got): Provide implementation for PENick Clifton1-0/+103
format. * gas/i386/secrel.s: Add test of <symbol>@SECREL32. * gas/i386/secrel.d: Add expected disassembly. * scripttempl/pe.sc (R_TLS): Add .tls$AAA and .tls$ZZZ. * scripttempl/pep.sc (R_TLS): Add .tls$AAA and .tls$ZZZ. * archive.c (_bfd_delete_archive_data): New function. * libbfd-in.h (_bfd_delete_archive_data): Declare. * libbfd.h: Rebuild. * opncls.c (_bfd_delete_bfd): Call _bfd_delete_archive_data.
2012-08-06 gas/Maciej W. Rozycki1-1/+1
* config/tc-mips.c (append_insn): Also handle moving delay-slot instruction across frags for fixed branches. gas/testsuite/ * gas/mips/branch-swap-2.l: New list test. * gas/mips/branch-swap-2.s: New test source. * gas/mips/mips.exp: Run the new test.
2012-08-02 * tc-m68hc11.c (s_m68hc11_parse_pseudo_instruction):Sean Keys1-0/+20
New function to parse pseudo ops that are unreleated to existing pseudo ops.
2012-08-012012-08-01 Catherine Moore <clm@codesourcery.com>Sandra Loosemore1-0/+2
Sandra Loosemore <sandra@codesourcery.com> gas/ * config/mips/tc-mips.c (mips_cpu_info): Add the 34kn. * doc/c-mips.texi (MIPS Opts): Document it.
2012-08-01gas/ChangeLog:James Lemke2-4/+19
2012-08-01 James Lemke <jwlemke@codesourcery.com> * gas/dwarf2dbg.c (out_set_addr): Allow for non-constant value of DWARF2_LINE_MIN_INSN_LENGTH * gas/config/tc-ppc.c (ppc_dwarf2_line_min_insn_length): Declare and initialize. (md_apply_fix): Branch addr can be a multiple of 2 or 4. * gas/config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): Now a variable reference. gas/testsuite/ChangeLog: 2012-08-01 James Lemke <jwlemke@codesourcery.com> * gas/cfi/cfi-ppc-1.d: Allow for code alignment of 2 or 4. ld/ChangeLog: 2012-08-01 James Lemke <jwlemke@codesourcery.com> * ld/testsuite/ld-gc/pr13683.d: XFAIL for powerpc*-*-eabivle.
2012-07-31 include/opcode/Maciej W. Rozycki1-98/+161
* mips.h: Document microMIPS DSP ASE usage. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for microMIPS DSP ASE support. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. gas/ * config/tc-mips.c (macro_build) <'2'>: Handle microMIPS. (macro) <M_BALIGN>: Update error handling. (validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases. <'7', '8', '0', '@', '^'>: Likewise. (mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS. <'9'>: Fix formatting. <'0', '@'>: Handle microMIPS. <'^'>: New case. gas/testsuite/ * gas/mips/micromips@mips32-dsp.d: New. * gas/mips/micromips@mips32-dspr2.d: New. * gas/mips/mips32-dsp.d: Remove -mips32r2. * gas/mips/mips32-dspr2.d: Likewise. * gas/mips/mips.exp: (mips_create_arch): Use -mips64r2 for micromips. Use run_dump_test_arches to run dsp tests. opcodes/ * micromips-opc.c (WR_a, RD_a, MOD_a): New macros. (DSP_VOLA): Likewise. (D32, D33): Likewise. (micromips_opcodes): Add DSP ASE instructions. * micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases. <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
2012-07-31The current error message for bad imm4 operands wasn't really helpful,Jan Beulich1-1/+1
and was pointing at the wrong operand in Intel mode. Since non-constant operands are being taken care of by other means anyway, adjust it to simply state that the constant doesn't fit. 2012-07-31 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (match_template): Adjust error message for 'bad_imm4' case.
2012-07-31Since the word to byte register conversion isn't active for x86-64Jan Beulich1-13/+9
anyway, there's also no need to issue a separate, inconsistent diagnostic in some of the cases - non-matching operands will be complained about anyway. 2012-07-31 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (check_byte_reg): Check for I/O port register earlier, and just once. Drop diagnostic that got issued only for some registers.
2012-07-31At the point where check_VecOperands()/VEX_check_operands() get run,Jan Beulich1-8/+8
all other instruction attributes already matched, so any mismatch here will tell the user more precisely what is wrong than using an eventual (and very likely to occur) more generic error encountered on a subsequent iteration through the template matching loop. 2012-07-31 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (match_template): New local variable 'specific_error'. Set it from i.error after failed check_VecOperands or VEX_check_operands. Use it if set in preference to i.error when actually issuing disagnostic.
2012-07-272012-07-27 Sean Keys <skeys@ipdatasys.com>Sean Keys1-53/+49
gas/config/ * tc-xgate.c: Consolidated inc/dec/hi/low modifieres into one function. (xgate_parse_operand): Added %hi and %lo handling. gas/testsuite/gas/xgate * xgate.exp: Added hi/lo test. * hilo.d: New test file * hilo.s: Net test source file.
2012-07-272012-07-27 James Murray <jsm@jsm-net.demon.co.uk>Sean Keys1-1/+1
* config/tc-m68hc11.c: Replace binary with hex for cygwin.
2012-07-25MASM accepts ESP/RSP being specified second in a memory addressJan Beulich1-1/+15
operand, by silently making it the base register despite not being specified first. Consequently, we also permit an xmm/ymm index to be specified first (possibly alone), nevertheless putting it in as index register. 2012-07-24 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (i386_intel_simplify_register): Handle xmm/ymm index register being specified first as well as esp/rsp base register being specified last in a memory operand.
2012-07-25Using the dedicated manifest constant is more descriptive.Jan Beulich1-2/+2
2012-07-24 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (i386_intel_simplify_register): Replace literal 4 by corresponding ESP_REG_NUM.
2012-07-242012-07-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore1-5/+14
Jie Zhang <jzhang918@gmail.com> gas/ * config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR if offset is negative. gas/testsuite/ * gas/arm/adr.d: New test. * gas/arm/adr.s: New test.
2012-07-16Implement RDRSEED, ADX and PRFCHW instructionsH.J. Lu1-0/+6
gas/ * config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives. * doc/c-i386.texi: Document the new directives. gas/testsuite/ * gas/i386/i386.exp: Run adx, rdseed and prefetchw tests. * gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests. * gas/i386/arch-10.s: Likewise. * gas/i386/arch-10-1.l: Changed correspondingly. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-lzcnt.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. * gas/i386/ilp32/x86-64-arch-2.d: Likewise. * gas/i386/arch-10-prefetchw.d: New file. * gas/i386/x86-64-arch-2-prefetchw.d: Likewise. * gas/i386/rdseed.s: Likewise. * gas/i386/rdseed.d: Likewise. * gas/i386/rdseed-intel.d: Likewise. * gas/i386/adx.s: Likewise. * gas/i386/adx.d: Likewise. * gas/i386/adx-intel.d: Likewise. * gas/i386/x86-64-rdseed.s: Likewise. * gas/i386/x86-64-rdseed.d: Likewise. * gas/i386/x86-64-rdseed-intel.d: Likewise. * gas/i386/x86-64-adx.s: Likewise. * gas/i386/x86-64-adx.d: Likewise. * gas/i386/x86-64-adx-intel.d: Likewise. opcodes/ * i386-dis.c (PREFIX_0F38F6): New. (prefix_table): Add adcx, adox instructions. (three_byte_table): Use PREFIX_0F38F6. (mod_table): Add rdseed instruction. * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW. (cpu_flags): Likewise. * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW. (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw. * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend prefetchw. * i386-tbl.h: Regenerate. * i386-init.h: Likewise.
2012-07-05gas/config/Sean Keys1-425/+362
* tc-xgate.c: Revised assembler so that operands are collected before the addressing mode is determined. include/opcode/ * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON. opcodes/ * xgate-dis.c: Removed an IF statement that will always be false due to overlapping operand masks. * xgate-opc.c: Corrected 'com' opcode entry and fixed spacing.
2012-07-02 * write.c (fixup_segment): Only perform the subtraction of anNick Clifton1-0/+2
fx_subsy symbol if MD_APPLY_SYM_VALUE allows it and the symbol is properly defined. * config/tc-msp430.h (MD_APPLY_SYM_VALUE): Define.
2012-06-30 PR gas/14315Alan Modra1-1/+0
* config/obj-elf.c (obj_elf_weak): Don't set local.
2012-06-29 PR gas/14263Nick Clifton1-1/+1
* config/tc-arm.c (parse_operands): Initialise val.
2012-06-28gas/config/Sean Keys2-0/+25
* tc-xgate.h: Defined tc_frob_symbol. * tc-xgate.c (xgate_frob_symbol): Wrote new function to mark symbols as being XGATE by setting st_target_internal value. bfd/ * elf32-xgate.c (elf32_xgate_add_symbol_hook): Added a temp patch that forces st_target_internal to equal 1, since tc_frob_symbol seems to need adjusting.
2012-06-28 PR gas/14260Nick Clifton1-12/+16
* config/tc-arm.c (encode_arm_addr_mode_common): Generate an error message if literal pool addressing is used. * gas/arm/ldr-t-bad.s: Add test of bogus use of literal pool addressing. * gas/arm/ldr-t-bad.l: Update expected assembler error message output.
2012-06-28 * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): Enable when usingNick Clifton1-0/+1
linker relaxation. (dwarf2_gen_line_info): Generate real, local, labels for line numbers. (dwarf2dbg_convert_frag): Do not finalize the computation of the frag's symbol value when linker relaxation is enabled. (ADDR_DELTA_LIMIT): Define. (size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT. (emit_fixed_inc_line_addr): Likewise. * write.c (fixup_segment): If the subtraction of two symbols cannot be resolved but is valid, then prevent bogus range warnings by pre-biasing add_number. * config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0. * gas/lns/lns.exp: Use alternate lns-common test for targets enabling linker relaxation. * gas/lns/lns-big-delta.d: Allow for output from architectures with 32-bit addresses.
2012-06-22gas/Roland McGrath1-3/+3
* config/tc-i386.c (parse_insn): Don't complain about REP prefix when the template has opcode_modifier.repprefixok set. * NEWS: Mention the change. gas/testsuite/ * gas/i386/rep-bsf.d: New file. * gas/i386/rep-bsf.s: New file. * gas/i386/i386.exp: Add the new test. opcodes/ * i386-opc.h (RepPrefixOk): New enum constant. (i386_opcode_modifier): New bitfield 'repprefixok'. * i386-gen.c (opcode_modifiers): Add RepPrefixOk. * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all instructions that have IsString. * i386-tbl.h: Regenerate.
2012-06-13Fix .dc.a for x32H.J. Lu2-0/+14
gas/ * config/tc-i386.c (x86_address_bytes): New. * config/tc-i386.h (TC_ADDRESS_BYTES): Likewise. (x86_address_bytes): Likewise. gas/testsuite/ * gas/i386/ilp32/x86-64-dc_a.d: New. * gas/i386/ilp32/x86-64-dc_a.s: Likewise.
2012-06-13 PR gas/12698Nick Clifton1-8/+18
* config/tc-arm.c (do_t_mrs): Do not require an m-profile architecure when assembling for all archiectures. (do_t_msr): Likewise.
2012-06-11 PR 13503Nick Clifton1-1/+1
* config/tc-avr.c (exp_mod): Fix typo introduced in 1.82 from 2012-05-16.
2012-05-31gas/Sean Keys1-28/+24
* tc-xgate.c (md_begin): Refactored code.
2012-05-22gas: mips: fix segfault with invalid default cpu stringsMike Frysinger1-1/+4
If you configure gas for a mips32el-* target, the default cpu calculation gets mangled, and we end up passing and invalid value as the default cpu. If you try executing gas after that, it segfaults. This is because it assumes that the default cpu value is always valid. $ ./gas/as-new Assembler messages: Error: Bad value (2) for default CPU Segmentation fault (core dumped) I'm not debating that the target tuple is valid, just that gas shouldn't crash. So add a friendly assert to avoid that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-05-19 * config/obj-elf.c (obj_elf_section): Cater for TC_KEEP_OPERAND_SPACESAlan Modra1-3/+8
targets when checking for "comdat".
2012-05-18 * config/tc-dlx.c (s_proc): Don't use asprintf.Alan Modra1-2/+4
2012-05-18 * config/tc-dlx.c (s_proc): Avoid warning about ignoring asprintfAlan Modra1-1/+4
return value.
2012-05-18 * config/tc-ppc.c: Don't capitalise error and warning messages.Alan Modra1-24/+31
(md_parse_option): Add checks for -a32 -mvle.
2012-05-18 * config/obj-evax.c: Include as.h first.Alan Modra1-2/+3
2012-05-17 PR 14072Nick Clifton12-31/+32
* configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * alpha-opc.c: Include sysdep.h before any other header file. * alpha-dis.c: Likewise. * avr-dis.c: Likewise. * cgen-opc.c: Likewise. * cr16-dis.c: Likewise. * cris-dis.c: Likewise. * crx-dis.c: Likewise. * d10v-dis.c: Likewise. * d10v-opc.c: Likewise. * d30v-dis.c: Likewise. * d30v-opc.c: Likewise. * h8500-dis.c: Likewise. * i370-dis.c: Likewise. * i370-opc.c: Likewise. * m10200-dis.c: Likewise. * m10300-dis.c: Likewise. * micromips-opc.c: Likewise. * mips-opc.c: Likewise. * mips61-opc.c: Likewise. * moxie-dis.c: Likewise. * or32-opc.c: Likewise. * pj-dis.c: Likewise. * ppc-dis.c: Likewise. * ppc-opc.c: Likewise. * s390-dis.c: Likewise. * sh-dis.c: Likewise. * sh64-dis.c: Likewise. * sparc-dis.c: Likewise. * sparc-opc.c: Likewise. * spu-dis.c: Likewise. * tic30-dis.c: Likewise. * tic54x-dis.c: Likewise. * tic80-dis.c: Likewise. * tic80-opc.c: Likewise. * tilegx-dis.c: Likewise. * tilepro-dis.c: Likewise. * v850-dis.c: Likewise. * v850-opc.c: Likewise. * vax-dis.c: Likewise. * w65-dis.c: Likewise. * xgate-dis.c: Likewise. * xtensa-dis.c: Likewise. * rl78-decode.opc: Likewise. * rl78-decode.c: Regenerate. * rx-decode.opc: Likewise. * rx-decode.c: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * bfd-in.h: Generate an error if included before config.h. * sysdep.h: Likewise. * bfd-in2.h: Regenerate. * compress.c: Remove #include "config.h". * plugin.c: Likewise. * elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h. * elf64-hppa.c: Likewise. * som.c: Likewise. * xsymc.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * Makefile.am: Use wrappers around C files generated by flex. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * itbl-lex-wrapper.c: New file. * config/bfin-lex-wrapper.c: New file. * cgen.c: Include as.h before setjmp.h. * config/tc-dlx.c: Include as.h before any other header. * config/tc-h8300.c: Likewise. * config/tc-lm32.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-or32.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * unwind-ia64.h: Include config.h.
2012-05-16 * bfd-in.h (bfd_get_section_name, bfd_get_section_vma,Nick Clifton1-1/+1
bfd_get_section_lma, bfd_get_section_alignment, bfd_get_section_flags, bfd_get_section_userdata): Rewrite macros in order to use the `bfd' argument. * bfd-in2.h: Regenerate. * elf-vxworks.c (elf_vxworks_finish_dynamic_entry): Pass proper `bfd' as the first argument for `bfd_get_section_alignment'. * elf32-arm.c (create_ifunc_sections): Likewise, for `bfd_set_section_alignment'. * elf32-m32r.c (m32r_elf_relocate_section): Likewise, for `bfd_get_section_name'. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relocate_section): Likewise. * elf64-mmix.c (mmix_final_link_relocate): Likewise, for `bfd_get_section_vma'. * elf64-ppc.c (create_linkage_sections): Likewise, for `bfd_set_section_alignment'. * emultempl/m68hc1xelf.em (hook_in_stub): Pass proper `bfd' as the first argument for `bfd_get_section_name'. * config/tc-alpha.c (maybe_set_gp): Pass proper `bfd' as the first argument for `bfd_get_section_vma'.
2012-05-16 PR 13503Nick Clifton1-8/+8
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * bfd-in2.h: Regenerate. * libbfd.h: Regenrate. * elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (avr_reloc_map): Ditto. * config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (exp_mod_data) Ditto. And replace "hhi8" with "hlo8". (md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
2012-05-16 * config/tc-m68k.c (m68k_cpus): Add 51ag, 51je, 51jf, 51jg, 51mm,Nathan Sidwell1-0/+6
51qm variants.
2012-05-15Rewrote a loop that caused a seg fault on Windows systems.Sean Keys1-1/+1
2012-05-15 * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.Nick Clifton1-176/+1393
Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
2012-05-15* config/rx-parse.y (rx_range): declare.DJ Delorie1-8/+22
(O1,O2,O3,O4): Add calls to rx_range. (UO1,UO2,UO3): Likewise. (IMM2,IMMB): Likewise. (rx_range): New.
2012-05-15* config/tc-rx.c (rx_fetchalign): Declare.DJ Delorie1-3/+96
(md_pseudo_table): Add .fetchalign. (RX_NBASE_FETCHALIGN): New. (fetchalign_bytes): New. (rx_fetchalign): New. (rx_frag_init): If a "magic" value is found, also init the machine-specific data. (md_assemble): Note following opcode size if called for. (rx_next_opcode): New. (rx_relax_frag): Support .fetchalign. (md_convert_frag): Likewise. * doc/c-rx.texi (RX-Directives): Add .fetchalign.
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