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Correct a regression introduced with commit 919731affbef ("Add MIPS
.module directive") causing code like:
.set mips3
dli $2, 0x9000000080000000
to fail assembly with the following error message produced:
Error: number (0x9000000080000000) larger than 32 bits
if built with `mips3' selected as the global ISA (e.g. `-march=mips3').
This is because a `.set' directive doing an ISA override does not lift
the ABI restriction on register sizes if the ISA remains unchanged.
Previously the directive always set register sizes from the ISA chosen,
which is what some code expects. Restore the old semantics then.
gas/
* config/tc-mips.c (code_option_type): New enum.
(parse_code_option): Return status indicating option type.
(s_mipsset): Update `parse_code_option' call site accordingly.
Always set register sizes from the ISA with ISA overrides.
(s_module): Update `parse_code_option' call site.
* testsuite/gas/mips/isa-override-1.d: New test.
* testsuite/gas/mips/micromips@isa-override-1.d: New test.
* testsuite/gas/mips/mips1@isa-override-1.d: New test.
* testsuite/gas/mips/mips2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips32r6@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r2@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r3@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r5@isa-override-1.d: New test.
* testsuite/gas/mips/mips64r6@isa-override-1.d: New test.
* testsuite/gas/mips/r3000@isa-override-1.d: New test.
* testsuite/gas/mips/r3900@isa-override-1.d: New test.
* testsuite/gas/mips/r5900@isa-override-1.d: New test.
* testsuite/gas/mips/octeon@isa-override-1.d: New test.
* testsuite/gas/mips/octeon3@isa-override-1.d: New test.
* testsuite/gas/mips/isa-override-2.l: New list test.
* testsuite/gas/mips/mips1@isa-override-2.l: New list test.
* testsuite/gas/mips/mips2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r2@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r3@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r5@isa-override-2.l: New list test.
* testsuite/gas/mips/mips32r6@isa-override-2.l: New list test.
* testsuite/gas/mips/r3000@isa-override-2.l: New list test.
* testsuite/gas/mips/r3900@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-2.l: New list test.
* testsuite/gas/mips/octeon3@isa-override-1.l: New stderr
output.
* testsuite/gas/mips/isa-override-1.s: New test source.
* testsuite/gas/mips/r5900@isa-override-1.s: New test source.
* testsuite/gas/mips/isa-override-2.s: New test source.
* testsuite/gas/mips/mips1@isa-override-2.s: New test source.
* testsuite/gas/mips/mips2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r2@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r5@isa-override-2.s: New test source.
* testsuite/gas/mips/mips32r6@isa-override-2.s: New test source.
* testsuite/gas/mips/r3000@isa-override-2.s: New test source.
* testsuite/gas/mips/r3900@isa-override-2.s: New test source.
* testsuite/gas/mips/octeon3@isa-override-2.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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This includes regenerating a bunch of files in opcodes/ with trunk cgen.
gprof/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* basic_blocks.c: Update old style function definitions.
* cg_arcs.c: Likewise.
* cg_print.c: Likewise.
* gen-c-prog.awk: Likewise.
* gmon_io.c: Likewise.
* hertz.c: Likewise.
* hist.c: Likewise.
* sym_ids.c: Likewise.
bfd/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* cache.c: Update old style function definitions.
* elf32-m68k.c: Likewise.
* elf64-mmix.c: Likewise.
* stab-syms.c: Likewise.
opcodes/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* alpha-dis.c: Regenerate.
* crx-dis.c: Likewise.
* disassemble.c: Likewise.
* epiphany-opc.c: Likewise.
* fr30-opc.c: Likewise.
* frv-opc.c: Likewise.
* ip2k-opc.c: Likewise.
* iq2000-opc.c: Likewise.
* lm32-opc.c: Likewise.
* lm32-opinst.c: Likewise.
* m32c-opc.c: Likewise.
* m32r-opc.c: Likewise.
* m32r-opinst.c: Likewise.
* mep-opc.c: Likewise.
* mt-opc.c: Likewise.
* or1k-opc.c: Likewise.
* or1k-opinst.c: Likewise.
* tic80-opc.c: Likewise.
* xc16x-opc.c: Likewise.
* xstormy16-opc.c: Likewise.
ld/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* emultempl/scoreelf.em: Likewise.
binutils/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* resres.c: Likewise.
gas/ChangeLog:
2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* cgen.c: Likewise.
* config/tc-bfin.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-mep.c: Likewise.
* config/tc-metag.c: Likewise.
* config/tc-nios2.c: Likewise.
* config/tc-rl78.c: Likewise.
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The RAS extension was introduced as part of the ARMv8.2 architecture
where it is a required feature. It is also available as an optional
feature for ARMv8 and ARMv8.1. In binutils, the RAS extension is
currently enabled by default for -march=armv8.2-a but is not available
for -march=armv8 or -march=armv8.1-a.
This patch adds the feature extension '+ras' to enable the RAS extension
for ARMv8 and ARMv8.1, it is disabled by default.
gas/
2016-04-20 Matthew Wahab <matthew.wahab@arm.com>
* config/tc-aarch64.c (aarch64_features): Add "ras".
* doc/c-aarch64.texi (AArch64 Extensions): Add "ras".
* testsuite/gas/aarch64/armv8-ras-1.d: New.
* testsuite/gas/aarch64/armv8-ras-1.s: New.
* testsuite/gas/aarch64/illegal-ras-1.d: New.
* testsuite/gas/aarch64/illegal-ras-1.s: New.
Change-Id: I824fb9bc8cf846bcc03aa17a726efb1350d78b9d
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This reverts commit 9a452709fe126ea6da23a53426362e4435d2dc06.
This change was committed as obvious, but it has been rightly been
pointed out to me that this change is not obvious, and as such I am
reverting it.
gas/ChangeLog:
Revert prevous change.
* config/tc-arc.c (arc_option): Make .cpu directive
case-sensitive again.
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gas/ChangeLog:
* config/tc-arc.c (arc_option): Make .cpu directive
case-insensitive.
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gas/ChangeLog:
* config/tc-arc.c (arc_option): Allow NPS400 in .cpu directive.
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Presumably this was supposed to be regname[sizeof (regname) - 1] but was typoed
to regname[sizeof (rename) - 1]. However that should be unnecessary because
sprintf should null terminate. As is this assignment is invalid ISO C because
rename refers to the function rename (), and sizeof on functions is undefined.
In GNU C C the size of functions is 1 so the expression is the same as
regname[0]. The following call to sprintf () clearly will over right that, so
the statement either has no effect or is invalid. Given that it seems safe to
just remove it. While we are there correct the size of regname, and switch
from snprintf to sprintf since we know the exact length of the result.
gas/ChangeLog:
2016-04-15 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-mips.c (md_begin): Remove useless assignment.
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* config/tc-ppc.c (toc_reloc_types): Wrap in #ifdef OBJ_ELF
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They are only used in one file, so we might as well restrict there scope to
that file, and theoretically this might slightly improve compilers ability to
optimize usage of these variables.
gas/ChangeLog:
2016-04-14 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-nios2.c (nios2_as_options): Make file static.
* config/tc-ppc.c (toc_reloc_ypes): Likewise.
* config/tc-sparc.c (native_op_table): Likewise.
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gas/ChangeLog:
2016-04-14 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-m32c.c (M32C_Macros): Remove.
* config/tc-msp430.c (option_numbers): Likewise.
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gas/
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (mach_type_specified_p): Change type to
bfd_boolean.
(arc_option): Set private flags when parsing cpu pseudo-op.
(md_parse_option): Set mach_type_specified_p to TRUE.
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Weak symbols can be preempted at link time so always choose the longer
sequence in branch relaxation, according to the relaxation level chosen,
so that any symbol finally used as the branch target is reachable.
2016-04-13 Maciej W. Rozycki <macro@imgtec.com>
Andrew Bennett <andrew.bennett@imgtec.com>
gas/
* config/tc-mips.c (relaxed_branch_length): Use the long
sequence where the target is a weak symbol.
(relaxed_micromips_32bit_branch_length): Likewise.
(relaxed_micromips_16bit_branch_length): Likewise.
* testsuite/gas/mips/branch-weak-1.d: New test.
* testsuite/gas/mips/branch-weak-2.d: New test.
* testsuite/gas/mips/branch-weak-3.d: New test.
* testsuite/gas/mips/branch-weak-4.d: New test.
* testsuite/gas/mips/branch-weak-5.d: New test.
* testsuite/gas/mips/branch-weak.l: New stderr output.
* testsuite/gas/mips/branch-weak.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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Where branch relaxation is enabled emit the long sequence for branches
whose distance cannot be determined, i.e. to symbols that are undefined
or in a different segment. These symbols are only resolved at link time
and therefore the longer sequence ensures the branch target is in range,
which cannot be guaranteed with a direct branch.
This is the opposite to the current implementation, originally proposed
here: <https://sourceware.org/ml/binutils/2002-09/msg00218.html>. The
proposal was then extensively discussed before the final version was
posted here: <https://sourceware.org/ml/binutils/2002-10/msg00191.html>
and eventually committed:
commit 4a6a3df43dbb37853a7b88b10ae97d9ec5daf987
Author: Alexandre Oliva <aoliva@redhat.com>
Date: Sat Oct 12 05:23:33 2002 +0000
The case considered here was not commented in the review however and the
original version remains. With branch relaxation enabled it makes more
sense to do it consistently, so that all code impure with respect to
branch distances can be linked. Direct branches are still produced for
the cases concerned where branch relaxation is disabled, which is the
default.
gas/
* config/tc-mips.c (relaxed_branch_length): Use the long
sequence where the distance cannot be determined.
(relaxed_micromips_32bit_branch_length): Likewise.
* testsuite/gas/mips/branch-extern-1.d: New test.
* testsuite/gas/mips/branch-extern-2.d: New test.
* testsuite/gas/mips/branch-extern-3.d: New test.
* testsuite/gas/mips/branch-extern-4.d: New test.
* testsuite/gas/mips/branch-extern.l: New stderr output.
* testsuite/gas/mips/branch-extern.s: New test source.
* testsuite/gas/mips/branch-section-1.d: New test.
* testsuite/gas/mips/branch-section-2.d: New test.
* testsuite/gas/mips/branch-section-3.d: New test.
* testsuite/gas/mips/branch-section-4.d: New test.
* testsuite/gas/mips/branch-section.l: New stderr output.
* testsuite/gas/mips/branch-section.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/textauxregister.d: New file.
* testsuite/gas/arc/textauxregister.s: Likewise.
* testsuite/gas/arc/textcondcode.d: Likewise.
* testsuite/gas/arc/textcondcode.s: Likewise.
* testsuite/gas/arc/textcoreregister.d: Likewise.
* testsuite/gas/arc/textcoreregister.s: Likewise.
* testsuite/gas/arc/textpseudoop.d: Likewise.
* testsuite/gas/arc/textpseudoop.s: Likewise.
* testsuite/gas/arc/ld2.d: Update test.
* testsuite/gas/arc/st.d: Likewise.
* testsuite/gas/arc/taux.d: Likewise.
* doc/c-arc.texi (ARC Directives): Add .extCondCode,
.extCoreRegister and .extAuxRegister documentation.
* config/tc-arc.c (arc_extcorereg): New function.
(md_pseudo_table): Add .extCondCode, .extCoreRegister and
.extAuxRegister pseudo-ops.
(extRegister_t): New type.
(ext_condcode, arc_aux_hash): New global variable.
(find_opcode_match): Check for extensions.
(preprocess_operands): Likewise.
(md_begin): Add aux registers in a hash.
(assemble_insn): Update use arc_flags member.
(tokenize_extregister): New function.
(create_extcore_section): Likewise.
* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Increase to 10.
(arc_flags): Delete code, add flgp.
include/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (flag_class_t): Update.
(ARC_OPCODE_NONE): Define.
(ARC_OPCODE_ARCALL): Likewise.
(ARC_OPCODE_ARCFPX): Likewise.
(ARC_REGISTER_READONLY): Likewise.
(ARC_REGISTER_WRITEONLY): Likewise.
(ARC_REGISTER_NOSHORT_CUT): Likewise.
(arc_aux_reg): Add cpu.
opcodes/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* arc-dis.c (find_format): Check for extension flags.
(print_flags): New function.
(print_insn_arc): Update for .extCondCode, .extCoreRegister and
.extAuxRegister.
* arc-ext.c (arcExtMap_coreRegName): Use
LAST_EXTENSION_CORE_REGISTER.
(arcExtMap_coreReadWrite): Likewise.
(dump_ARC_extmap): Update printing.
* arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
(arc_aux_regs): Add cpu field.
* arc-regs.h: Add cpu field, lower case name aux registers.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
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gas/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/textinsn-errors.d: New File.
* testsuite/gas/arc/textinsn-errors.err: Likewise.
* testsuite/gas/arc/textinsn-errors.s: Likewise.
* testsuite/gas/arc/textinsn2op.d: Likewise.
* testsuite/gas/arc/textinsn2op.s: Likewise.
* testsuite/gas/arc/textinsn2op01.d: Likewise.
* testsuite/gas/arc/textinsn2op01.s: Likewise.
* testsuite/gas/arc/textinsn3op.d: Likewise.
* testsuite/gas/arc/textinsn3op.s: Likewise.
* doc/c-arc.texi (ARC Directives): Add .extInstruction
documentation.
* config/tc-arc.c (arcext_section): New variable.
(arc_extinsn): New function.
(md_pseudo_table): Add .extInstruction pseudo op.
(attributes_t): New type.
(suffixclass, syntaxclass, syntaxclassmod): New constant
structures.
(find_opcode_match): Remove arc_num_opcodes.
(md_begin): Likewise.
(tokenize_extinsn): New function.
(arc_set_ext_seg): Likewise.
(create_extinst_section): Likewise.
include/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (arc_num_opcodes): Remove.
(ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
(ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
(ARC_SUFFIX_FLAG): Define.
(flags_none, flags_f, flags_cc, flags_ccf): Declare.
(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
opcodes/
2016-04-04 Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
Initialize.
(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
(arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
(arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
(arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
(arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
(arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
(arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
(arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
(arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
(arc_opcode arc_opcodes): Null terminate the array.
(arc_num_opcodes): Remove.
* arc-ext.h (INSERT_XOP): Define.
(extInstruction_t): Likewise.
(arcExtMap_instName): Delete.
(arcExtMap_insn): New function.
(arcExtMap_genOpcode): Likewise.
* arc-ext.c (ExtInstruction): Remove.
(create_map): Zero initialize instruction fields.
(arcExtMap_instName): Remove.
(arcExtMap_insn): New function.
(dump_ARC_extmap): More info while debuging.
(arcExtMap_genOpcode): New function.
* arc-dis.c (find_format): New function.
(print_insn_arc): Use find_format.
(arc_get_disassembler): Enable dump_ARC_extmap only when
debugging.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
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gas/
2016-03-31 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (preprocess_operands): Mark AUX symbol.
(arc_adjust_symtab): New function.
* config/tc-arc.h (ARC_FLAG_AUX): Define.
(obj_adjust_symtab): Likewise.
* testsuite/gas/arc/taux.d: New file.
* testsuite/gas/arc/taux.s: Likewise.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
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gas/
* config/tc-mips.c (s_option): Sanitize `.option picX'
pseudo-op.
* testsuite/gas/mips/option-pic-1.d: New test.
* testsuite/gas/mips/option-pic-2.l: New list test.
* testsuite/gas/mips/option-pic-1.s: New test source.
* testsuite/gas/mips/option-pic-2.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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gas/
* config/tc-mips.c (s_option): Reject `.option picX' if VxWorks
PIC.
* testsuite/gas/mips/option-pic-vxworks-1.l: New list test.
* testsuite/gas/mips/option-pic-vxworks-2.l: New list test.
* testsuite/gas/mips/option-pic-vxworks-1.s: New test source.
* testsuite/gas/mips/option-pic-vxworks-2.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new tests.
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gas/
* config/tc-mips.c (can_swap_branch_p): Correct call formatting.
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gas/
* config/tc-mips.c (mips_check_options): Unify messages.
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gas/
* config/tc-mips.c (mips_check_options): Use `opts->isa'
consistently.
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Add some new control instructions to the opcodes library, and a new test
for these new instructions to the assembler. The new instructions use
an instruction flag longer than any seen before (on arc), and so the max
flag length is extended to accommodate this.
gas/ChangeLog:
* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
* testsuite/gas/arc/nps400-2.d: New file.
* testsuite/gas/arc/nps400-2.s: New file.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
* arc-opc.c (arc_flag_operands): Add new flags.
(arc_flag_classes): Add new classes.
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This commit completes support for having multiple instructions with the
same mnemonic in non-contiguous blocks within the arc_opcodes table.
The commit adds an iterator mechanism for the arc_opcode_hash_entry
structure, which is then used in find_opcode_match to consider all
arc_opcode entries with the same mnemonic, even when these instructions
are stored in non-contiguous blocks.
I extend the comment on the arc_opcodes table to discuss how entries
within the table are organised, and to mention how instructions can be
split into multiple groups if needed, but that the table is still
searched in table order.
There should be no user visible changes after this commit.
gas/ChangeLog:
* config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
structure.
(arc_opcode_hash_entry_iterator_init): New function.
(arc_opcode_hash_entry_iterator_next): New function.
(find_opcode_match): Iterate over all arc_opcode entries
referenced by the arc_opcode_hash_entry passed in as a parameter.
opcodes/ChangeLog:
* arc-opc.c (arc_opcodes): Extend comment to discus table layout.
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Building on earlier commits, this commit moves along support for having
multiple arc_opcode entries in the arc_opcodes table that have the same
mnemonic (name) field, but are not stored in a contiguous block in the
table.
In this commit we support looking up the arc_opcode_hash_entry from the
hash table, and passing this along to the find_opcode_match function,
which then finds the specific arc_opcode that we're assembling. We
still don't actually support the multiple chains of arc_opcode entries
in this commit, but the limitation is now isolated to the
find_opcode_match function.
There is no user visible change after this commit.
gas/ChangeLog:
* config/tc-arc.c (arc_find_opcode): Now returns
arc_opcode_hash_entry pointer.
(find_opcode_match): Update argument type, extract arc_opcode from
incoming arc_opcode_hash_entry.
(find_special_case_pseudo): Update return type.
(find_special_case_flag): Update return type.
(find_special_case): Update return type.
(assemble_tokens): Lookup arc_opcode_hash_entry based on
instruction mnemonic, then use find_opcode_match to identify
specific arc_opcode.
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The arc assembler builds a hash table to hold references to arc_opcode
entries in the arc_opcodes table. This hash assumes that each mnemonic
will always appear in a contiguous blocks within the arc_opcodes table;
all ADD instruction will be together, all AND instructions will likewise
be together and so on.
The problem with this is that as different variations of arc are added,
then it is often more convenient to split instructions apart, so all the
base ADD instructions are together, but, variants of ADD specific to one
variation of arc are grouped with other instructions specific to that
arc variant. The current data structures don't support splitting the
instructions in this way.
This commit is a first step towards addressing this limitation. In this
commit the hash table that currently holds arc_opcode pointers directly,
instead holds a pointer to a new, intermediate, data structure. This
new data structure holds the pointer to the arc_opcode. In this way, we
can, in the future support having the intermediate structure hold
multiple pointers to different arc_opcode groups.
There should be no visible functional change after this commit.
gas/ChangeLog:
* config/tc-arc.c (struct arc_opcode_hash_entry): New structure.
(arc_find_opcode): New function.
(find_special_case_pseudo): Use arc_find_opcode.
(find_special_case_flag): Likewise.
(assemble_tokens): Likewise.
(md_begin): Build hash using struct arc_opcode_hash_entry.
|
|
gas/
2016-04-07 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (arc_option): Prepare string for automatic
translation.
(declare_register): Likewise.
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An upcoming commit will add a new arc instruction flag that uses
characters that have never appeared in an arc instruction flag before.
Currently the assembler is very conservative about which characters can
or cannot appear in an instruction flag.
This commit relaxes these constraints a little. After this commit all
alpha-numeric characters are now allowed into instruction flags. This
complete set is not required for the upcoming change, however, having
this slightly larger set does not impact the assemblers ability to
correctly parse input, but does make it easier to add new flag to the
instruction table.
gas/ChangeLog:
* config/tc-arc.c (tokenize_flags): Allow greater range of
characters into flag names.
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The preprocess_operands function changes the incoming list of assembler
tokens based on the assumption that the first arc_operand found will be
the same instruction class as all of the arc_operands for the same
mnemonic.
Though this assumption is probably fine, removing this assumption, and
pushing the token change down into assemble_tokens makes the code no
more complex, and might even be easier to follow.
There should be no user visible changes after this commit.
gas/ChangeLog:
* config/tc-arc.c (find_opcode_match): Handle O_symbol case, add
new de_fault label.
(preprocess_operands): Delete.
(assemble_tokens): Remove call to preprocess_operands.
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missing closing parentheses.
PR gas/19910
* config/tc-sparc.c (sparc_ip): Report an error if the expression
inside a %-macro could not be fully parsed.
* expr.c (integer_constant): Accept and ignore U suffixes to
integers.
(operand): When a missing closing parenthesis is encountered,
report the character that was found instead.
* testsuite/gas/mips/tls-ill.l: Update expected error message.
* testsuite/gas/sparc/pr19910-1.d: New test driver.
* testsuite/gas/sparc/pr19910-1.s: New test.
* testsuite/gas/sparc/pr19910-2.l: Expected error output.
* testsuite/gas/sparc/pr19910-2.s: New test.
* testsuite/gas/sparc/sparc.exp: Run the new tests.
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* config/tc-msp430.c (msp430_operands): Check for a NOP preceding
an EINT instruction. Warn/fix as necessary.
* testsuite/gas/msp430/bad.s: Add test of EINT without preceding NOP.
* testsuite/gas/msp430/bad.l: Update expected messages.
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opcodes/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* arc-regs.h: Add a new subclass field. Add double assist
accumulator register values.
* arc-tbl.h: Use DPA subclass to mark the double assist
instructions. Use DPX/SPX subclas to mark the FPX instructions.
* arc-opc.c (RSP): Define instead of SP.
(arc_aux_regs): Add the subclass field.
include/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* opcode/arc.h (DPA, DPX, SPX): New subclass enums.
(ARC_FPUDA): Define.
(arc_aux_reg): Add new field.
gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (is_code_density_p): Compare directly the
subclass field.
(is_spfp_p, is_dpfp_p, is_spfp_p): Define.
(check_cpu_feature): New function.
(find_opcode_match): Use check_cpu_feature function.
(preprocess_operands): Likewise.
(md_parse_option): Use mfpuda, mdpfp, mspfp options.
* testsuite/gas/arc/tdpfp.d: New file.
* testsuite/gas/arc/tfpuda.d: Likewise.
* testsuite/gas/arc/tfpx.s: Likewise.
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gas/
* config/tc-arm.c (do_neon_mac_maybe_scalar): Allow F16.
* testsuite/gas/arm/armv8-2-fp16-simd.s: New tests.
* testsuite/gas/arm/armv8-2-fp16-simd.d: New expected results.
* testsuite/gas/arm/armv8-2-fp16-simd-thum.d: Likewise for Thumb.
* testsuite/gas/arm/armv8-2-fp16-simd-warning.l: New warning results.
* testsuite/gas/arm/simd_by_scalar_low_regbank.s: New test source.
* testsuite/gas/arm/simd_by_scalar_low_regbank.d: New testcase.
* testsuite/gas/arm/simd_by_scalar_low_regbank_thumb.d: Likewise for Thumb.
* testsuite/gas/arm/simd_by_scalar_low_regbank.l: New warning results.
opcodes/
* arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
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gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (assemble_insn): Prohibit pc-rel relocations for
JUMP instructions type.
* testsuite/gas/arc/relocs-errors.d: New file.
* testsuite/gas/arc/relocs-errors.err: Likewise.
* testsuite/gas/arc/relocs-errors.s: Likewise.
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Since the .d32 suffix prefers 32-bit displacement in encoding, try
vec_disp8 encoding only if i.disp_encoding != disp_encoding_32bit.
PR gas/19909
* config/tc-i386.c (check_VecOperands): Try vec_disp8 encoding
only if i.disp_encoding != disp_encoding_32bit.
* gas/testsuite/gas/i386/disp32.s: Add tests for vmovdqu64.d32.
* gas/testsuite/gas/i386/x86-64-disp32.s: Likewise.
* gas/testsuite/gas/i386/disp32.d: Updated.
* gas/testsuite/gas/i386/x86-64-disp32.d: Likewise.
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In tc-arc.h we redefine constants that are also defined in the
include/opcode/arc.h header file. The problem is that changing one
without changing the other resulting in strange crashes.
We could comment both locations to stress the importance of remembering
to update the other location too, or we could just include the
opcode/arc.h header file into the assembler.
Given that other targets include their opcode/ARCH.h header file, and
only having a single definition, where possible, is usually the safest
solution, that's what I switch too with this commit.
gas/ChangeLog:
* config/tc-arc.h: Include 'opcode/arc.h'.
(MAX_INSN_ARGS): Delete.
(MAX_INSN_FLGS): Delete.
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gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* app.c (app_push): use XNEW macro.
* as.c: Likewise.
* config/obj-elf.c (obj_elf_change_section): Likewise.
(elf_copy_symbol_attributes): Likewise.
(obj_elf_size): Likewise.
(build_group_lists): Likewise.
* config/tc-aarch64.c (add_operand_error_record): Likewise.
(md_assemble): Likewise.
(tc_gen_reloc): Likewise.
(get_upper_str): Likewise.
(aarch64_parse_features): Likewise.
* config/tc-arm.c (insert_reg_alias): Likewise.
(insert_neon_reg_alias): Likewise.
(find_or_make_literal_pool): Likewise.
(s_arm_elf_cons): Likewise.
(add_unwind_opcode): Likewise.
(arm_parse_extension): Likewise.
* config/tc-avr.c (create_record_for_frag): Likewise.
* config/tc-crx.c: Likewise.
* config/tc-d30v.c: Likewise.
* config/tc-dlx.c (s_proc): Likewise.
* config/tc-ft32.c: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-hppa.c (pa_proc): Likewise.
(create_new_space): Likewise.
(create_new_subspace): Likewise.
* config/tc-i860.c: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-iq2000.c (iq2000_add_macro): Likewise.
(iq2000_record_hi16): Likewise.
* config/tc-m32c.c (m32c_indirect_operand): Likewise.
* config/tc-m32r.c (debug_sym): Likewise.
(m32r_record_hi16): Likewise.
* config/tc-m68k.c (m68k_ip): Likewise.
(md_begin): Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-microblaze.c (check_got): Likewise.
* config/tc-mips.c (append_insn): Likewise.
(s_mipsset): Likewise.
(mips_record_label): Likewise.
(s_mips_end): Likewise.
* config/tc-mmix.c (mmix_frob_file): Likewise.
* config/tc-mn10200.c: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-moxie.c: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-nds32.c (nds32_elf_save_pseudo_pattern): Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-or1k.c: Likewise.
* config/tc-pdp11.c: Likewise.
* config/tc-pj.c (fake_opcode): Likewise.
* config/tc-ppc.c (ppc_apuinfo_section_add): Likewise.
(ppc_macro): Likewise.
(ppc_dwsect): Likewise.
(ppc_machine): Likewise.
* config/tc-rl78.c (rl78_frag_init): Likewise.
* config/tc-rx.c (rx_frag_init): Likewise.
* config/tc-s390.c (s390_lit_suffix): Likewise.
(s390_machine): Likewise.
(s390_machinemode): Likewise.
* config/tc-score.c (s3_insert_reg): Likewise.
(s3_gen_reloc): Likewise.
* config/tc-score7.c (s7_insert_reg): Likewise.
(s7_gen_reloc): Likewise.
* config/tc-tic30.c (tic30_operand): Likewise.
* config/tc-tic4x.c (tic4x_inst_make): Likewise.
* config/tc-tic54x.c (stag_add_field): Likewise.
(tic54x_struct): Likewise.
(tic54x_space): Likewise.
(tic54x_field): Likewise.
(tic54x_mlib): Likewise.
(subsym_substitute): Likewise.
* config/tc-tic6x.c (tic6x_frob_label): Likewise.
* config/tc-vax.c: Likewise.
* config/tc-xc16x.c: Likewise.
* config/tc-xtensa.c (xtensa_add_insn_label): Likewise.
(directive_push): Likewise.
(xtensa_begin_directive): Likewise.
(tokenize_arguments): Likewise.
(xtensa_add_literal_sym): Likewise.
(new_resource_table): Likewise.
(resize_resource_table): Likewise.
(emit_single_op): Likewise.
(xtensa_create_trampoline_frag): Likewise.
(xtensa_maybe_create_literal_pool_frag): Likewise.
(xtensa_add_config_info): Likewise.
(xtensa_realloc_fixup_cache): Likewise.
(add_subseg_info): Likewise.
(cache_literal_section): Likewise.
(add_xt_block_frags): Likewise.
(add_xt_prop_frags): Likewise.
(init_op_placement_info_table): Likewise.
(build_section_rename): Likewise.
* config/tc-z80.c: Likewise.
* config/tc-z8k.c: Likewise.
* depend.c (register_dependency): Likewise.
* dwarf2dbg.c (get_line_subseg): Likewise.
(dwarf2_gen_line_info_1): Likewise.
(get_filenum): Likewise.
* ecoff.c (allocate_scope): Likewise.
(allocate_vlinks): Likewise.
(allocate_shash): Likewise.
(allocate_thash): Likewise.
(allocate_tag): Likewise.
(allocate_forward): Likewise.
(allocate_thead): Likewise.
(allocate_lineno_list): Likewise.
* expr.c (make_expr_symbol): Likewise.
* hash.c (hash_new_sized): Likewise.
* input-file.c (input_file_push): Likewise.
* listing.c (file_info): Likewise.
(listing_newline): Likewise.
* macro.c (new_formal): Likewise.
(define_macro): Likewise.
* remap.c (add_debug_prefix_map): Likewise.
* symbols.c (symbol_find_noref): Likewise.
(define_dollar_label): Likewise.
(fb_label_instance_inc): Likewise.
(symbol_relc_make_value): Likewise.
|
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gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/obj-elf.c (obj_elf_vendor_attribute): Use xstrdup.
* config/tc-ppc.c (ppc_frob_file_before_adjust): Likewise.
(ppc_znop): Likewise.
(ppc_pe_section): Likewise.
(ppc_frob_symbol): Likewise.
* config/tc-tic30.c (tic30_operand): Likewise.
* config/tc-tic4x.c (tic4x_sect): Likewise.
(tic4x_usect): Likewise.
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Providing declarations in tc.h points out that alpha wasn't properly marking
FLT_CHARS as const. We can also get rid of the confusing redefinition of
X_CHARS to mmix_x_chars. Finally we can get rid of some now redundant
declarations of these constants.
gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-alpha.c: Const qualify FLT_CHARS.
* config/atof-ieee.c: Remove declarations of FLT_CHARS and EXP_CHARS.
* config/tc-cris.h: Likewise.
* expr.c: Likewise.
* config/tc-mmix.c (md_atof): Adjust comment.
* config/tc-mmix.h: Stop defining FLT_CHARS and EXP_CHARS as macros.
* tc.h: Declare FLT_CHARS and EXP_CHARS.
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It needs a few more things to be const now.
gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-score.c (s3_gen_reloc): Add const qualifiers.
* config/tc-score7.c (s7_gen_reloc): Likewise.
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It is only ever assigned values in the enum, and it is passed to functions that
expect the argument's type to be the enum.
gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-arm.c (do_t_branch): Change the type of reloc to
bfd_reloc_code_real_type.
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Its not used for anything outside of md_assemble () so it doesn't need to be
extern. While we are there we can replace free () and xmalloc () with
XRESIZEVEC which should be faster.
gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/bfin-parse.y (current_inputline): Remove definition.
* config/tc-bfin.c (md_assemble): Simplify use of current_inputline.
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Instead of canonicalizing the argument we can just use a case insensitive
compare.
gas/ChangeLog:
2016-04-03 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-avr.c (md_parse_option): Use strcasecmp () to compare
strings.
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Small spelling mistake in a #define, fixed in this commit.
gas/ChangeLog:
* config/tc-arc.h (MAX_FLAG_NAME_LENGHT): Rename to...
(MAX_FLAG_NAME_LENGTH): ...this.
(struct arc_flags): Update to use MAX_FLAG_NAME_LENGTH.
* config/tc-arc.c (tokenize_flags): Likewise.
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* cgen.c (weak_operand_overflow_check): Return const char*.
* messages.c (as_internal_value_out_of_range): Formatting.
(as_warn_value_out_of_range): Consify prefix param.
(as_bad_value_out_of_range): Likewise.
* read.c (s_errwarn): Constify msg..
(s_float_space, float_cons): ..and err.
* as.h (as_warn_value_out_of_range, as_bad_value_out_of_range,
ieee_md_atof, vax_md_atof): Update prototypes.
* tc.h (md_atof): Update prototype.
* config/atof-ieee.c (ieee_md_atof): Return const char*.
* config/atof-vax.c (vax_md_atof): Likewise.
* config/obj-elf.c (obj_elf_parse_section_letters): Constify bad_msg.
* config/tc-aarch64.c (md_atof): Return const char*.
* config/tc-alpha.c (s_alpha_section_name): Likewise.
(s_alpha_comm): Constify sec_name.
(section_name): Constify.
(s_alpha_section): Consify name..
(alpha_elf_section_letter): ..and ptr_msg param..
(md_atof): ..and return.
* config/tc-alpha.h (alpha_elf_section_letter): Update prototype.
* config/tc-arc.c (md_atof): Return const char*.
* config/tc-arm.c (md_atof): Likewise.
* config/tc-avr.c (md_atof): Likewise.
* config/tc-bfin.c (md_atof): Likewise.
* config/tc-cr16.c (md_atof): Likewise.
* config/tc-cris.c (md_atof): Likewise.
* config/tc-crx.c (md_atof): Likewise.
* config/tc-d10v.c (md_atof): Likewise.
* config/tc-d30v.c (md_atof): Likewise.
* config/tc-dlx.c (md_atof): Likewise.
* config/tc-epiphany.c (md_atof): Likewise.
* config/tc-fr30.c (md_atof): Likewise.
* config/tc-frv.c (md_atof): Likewise.
* config/tc-ft32.c (md_atof): Likewise.
* config/tc-h8300.c (md_atof): Likewise.
* config/tc-hppa.c (struct default_subspace_dict): Constify name.
(struct default_space_dict): Likewise.
(create_new_space): Constify name param.
(create_new_subspace): Likewise.
(is_defined_space, is_defined_subspace): Likewise.
(pa_parse_space_stmt): Constify space_name param.
(md_atof): Return const char*.
(pa_spaces_begin): Constify name.
* config/tc-i370.c (md_atof): Return const char*.
* config/tc-i386.c (md_atof): Likewise.
(x86_64_section_letter): Constify ptr_msg param.
* config/tc-i386.h (x86_64_section_letter): Update prototype.
* config/tc-i860.c (struct i860_it): Constify error.
(md_atof): Return const char*.
* config/tc-i960.c (md_atof): Likewise.
* config/tc-ia64.c (md_atof): Likewise.
(ia64_elf_section_letter): Constify ptr_msg param.
* config/tc-ia64.h (ia64_elf_section_letter): Update prototype.
* config/tc-ip2k.c (md_atof): Return const char*.
* config/tc-iq2000.c (md_atof): Likewise.
* config/tc-lm32.c (md_atof): Likewise.
* config/tc-m32c.c (md_atof): Likewise.
* config/tc-m32r.c (md_atof): Likewise.
* config/tc-m68hc11.c (md_atof): Likewise.
* config/tc-m68k.c (md_atof): Likewise.
* config/tc-mcore.c (md_atof): Likewise.
* config/tc-mep.c (md_atof): Likewise.
(mep_elf_section_letter): Constify ptr_msg param.
* config/tc-mep.h (mep_elf_section_letter): Update prototype.
* config/tc-metag.c (md_atof): Return const char*.
* config/tc-microblaze.c (md_atof): Likewise.
* config/tc-microblaze.h (md_atof): Delete prototype.
* config/tc-mips.c (mips_parse_argument_token): Constify err.
(md_atof): Return const char*.
* config/tc-mmix.c (md_atof): Likewise.
* config/tc-mn10200.c (md_atof): Likewise.
* config/tc-mn10300.c (md_atof): Likewise.
* config/tc-moxie.c (md_atof): Likewise.
* config/tc-msp430.c (md_atof): Likewise.
* config/tc-mt.c (md_atof): Likewise.
* config/tc-nds32.c (md_atof): Likewise.
* config/tc-nios2.c (md_atof): Likewise.
(nios2_elf_section_letter): Constify ptr_msg param.
* config/tc-nios2.h (nios2_elf_section_letter): Update prototype.
* config/tc-ns32k.c (md_atof): Return const char*.
* config/tc-or1k.c (md_atof): Likewise.
* config/tc-pdp11.c (struct pdp11_code): Constify error.
(md_atof): Return const char*.
* config/tc-pj.c (md_atof): Likewise.
* config/tc-ppc.c (md_atof): Likewise.
* config/tc-rl78.c (md_atof): Likewise.
* config/tc-rx.c (md_atof): Likewise.
* config/tc-s390.c (md_atof): Likewise.
* config/tc-score.c (s3_atof, md_atof): Likewise.
* config/tc-sh.c (md_atof): Likewise.
* config/tc-sparc.c (struct sparc_it): Constify error.
(md_atof): Return const char*.
* config/tc-spu.c (md_atof): Likewise.
* config/tc-tic30.c (md_atof): Likewise.
* config/tc-tic4x.c (md_atof): Likewise.
* config/tc-tic54x.c (md_atof): Likewise.
* config/tc-tic6x.c (md_atof): Likewise.
* config/tc-tilegx.c (md_atof): Likewise.
* config/tc-tilepro.c (md_atof): Likewise.
* config/tc-v850.c (parse_register_list, md_atof): Likewise.
* config/tc-vax.c (md_atof): Likewise.
* config/tc-visium.c (md_atof): Likewise.
* config/tc-xc16x.c (md_atof): Likewise.
* config/tc-xgate.c (md_atof): Likewise.
* config/tc-xstormy16.c (md_atof): Likewise.
* config/tc-xtensa.c (md_atof): Likewise.
* config/tc-z80.c (md_atof): Likewise.
* config/tc-z8k.c (md_atof): Likewise.
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Xtensa uses it in several macros passing it a literal string, so its convenient
for the argument type to be const char *. However some of the code in
symbols.c seems to assume tc_canonicalize_symbol_name () will return a non
const pointer, and some other target's implementations even modify the
argument, so it seems best to return a char * which means casting away const on
the argument when we return it instead of another string.
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-xtensa.c (struct rename_section_struct): Make old_name
const.
(xtensa_section_rename): Make argument type const char *.
* config/tc-xtensa.h (xtensa_section_rename): Adjust.
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parse_ldconst () takes a char ** as a in / out argument, and sometimes points
args[0] to a constant string. Then in some cases after parse_ldconst ()
returns md_assemble () twiddles the contents of arg[0]. So it seems like
it would take some work to avoid these casts, and its not really clear
that work is worth it.
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-i960.c (parse_ldconst): Cast to char * when assigning to
args[0].
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For these targets its not clear how md_assemble can usefully be split up so
that part can take const char *. There is also a fair number of targets that
need md_assemble () to take a char *, so we can't easily make the argument
const. So since there isn't many callers it seems easiest to just add a couple
of casts.
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-m32c.c (m32c_md_end): cast the argument to md_assemble to
char *.
(m32c_indirect_operand): Likewise.
* config/tc-nds32.c (do_pseudo_b): Likewise.
(do_pseudo_bal): Likewise.
(do_pseudo_ls_bhw): Likewise.
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get_symbol_name () returns a char * in a out arg, which means we need to cast
to assign a literal to the variable passed to get_symbol_name (). It seems
like better APIs than get_symbol_name () could be provided, but that seems like
a fair amount of work so just casting seems to be the betterthing to do for
now.
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-ia64.c (md_assemble): Add temporary variable to pass to
get_symbol_name ().
* config/tc-sparc.c (s_register): Cast a literal to char * in
assignment.
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various places either directly or indirectly set input_line_pointer to point at
a literal. Currently lots of places modify the string input_line_pointer
points at, so making it const isn't easy. Since most if not all of these
places assign to input_line_pointer to parse an expression it would probably be
best to add ways to generate and deal with expressions that doesn't involve
parsing strings, but for now adding some casts seems easiest.
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* config/tc-i960.c (parse_expr): Cast to char * when assigning to
input_line_pointer.
* config/tc-m32r.c (expand_debug_syms): Likewise.
* config/tc-msp430.c (msp430_dstoperand): Likewise.
* config/tc-z80.c (md_begin): Likewise.
* stabs.c (stabs_generate_asm_func): Likewise.
|
|
gas/ChangeLog:
2016-03-31 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
* cgen.c: Modernize the way functions declare arguments.
* config/tc-bfin.c: Likewise.
* config/tc-pdp11.c: Likewise.
* literal.c: Likewise.
* read.c: Likewise.
* stabs.c: Likewise.
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