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* config/tc-aarch64.c (md_assemble): Defer the feature checking until
do_encode () succeeds.
gas/testsuite/
* gas/aarch64/rm-simd-ext.d: New file.
* gas/aarch64/rm-simd-ext.l: Likewise.
* gas/aarch64/rm-simd-ext.s: Likewise.
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order to avoid conflict with same named variable in MinGW system
header file.
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(OPTION_INTR_NOPS): Define.
(gen_interrupt_nops): Default to FALSE.
(md_parse_opton): Add support for OPTION_INTR_NOPS.
(md_longopts): Add -mn.
(md_show_usage): Add -mn.
(msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
* doc/c-msp430.c: Document -mn.
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BFD:
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Add nds32
files.
* Makefile.in: Regenerate.
* archures.c (bfd_nds32_arch): Add nds32 target.
* bfd-in2.h: Regenerate.
* config.bfd (nds32*le-*-linux): Add bfd_elf32_nds32lelin_vec
and bfd_elf32_nds32belin_vec.
(nds32*be-*-linux*): Likewise.
(nds32*le-*-*): Add bfd_elf32_nds32le_vec and bfd_elf32_nds32be_vec.
(nds32*be-*-*): Likewise.
* configure.in (bfd_elf32_nds32be_vec): Add elf32-nds32.lo.
(bfd_elf32_nds32le_vec): Likewise.
(bfd_elf32_nds32belin_vec): Likewise.
(bfd_elf32_nds32lelin_vec): Likewise.
* configure: Regenerate.
* cpu-nds32.c: New file for nds32.
* elf-bfd.h: Add NDS32_ELF_DATA.
* elf32-nds32.c: New file for nds32.
* elf32-nds32.h: New file for nds32.
* libbfd.h: Regenerate.
* reloc.c: Add relocations for nds32.
* targets.c (bfd_elf32_nds32be_vec): New declaration for nds32.
(bfd_elf32_nds32le_vec): Likewise.
(bfd_elf32_nds32belin_vec): Likewise.
(bfd_elf32_nds32lelin_vec): Likewise.
BINUTILS:
* readelf.c: Include elf/nds32.h
(guess_is_rela): Add case for EM_NDS32.
(dump_relocations): Add case for EM_NDS32.
(decode_NDS32_machine_flags): New.
(get_machine_flags): Add case for EM_NDS32.
(is_32bit_abs_reloc): Likewise.
(is_16bit_abs_reloc): Likewise.
(process_nds32_specific): New.
(process_arch_specific): Add case for EM_NDS32.
* NEWS: Announce Andes nds32 support.
* MAINTAINERS: Add nds32 maintainers.
TESTSUITE:
* binutils-all/objdump.exp: Add NDS32 cpu.
* binutils-all/readelf.r: Skip extra reloc created by NDS32.
GAS:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
(TARGET_CPU_HFILES): Add config/tc-nds32.h.
* Makefile.in: Regenerate.
* configure.in (nds32): Add nds32 target extension config support.
* configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
* configure: Regenerate.
* config/tc-nds32.c: New file for nds32.
* config/tc-nds32.h: New file for nds32.
* doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
* doc/Makefile.in: Regenerate.
* doc/as.texinfo: Add nds32 options.
* doc/all.texi: Set NDS32.
* doc/c-nds32.texi: New file dor nds32 document.
* NEWS: Announce Andes nds32 support.
TESTSUITE:
* gas/all/gas.exp: Add expected failures for NDS32.
* gas/elf/elf.exp: Likewise.
* gas/lns/lns.exp: Use alternate test.
* gas/macros/irp.d: Skip for NDS32.
* gas/macros/macros.exp: Skip some tests for the NDS32.
* gas/macros/rept.d: Skip for NDS32.
* gas/macros/test3.d: Skip for NDS32.
* gas/nds32: New directory.
* gas/nds32/alu-1.s: New test.
* gas/nds32/alu-1.d: Likewise.
* gas/nds32/alu-2.s: Likewise.
* gas/nds32/alu-2.d: Likewise.
* gas/nds32/br-1.d: Likewise.
* gas/nds32/br-1.s: Likewise.
* gas/nds32/br-2.d: Likewise.
* gas/nds32/br-2.s: Likewise.
* gas/nds32/ji-jr.d: Likewise.
* gas/nds32/ji-jr.s: Likewise.
* gas/nds32/ls.d: Likewise.
* gas/nds32/ls.s: Likewise.
* gas/nds32/lsi.d: Likewise.
* gas/nds32/lsi.s: Likewise.
* gas/nds32/to-16bit-v1.d: Likewise.
* gas/nds32/to-16bit-v1.s: Likewise.
* gas/nds32/to-16bit-v2.d: Likewise.
* gas/nds32/to-16bit-v2.s: Likewise.
* gas/nds32/to-16bit-v3.d: Likewise.
* gas/nds32/to-16bit-v3.s: Likewise.
* gas/nds32/nds32.exp: New test driver.
LD:
* Makefile.am (ALL_EMULATION_SOURCES): Add nds32 target.
* Makefile.in: Regenerate.
* configure.tgt: Add case for nds32*le-*-elf*, nds32*be-*-elf*,
nds32*le-*-linux-gnu*, and nds32*be-*-linux-gnu*.
* emulparams/nds32belf.sh: New file for nds32.
* emulparams/nds32belf_linux.sh: Likewise.
* emulparams/nds32belf16m.sh: Likewise.
* emulparams/nds32elf.sh: Likewise.
* emulparams/nds32elf_linux.sh: Likewise.
* emulparams/nds32elf16m.sh: Likewise.
* emultempl/nds32elf.em: Likewise.
* scripttempl/nds32elf.sc}: Likewise.
* gen-doc.texi: Set NDS32.
* ld.texinfo: Set NDS32.
* NEWS: Announce Andes nds32 support.
TESTSUITE:
* lib/ld-lib.exp: Add NDS32 to list of targets that do not support
shared library generation.
* ld-nds32: New directory.
* ld-nds32/branch.d: New test.
* ld-nds32/branch.ld: New test.
* ld-nds32/branch.s: New test.
* ld-nds32/diff.d: New test.
* ld-nds32/diff.ld: New test.
* ld-nds32/diff.s: New test.
* ld-nds32/gp.d: New test.
* ld-nds32/gp.ld: New test.
* ld-nds32/gp.s: New test.
* ld-nds32/imm.d: New test.
* ld-nds32/imm.ld: New test.
* ld-nds32/imm.s: New test.
* ld-nds32/imm_symbol.s: New test.
* ld-nds32/relax_jmp.d: New test.
* ld-nds32/relax_jmp.ld: New test.
* ld-nds32/relax_jmp.s: New test.
* ld-nds32/relax_load_store.d: New test.
* ld-nds32/relax_load_store.ld: New test.
* ld-nds32/relax_load_store.s: New test.
* ld-nds32/nds32.exp: New file.
OPCODES:
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nds32-asm.c
and nds32-dis.c.
* Makefile.in: Regenerate.
* configure.in: Add case for bfd_nds32_arch.
* configure: Regenerate.
* disassemble.c (ARCH_nds32): Define.
* nds32-asm.c: New file for nds32.
* nds32-asm.h: New file for nds32.
* nds32-dis.c: New file for nds32.
* nds32-opc.h: New file for nds32.
INCLUDE:
* dis-asm.h (print_insn_nds32): Add nds32 target.
* elf/nds32.h: New file for nds32.
* opcode/nds32.h: New file for nds32.
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These files are source files and have no business being +x. We couldn't
easily fix it in CVS (you need login+write access to the raw rcs files),
but we can fix this w/git.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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gas/
2013-12-03 Tristan Gingold <gingold@adacore.com>
* config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
overflow on pointers.
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This reverts commit 03e621be975dacc9cec9f5782698bdb098f6a49c.
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for deprecated system registers when parsing pstate fields.
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gas/
* config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
(options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
(md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
(INSN_DMULT): Define.
(INSN_DMULTU): Define.
(insns_between): Detect PMC RM7000 errata.
(md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
OPTION_NO_FIX_PMC_RM7000.
* doc/as.texinfo: Document new options.
* doc/c-mips.texi: Likewise.
gas/testsuite/
* gas/mips/fix-pmc-rm7000-1.d: New.
* gas/mips/fix-pmc-rm7000-1.s: New.
* gas/mips/fix-pmc-rm7000-2.d: New.
* gas/mips/fix-pmc-rm7000-2.s: New.
* gas/mips/micromips@fix-pmc-rm7000-1.d: New.
* gas/mips/micromips@fix-pmc-rm7000-2.d: New.
* gas/mips/mips.exp: Run new tests.
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* config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
argument.
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gas/
* config/tc-arm.c (arm_archs): New armv7ve architecture option.
(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
(cpu_arch_ver): Likewise.
* doc/c-arm.texi: Document armv7ve.
gas/testsuite/
* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.
include/opcode/
* arm.h (ARM_AEXT_V7VE): New define.
(ARM_ARCH_V7VE): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
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* config/tc-aarch64.c (parse_sys_reg): Support
S2_<op1>_<Cn>_<Cm>_<op2>.
gas/testsuite/
* gas/testsuite/sysreg.s: Add test.
* gas/testsuite/sysreg.d: Update.
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This reverts commit 75468c93c14e9f14dd9020712538c5303a455876.
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bfd/
* elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_PC32_BND
and R_X86_64_PLT32_BND.
(R_X86_64_standard): Replace R_X86_64_RELATIVE64 with
R_X86_64_PLT32_BND.
(IS_X86_64_PCREL_TYPE): Add R_X86_64_PLT32_BND.
(x86_64_reloc_map): Add BFD_RELOC_X86_64_PC32_BND and
BFD_RELOC_X86_64_PLT32_BND.
(elf_x86_64_check_relocs): Handle R_X86_64_PC32_BND and
R_X86_64_PLT32_BND.
(elf_x86_64_gc_sweep_hook): Likewise.
(elf_x86_64_relocate_section): Likewise.
* reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_PC32_BND
and BFD_RELOC_X86_64_PLT32_BND.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
gas/
* config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
indicate if instruction has the BND prefix. Return
BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
bnd_prefix isn't zero.
(output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
if needed.
(output_jump): Update reloc call.
(output_interseg_jump): Likewise.
(output_disp): Likewise.
(output_imm): Likewise.
(x86_cons_fix_new): Likewise.
(lex_got): Add an argument, bnd_prefix, to indicate if
instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
if needed.
(x86_cons): Update lex_got call.
(i386_immediate): Likewise.
(i386_displacement): Likewise.
(md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
BFD_RELOC_X86_64_PLT32_BND.
(tc_gen_reloc): Likewise.
* config/tc-i386-intel.c (i386_operator): Update lex_got call.
gas/testsuite/
* gas/i386/i386.exp: Run x86-64-mpx-branch-1 and
x86-64-mpx-branch-2 on 64-bit ELF targets.
* gas/i386/x86-64-mpx-branch-1.d: New file.
* gas/i386/x86-64-mpx-branch-1.s: Likewise.
* gas/i386/x86-64-mpx-branch-2.d: Likewise.
* gas/i386/x86-64-mpx-branch-2.s: Likewise.
include/elf/
* x86-64.h: Add R_X86_64_PC32_BND and R_X86_64_PLT32_BND.
ld/testsuite/
* ld-x86-64/mpx.exp: New file.
* ld-x86-64/mpx1.out: Likewise.
* ld-x86-64/mpx1a.c: Likewise.
* ld-x86-64/mpx1a.rd: Likewise.
* ld-x86-64/mpx1b.c: Likewise.
* ld-x86-64/mpx1c.c: Likewise.
* ld-x86-64/mpx1c.rd: Likewise.
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* config/tc-aarch64.c (set_other_error): New function.
(parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
the variable to which it points with 'o'.
(parse_operands): Update; check for write to read-only system
registers or read from write-only ones.
gas/testsuite/
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/tracereg-illegal.d: New file.
* gas/aarch64/tracereg-illegal.l: Ditto.
* gas/aarch64/tracereg-illegal.s: Ditto.
* gas/aarch64/tracereg.d: Ditto.
* gas/aarch64/tracereg.s: Ditto.
include/opcode
* aarch64.h (aarch64_sys_reg_readonly_p): New declaration.
(aarch64_sys_reg_writeonly_p): Ditto.
opcodes/
* aarch64-opc.c (CPENT): New define.
(F_READONLY, F_WRITEONLY): Likewise.
(aarch64_sys_regs): Add trace unit registers.
(aarch64_sys_reg_readonly_p): New function.
(aarch64_sys_reg_writeonly_p): Ditto.
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gas/
2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* config/tc-i386.c (check_VecOperands): Reorder checks.
gas/testsuite/
2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
* gas/i386/inval-avx512f.s: Add invalid test for gather instruction
with default mask.
* gas/i386/inval-avx512f.l: Update correspondingly.
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gas/
* config/mips/tc-mips.c (convert_reg_type): Use
INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
(reg_needs_delay): Likewise.
(insns_between): Likewise.
include/
* opcode/mips.h (INSN_LOAD_MEMORY_DELAY): Rename to...
(INSN_LOAD_MEMORY): ...this.
opcodes/
* mips-dis.c (print_insn_mips): Use
INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
(print_insn_micromips): Likewise.
* mips-opc.c (LDD): Remove.
(CLD): Include INSN_LOAD_MEMORY.
(LM): New.
(mips_builtin_opcodes): Use LM instead of LDD.
Add LM to load instructions.
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* config/tc-ppc.c (ppc_elf_localentry): Add cast.
[BR]: https://sourceware.org/ml/binutils/2013-11/msg00064.html
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* config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
call aarch64_sys_reg_deprecated_p and warn about the deprecated
system registers.
gas/testsuite/
* gas/aarch64/deprecated.d: New file.
* gas/aarch64/deprecated.l: New file.
* gas/aarch64/deprecated.s: New file.
* gas/aarch64/sysreg-1.s: Add tests.
* gas/aarch64/sysreg-1.d: Add tests.
include/opcode/
* aarch64.h (aarch64_sys_reg): New typedef.
(aarch64_sys_regs): Change to define with the new type.
(aarch64_sys_reg_deprecated_p): Declare.
opcodes/
* aarch64-opc.c (F_DEPRECATED): New macro.
(aarch64_sys_regs): Update; flag "spsr_svc" and "spsr_hyp" with
F_DEPRECATED.
(aarch64_print_operand): Call aarch64_sys_reg_deprecated_p on
AARCH64_OPND_SYSREG.
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* config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
gas/testsuite/
* gas/aarch64/alias.s: Add tests.
* gas/aarch64/alias.d: Update.
* gas/aarch64/no-aliases.d: Update.
* gas/aarch64/diagnostic.s: Add tests.
* gas/aarch64/diagnostic.l: Update.
* gas/aarch64/illegal.s: Add tests.
* gas/aarch64/illegal.l: Update.
include/opcode/
* aarch64.h (enum aarch64_operand_class): Add AARCH64_OPND_CLASS_COND.
(enum aarch64_opnd): Add AARCH64_OPND_COND1.
opcodes/
* aarch64-dis.c (convert_ubfm_to_lsl): Check for cond != '111x'.
(convert_from_csel): Likewise.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_CLASS_COND and AARCH64_OPND_COND1.
(aarch64_print_operand): Handle AARCH64_OPND_COND1.
* aarch64-tbl.h (aarch64_opcode_table): Use COND1 instead of
COND for cinc, cset, cinv, csetm and cneg.
(AARCH64_OPERANDS): Add entry for AARCH64_OPND_COND1.
* aarch64-asm-2.c: Re-generated.
* aarch64-dis-2.c: Ditto.
* aarch64-opc-2.c: Ditto.
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Parsing a vector mov instruction currently leads to a phantom undefined
symbol being added to the symbol table. e.g.:
.text
mov x0, v0.D[0]
Produces an undefined symbol called "v0.D".
gas/ChangeLog:
2013-11-05 Will Newton <will.newton@linaro.org>
PR gas/16103
* config/tc-aarch64.c (parse_operands): Avoid trying to
parse a vector register as an immediate.
gas/testsuite/ChangeLog:
2013-11-05 Will Newton <will.newton@linaro.org>
* gas/aarch64/advsimd-mov-bad.d: New file.
* gas/aarch64/advsimd-mov-bad.s: Likewise.
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Without this, constructs like "orw %rax, (%rax)" aren't being rejected
(other than any other wrong suffix/register combination).
gas/
2013-11-04 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (check_long_reg): Correct comment indentation.
(check_qword_reg): Correct comment and its indentation.
(check_word_reg): Extend comment and correct its indentation. Also
check for 64-bit register.
gas/testsuite/
2013-11-04 Jan Beulich <jbeulich@suse.com>
* gas/i386/x86-64-suffix-bad.[sl]: New.
* gas/i386/i386.exp: Run new test.
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This defines the ELF symbol st_other field used to encode the number
of instructions between a function "global entry" and its "local entry",
and adds support related to the local entry offset.
include/elf/
* ppc64.h (STO_PPC64_LOCAL_BIT, STO_PPC64_LOCAL_MASK): Define.
(ppc64_decode_local_entry, ppc64_encode_local_entry): New functions.
(PPC64_LOCAL_ENTRY_OFFSET, PPC64_SET_LOCAL_ENTRY_OFFSET): Define.
bfd/
* elf64-ppc.c (struct ppc_stub_hash_entry): Add "other".
(stub_hash_newfunc): Init new ppc_stub_hash_entry field, and one
we forgot, "plt_ent".
(ppc64_elf_add_symbol_hook): Check ELFv1 objects don't have
st_other bits only valid in ELFv2.
(ppc64_elf_merge_symbol_attribute): New function.
(ppc_type_of_stub): Add local_off param to test branch range.
(ppc_build_one_stub): Adjust destinations for ELFv2 locals.
(ppc_size_one_stub, toc_adjusting_stub_needed): Similarly.
(ppc64_elf_size_stubs): Pass local_off to ppc_type_of_stub.
Set "other" field.
(ppc64_elf_relocate_section): Adjust destination for ELFv2 local
calls.
gas/
* config/tc-ppc.c (md_pseudo_table): Add .localentry.
(ppc_elf_localentry): New function.
(ppc_force_relocation): Force relocs on all branches to localenty
symbols.
(ppc_fix_adjustable): Don't reduce such symbols to section+offset.
binutils/
* readelf.c (get_ppc64_symbol_other): New function.
(get_symbol_other): Use it for EM_PPC64.
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Defines bits in ELF e_flags to differentiate ELFv2 objects from ELFv2,
adds .abiversion directive to explicitly choose the ABI, and code to
check and automatically select ABI.
include/elf/
* ppc64.h (EF_PPC64_ABI): Define.
bfd/
* elf64-ppc.c (abiversion, set_abiversion): New functions.
(ppc64_elf_get_synthetic_symtab): Handle ELFv2 objects without .opd.
(struct ppc_link_hash_table): Add opd_abi.
(ppc64_elf_check_relocs): Check no .opd with ELFv2.
(ppc64_elf_merge_private_bfd_data): New function.
(ppc64_elf_print_private_bfd_data): New function.
(ppc64_elf_tls_setup): Set htab->opd_abi.
(ppc64_elf_size_dynamic_sections): Don't emit OPD related dynamic
tags for ELFv2.
(ppc_build_one_stub): Use R_PPC64_IRELATIVE for ELFv2 ifunc.
(ppc64_elf_finish_dynamic_symbol): Likewise
binutils/
* readelf.c (get_machine_flags): Display ABI version for EM_PPC64.
gas/
* config/tc-ppc.c: Include elf/ppc64.h.
(ppc_abiversion): New variable.
(md_pseudo_table): Add .abiversion.
(ppc_elf_abiversion, ppc_elf_end): New functions.
* config/tc-ppc.h (md_end): Define.
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This changes the behaviour of @h and @ha on PowerPC64 to report errors
on 32-bit overflow. The motivation for this change is that on
PowerPC64, most uses of @h and @ha modifiers and their corresponding
relocations are to build up 32-bit offsets. We'd like to know when
such offsets overflow. Only rarely do people use @h or @ha with the
high 32-bit modifiers to build a 64-bit constant. Those uses will now
need to use two new modifiers, @high and @higha, if the constant isn't
known at assembly time. For now, we won't report overflow at assembly
time..
This also fixes an error when applying some of the HIGHER and HIGHEST
relocations.
include/elf/
* ppc64.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): New.
(IS_PPC64_TLS_RELOC): Match new tls relocs.
bfd/
* reloc.c (BFD_RELOC_PPC64_ADDR16_HIGH, BFD_RELOC_PPC64_ADDR16_HIGHA,
BFD_RELOC_PPC64_TPREL16_HIGH, BFD_RELOC_PPC64_TPREL16_HIGHA,
BFD_RELOC_PPC64_DTPREL16_HIGH, BFD_RELOC_PPC64_DTPREL16_HIGHA): New.
* elf64-ppc.c (ppc64_elf_howto_raw): Add entries for new relocs.
Make all _HA and _HI relocs report signed overflow.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(must_be_dyn_reloc, ppc64_elf_check_relocs): Likewise.
(dec_dynrel_count, ppc64_elf_relocate_section): Likewise.
(ppc64_elf_relocate_section): Don't apply 0x8000 adjust to
R_PPC64_TPREL16_HIGHER, R_PPC64_TPREL16_HIGHEST,
R_PPC64_DTPREL16_HIGHER, and R_PPC64_DTPREL16_HIGHEST.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c (SEX16): Don't mask.
(REPORT_OVERFLOW_HI): Define as zero.
(ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
@tprel@high, and @tprel@higha modifiers.
(md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
Handle new relocs.
(md_apply_fix): Similarly.
elfcpp/
* powerpc.h (R_PPC64_ADDR16_HIGH, R_PPC64_ADDR16_HIGHA,
R_PPC64_TPREL16_HIGH, R_PPC64_TPREL16_HIGHA,
R_PPC64_DTPREL16_HIGH, R_PPC64_DTPREL16_HIGHA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Handle new relocs.
(Target_powerpc::Scan::global, local): Likewise.
(Target_powerpc::Relocate::relocate): Likewise. Check for overflow
on all ppc64 @h and @ha relocs.
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* config/tc-mips.c (fpr_read_mask): Test MSA registers.
(fpr_write_mask): Test MSA registers.
(can_swap_branch_p): Check fpr write followed by fpr read.
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Chao-ying Fu <Chao-ying.Fu@imgtec.com>
* config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
(md_longopts): Add mmsa and mno-msa.
(mips_ases): Add msa.
(RTYPE_MASK): Update.
(RTYPE_MSA): New define.
(OT_REG_ELEMENT): Replace with...
(OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
(mips_operand_token): Replace reg_element with index.
(mips_parse_argument_token): Treat vector indices as separate tokens.
Handle register indices.
(md_begin): Add MSA register names.
(operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
(convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
(match_mdmx_imm_reg_operand): Update accordingly.
(match_imm_index_operand): New function.
(match_reg_index_operand): New function.
(match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
(md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
(md_show_usage): Print -mmsa and -mno-msa.
* doc/as.texinfo: Document -mmsa and -mno-msa.
* doc/c-mips.texi: Document -mmsa and -mno-msa.
Document .set msa and .set nomsa.
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* emultempl/aix.em (_read_file): Close file at end of function.
* gas/all/itbl-test.c (main): Close fas.
* read.c (add_include_dir): Use xrealloc.
* config/tc-score.c (do_macro_bcmp): Initialise inst_main.
* config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
* readelf.c (decode_arm_unwind): Initialise addr structure.
(process_symbol_table): Free lengths.
* srcconv.c (wr_sc): Free info.
* chew.c (perform): Free next.
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opcodes/
* nios2-opc.c (nios2_builtin_reg): Use "sstatus" rather than "ba"
as the primary name of r30.
gas/
* config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
also test/refer to "sstatus". Reformat the warning message.
gas/testsuite/
* gas/nios2/warn_nobreak.l: Update text of warning messages.
* gas/nios2/registers.s: Use "sstatus" rather than "ba"
as the primary name of r30.
* gas/nios2/registers.d: Likewise.
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refactored assembler/disassember accordingly.
Testsuite checkout OK.
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2013-10-10 Jan Beulich <jbeulich@suse.com>
* tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
swapping for bndmk, bndldx, and bndstx.
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* config/tc-epiphany.c (md_convert_frag): Add missing break
statement.
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* config/tc-mn10200.c (md_convert_frag): Add missing break
statement.
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2013-10-08 Jan Beulich <jbeulich@suse.com>
* tc-i386.c (check_word_reg): Remove misplaced "else".
(check_long_reg): Restore symmetry with check_word_reg.
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2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
LR/PC check.
gas/testsuite/
2013-10-08 Jan Beulich <jbeulich@suse.com>
* gas/arm/thumb-w-good.s: Add PUSH.W and POP.W tests.
* gas/arm/thumb-w-good.d: Update accordingly.
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for "<foo>a". Issue error messages for unrecognised or corrrupt
size extensions.
* gas/msp430/bad.s: New test: Checks erroneous size extensions.
* gas/msp430/bad.d: New test command file.
* gas/msp430/bad.l: New file: Expected error messages.
* gas/msp430/msp430.exp: Run the new test.
* gas/msp430/msp430x.s: Add "<foo>.a" aliases of "<foo>a"
instructions.
* gas/msp430/msp430x.d: Update expected disassembly.
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2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
possible.
[gas/testsuite/]
2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
* gas/arm/thumb2_it.s: Add test for narrow tst.
* gas/arm/thumb2_it.d: Update expected output.
* gas/arm/thumb2_it_auto.d: Likewise.
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gas/
* config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
* doc/c-i386.texi: Add -march=bdver4 option.
gas/testsuite/
* gas/i386/i386.exp: Run bdver4 test cases.
* gas/i386/nops-1-bdver4.d: New.
* gas/i386/arch-10-bdver4.d: New.
* gas/i386/x86-64-nops-1-bdver4.d: New.
* gas/i386/x86-64-arch-2-bdver4.d: New.
opcodes/
* i386-gen.c (cpu_flag_init): Add CPU_BDVER4_FLAGS.
* i386-init.h: Regenerated.
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(move_data): New variable.
(md_parse_option): Parse -md.
(msp430_section): New function. Catch references to the .bss or
.data sections and generate a special symbol for use by the libcrt
library.
(md_pseudo_table): Intercept .section directives.
(md_longopt): Add -md
(md_show_usage): Likewise.
(msp430_operands): Generate a warning message if a NOP is inserted
into the instruction stream.
* doc/c-msp430.texi (node MSP430 Options): Document -md option.
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* config/tc-mips.c (mips_elf_final_processing): Set
EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
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The existing code would accept VLD2.64 and similar undefined
instructions.
gas/ChangeLog:
2013-09-16 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
disallowing element size 64 with interleave other than 1.
gas/testsuite/ChangeLog:
2013-09-16 Will Newton <will.newton@linaro.org>
* gas/arm/neon-ldst-es.d: Add VLD1.64 instructions.
* gas/arm/neon-ldst-es.s: Likewise.
* testsuite/gas/arm/neon-ldst-es-bad.d: New file.
* testsuite/gas/arm/neon-ldst-es-bad.l: Likewise.
* testsuite/gas/arm/neon-ldst-es-bad.s: Likewise.
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* config/tc-mips.c (match_insn): Set error when $31 is used for
bltzal* and bgezal*.
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* config/tc-ppc.c (md_apply_fix): Handle defined after use toc
symbols.
gas/testsuite/
* gas/ppc/aix.exp: Run xcoff-toc-1 test.
* gas/ppc/xcoff-toc-1.s, gas/ppc/xcoff-toc-1.d: New test.
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* config/tc-arm.c (T16_32_TAB): Add _udf.
(do_t_udf): New function.
(insns): Add "udf".
* gas/arm/udf-bad.s: New file.
* gas/arm/udf-bad.d: New file.
* gas/arm/udf-bad.l: New file.
* gas/arm/udf.s: New file.
* gas/arm/udf.d: New file.
* gas/arm/udf.l: New file.
* arm-dis.c (arm_opcodes): Add udf.
(thumb_opcodes): Use "udf" mnemonic rather than UNDEFINED_INSTRUCTION.
(thumb32_opcodes): Add udf.w.
(print_insn_thumb32): Handle %H as the thumb32_opcodes comment says.
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assembler errors at correct position.
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Fix typos:
---
bfd/bfdio.c | 2 +-
bfd/elf32-spu.c | 2 +-
bfd/elfnn-aarch64.c | 2 +-
binutils/od-xcoff.c | 2 +-
config/tcl.m4 | 2 +-
gas/config/tc-ia64.c | 2 +-
gas/config/tc-sparc.c | 2 +-
gas/config/tc-z80.c | 12 ++++++------
gas/doc/c-i386.texi | 6 +++---
gas/doc/c-m32r.texi | 2 +-
gas/testsuite/gas/d10v/instruction_packing.d | 2 +-
gas/testsuite/gas/z80/atend.d | 2 +-
gold/object.h | 2 +-
include/gdb/remote-sim.h | 2 +-
include/opcode/ChangeLog | 2 +-
include/opcode/i960.h | 2 +-
ld/testsuite/ld-mips-elf/mips16-pic-1.inc | 2 +-
opcodes/aarch64-asm.c | 2 +-
opcodes/aarch64-dis.c | 2 +-
opcodes/msp430-dis.c | 2 +-
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NEON vector load and store instructions do not accept immediates
or pre-indexed base plus offset addressing modes, so make sure that
the assembler enforces this.
gas/ChangeLog:
2013-08-23 Will Newton <will.newton@linaro.org>
* config/tc-arm.c (do_neon_ldx_stx): Add extra constraints
for pre-indexed addressing modes.
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
VLDn and VSTn instructions.
* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
gas/testsuite/ChangeLog:
2013-08-23 Will Newton <will.newton@linaro.org>
* testsuite/gas/arm/neon-addressing-bad.l: Add test for
VLDn and VSTn instructions.
* testsuite/gas/arm/neon-addressing-bad.s: Likewise.
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* config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
(mips_parse_argument_token, validate_micromips_insn, md_begin)
(check_regno, match_float_constant, check_completed_insn, append_insn)
(match_insn, match_mips16_insn, match_insns, macro_start)
(macro_build_ldst_constoffset, load_register, macro, mips_ip)
(mips16_ip, mips_set_option_string, md_parse_option)
(mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
(md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
(s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
(s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
Start error messages with a lower-case letter. Do not end error
messages with a period. Wrap long messages to 80 character-lines.
Use "cannot" instead of "can't" and "can not".
gas/testsuite/
* gas/mips/ase-errors-1.l, gas/mips/ase-errors-2.l,
gas/mips/ase-errors-3.l, gas/mips/ase-errors-4.l, gas/mips/at-2.l,
gas/mips/baddata1.l, gas/mips/elf-rel30.l, gas/mips/illegal.l,
gas/mips/jalr.l, gas/mips/ldstla-32-1.l, gas/mips/ldstla-32-mips3-1.l,
gas/mips/lui-1.l, gas/mips/macro-warn-1.l, gas/mips/macro-warn-1-n32.l,
gas/mips/macro-warn-2.l, gas/mips/macro-warn-3.l,
gas/mips/macro-warn-4.l, gas/mips/micromips-branch-delay.l,
gas/mips/micromips-branch-relax.l,
gas/mips/micromips-branch-relax-pic.l, gas/mips/micromips-ill.l,
gas/mips/micromips.l, gas/mips/micromips-size-0.l,
gas/mips/micromips-size-1.l, gas/mips/micromips-warn-branch-delay.l,
gas/mips/micromips-warn.l, gas/mips/mips16e-64.l,
gas/mips/mips16e-save-err.l, gas/mips/mips1-fp.l,
gas/mips/mips32r2-fp32.l, gas/mips/mips32r2-ill.l,
gas/mips/mips32-sf32.l, gas/mips/mips4-branch-likely.l,
gas/mips/mips4-fp.l, gas/mips/mips5-fp.l, gas/mips/mips64-mips3d.l,
gas/mips/mips-double-float-flag.l, gas/mips/mips-gp64-fp32.l,
gas/mips/mips-gp64-fp64.l, gas/mips/mips-hard-float-flag.l,
gas/mips/mips-macro-ill-nofp.l, gas/mips/mips-macro-ill-sfp.l,
gas/mips/nan-error-1.l, gas/mips/nan-error-2.l, gas/mips/noat-2.l,
gas/mips/noat-3.l, gas/mips/noat-4.l, gas/mips/noat-5.l,
gas/mips/noat-6.l, gas/mips/noat-7.l, gas/mips/octeon-ill.l,
gas/mips/r5900-error-vu0.l, gas/mips/r5900-nollsc.l,
gas/mips/relax-bc1any.l, gas/mips/relax-bposge.l, gas/mips/relax.l,
gas/mips/relax-swap1.l, gas/mips/relax-swap2.l, gas/mips/set-arch.l,
gas/mips/tls-ill.l, gas/mips/vr5400-ill.l: Adjust expected output.
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