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2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
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* config/tc-ia64.c (pseudo_func): Add ABI constants for linux,
freebsd, openvms, and nsk (non-stop kernel).
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all locals have been declared.
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special handling for n32 ABI.
(macro): Likewise.
* gas/mips/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* gas/mips/elf-rel-xgot-n32.d: Likewise.
* gas/mips/jal-newabi.d: Likewise.
* ld-mips-elf/elf-rel-got-n32.d: Remove special handling for n32 ABI.
* ld-mips-elf/elf-rel-xgot-n32.d: Likewise.
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now, not only a warning. Add some more checks to detect invalid
registers.
(get_operand): For CLASS_IR remember register size in mode struct.
(get_specific): Handle new CLASS_IRO type. Add register size
checks for CLASS_IR and CLASS_IRO.
(md_apply_fix3): Fix undefined usage of buf.
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(ppc_change_csect): Add align param. Align frag at start of csect.
(ppc_section, ppc_named_section): Adjust ppc_change_csect calls.
(ppc_frob_section): Align vma.
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dependent on s390_arch_size and current_cpu dependent on
current_mode_mask.
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".TOC." from PPC64_TOC relocs.
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ADDRESS_LOAD_INSN,ADDRESS_STORE_INSN): New macros.
(macro_build_ldst_constoffset,load_address,macro,s_cpsetup,
s_cprestore,s_cpadd): Use them.
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em=linux.
* configure: Regenerate.
* config/tc-cris.c (DEFAULT_CRIS_AXIS_LINUX_GNU): New macro, TRUE
if TE_LINUX defined, else FALSE.
(bfd_boolean demand_register_prefix): Set default from
DEFAULT_CRIS_AXIS_LINUX_GNU.
(symbols_have_leading_underscore): Similar.
* config/tc-cris.h (LOCAL_LABELS_DOLLAR): Define to 1.
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(FPU_DEFAULT, case TE_NetBSD): Default to FPU_ARCH_VFP for ELF,
FPU_ARCH_FPA for AOUT.
(md_begin): Don't try to guess the floating point architecture from
the CPU if the OS ABI (Linux, NetBSD) mandates a particular form.
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field width from the final (outermost) operator.
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(s_cprestore): Likewise.
(s_cpreturn): Likewise.
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with zeros.
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(elf_mips_howto_table_rel): Use it.
(gprel32_with_gp): Move prototype.
(mips_elf_hi16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Use mips_elf_generic_reloc.
(mips_elf_got16_reloc): Check for ! BSF_LOCAL instead of zero addend.
Code cleanup.
(_bfd_mips_elf32_gprel16_reloc): Check for ! BSF_LOCAL instead of
zero addend.
(mips_elf_gprel32_reloc): Likewise. Use the same GP assignment logic
as in the other *_gprel*_reloc functions.
(gprel32_with_gp): Handle partial_inplace properly.
(mips32_64bit_reloc): Use mips_elf_generic_reloc.
(mips16_gprel_reloc): Check for ! BSF_LOCAL instead of zero addend.
Do addend handling directly instead of calling
_bfd_mips_elf_gprel16_with_gp. Handle partial_inplace properly.
* elf64-mips.c (mips_elf64_hi16_reloc): Check for ! BSF_LOCAL instead
of zero addend. Handle partial_inplace properly.
(mips_elf64_got16_reloc): Check for ! BSF_LOCAL instead of zero
addend.
(mips_elf64_gprel16_reloc): Likewise.
(mips_elf64_literal_reloc): Likewise.
(mips_elf64_gprel32_reloc): Likewise. Use the same GP assignment
logic as in the other *_gprel*_reloc functions. Handle
partial_inplace properly.
(mips_elf64_shift6_reloc): Check for ! BSF_LOCAL instead of zero
addend. Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfn32-mips.c (mips_elf_got16_reloc): Check for BSF_LOCAL.
(mips_elf_gprel32_reloc): Check for ! BSF_LOCAL instead
of zero addend.
(mips_elf_shift6_reloc): Handle partial_inplace properly.
(mips16_gprel_reloc): Likewise. Do addend handling directly instead
of calling _bfd_mips_elf_gprel16_with_gp.
* elfxx-mips.c (_bfd_mips_elf_gprel16_with_gp): Handle
partial_inplace properly. Fix wrong addend handling. Fix overflow
check.
(_bfd_mips_elf_sign_extend): Renamed from mips_elf_sign_extend and
exported.
(mips_elf_calculate_relocation): Use _bfd_mips_elf_sign_extend.
(_bfd_mips_elf_relocate_section): Likewise.
(mips_elf_create_dynamic_relocation): Update sec_info_type access.
* elfxx-mips.h (_bfd_mips_relax_section): Fix prototype declaration.
(_bfd_mips_elf_sign_extend): New prototype.
* config/tc-mips.c (md_pcrel_from): Return actual pcrel address.
(md_apply_fix3): Ignore non-special relocations. Remove superfluous
exceptions from size assert. Remove most of the addend fixup
specialcasing. Remove value, use valP directly. simplify fx_addnumber
handling. Remove zero addend specialcases.
(tc_gen_reloc): Use appropriate value for reloc2 addend. Remove
the addend fixup specialcase.
* config/tc-mips.h (MD_APPLY_SYM_VALUE): Define as 0.
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* config/tc-mn10200.c (tc_gen_reloc): Don't ignore fx_subsy.
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* cgen-asm.in (@arch@_cgen_assemble_insn): CGEN_INSN_RELAX renamed to
CGEN_INSN_RELAXED.
* fr30-asm.c,fr30-desc.c,fr30-desc.h: Regenerate.
* frv-asm.c,frv-desc.c,frv-desc.h: Regenerate.
* ip2k-asm.c,ip2k-desc.c,ip2k-desc.h: Regenerate.
* iq2000-asm.c,iq2000-desc.c,iq2000-desc.h: Regenerate.
* m32r-asm.c,m32r-desc.c,m32r-desc.h,m32r-opc.c: Regenerate.
* openrisc-asm.c,openrisc-desc.c,openrisc-desc.h: Regenerate.
* xstormy16-asm.c,xstormy16-desc.c,xstormy16-desc.h: Regenerate.
gas:
* cgen.c (gas_cgen_finish_insn): CGEN_INSN_RELAX renamed to
CGEN_INSN_RELAXED.
* config/tc-fr30.c (md_estimate_size_before_relax): Ditto.
* config/tc-m32r.c (md_estimate_size_before_relax): Ditto.
* config/tc-openrisc.c (md_estimate_size_before_relax): Ditto.
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* h8300-dis.c (bfd_h8_disassemble): Don't print brackets round
rts/l and rte/l register lists.
gas/
* config/tc-h8300.c (get_rtsl_operands): Accept unbracketed register
lists. Allow single-register ranges.
testsuite/
* gas/h8300/h8sx_rtsl.[sd]: New test.
* gas/h8300/h8300.exp: Run it.
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* h8.h (E_H8_MACH_H8300SXN): New flag.
bfd/
* archures.c (bfd_mach_h8300sxn): New architecture.
* bfd-in2.h: Regenerate.
* cpu-h8300.c (h8300_scan): Check for 'sxn'.
(h8300sxn_info_struct): New.
(h8300sx_info_struct): Link to it.
* elf32-h8300.c (elf32_h8_mach): Add h8300sxn case.
(elf32_h8_final_write_processing): Likewise.
gas/
* config/tc-h8300.c (h8300sxnmode): New.
(md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version.
ld/
* configure.tgt (h8300*): Add h8300sxn emulations.
* Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o.
(eh8300sxn.c, eh8300sxnelf.c): New rules.
* Makefile.in: Regenerate.
* emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
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* NEWS: Updated for the new -n option for the i386 assembler.
* config/tc-i386.c (optimize_align_code): New.
(md_shortopts): Add 'n'.
(md_parse_option): Handle 'n'.
(md_show_usage): Add '-n'.
* config/tc-i386.h (optimize_align_code): Declared.
(md_do_align): Optimize code alignment only if optimize_align_code
is not 0.
* doc/as.texinfo: Add the new -n option.
* doc/c-i386.texi: Document the new -n option.
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* config/tc-h8sx.c (get_specific): Distinguish h8h from h8s ops.
(build_bytes): Ditto.
2003-06-05 Richard Sandiford <rsandifo@redhat.com>
* config/tc-h8sx.c (DMODE): Remove.
(colonmod24): Don't choose a default if the operand is a 16-bit
constant integer.
(fix_operand_size): New function.
(md_assemble): Use it to choose between @(d:2, ERn) and @(d:16,ERn).
Adjust @(d:2,ERn) operands before choosing the specific opcodes.
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(md_pseudo_table): Add it.
(alpha_cfi_frame_initial_instructions): New.
* config/tc-alpha.h (TARGET_USE_CFIPOP): New.
(tc_cfi_frame_initial_instructions): New.
* doc/c-alpha.texi: Document .usepv.
* gas/alpha/elf-usepv-1.[sd]: New.
* gas/alpha/elf-usepv-2.[sd]: New.
* gas/alpha/alpha.exp: Run them.
* gas/cfi/cfi-alpha-3.[sd]: New.
* gas/cfi/cfi.exp: Run it.
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* config/tc-mips.c: (OPTION_ARCH_BASE, OPTION_ASE_BASE)
(OPTION_COMPAT_ARCH_BASE, OPTION_FIX_BASE)
(OPTION_MISC_BASE): New defines.
(OPTION_BREAK, OPTION_CONSTRUCT_FLOATS, OPTION_EB, OPTION_EL)
(OPTION_ELF_BASE, OPTION_FIX_VR4122, OPTION_FP32, OPTION_FP64)
(OPTION_GP32, OPTION_GP64, OPTION_M3900, OPTION_M4010, OPTION_M4100)
(OPTION_M4650, OPTION_M7000_HILO_FIX, OPTION_MARCH, OPTION_MDMX)
(OPTION_MEMBEDDED_PIC, OPTION_MIPS1, OPTION_MIPS16, OPTION_MIPS2)
(OPTION_MIPS3, OPTION_MIPS32, OPTION_MIPS32R2, OPTION_MIPS3D)
(OPTION_MIPS4, OPTION_MIPS5, OPTION_MIPS64)
(OPTION_MNO_7000_HILO_FIX, OPTION_MTUNE, OPTION_NO_CONSTRUCT_FLOATS)
(OPTION_NO_FIX_VR4122, OPTION_NO_M3900, OPTION_NO_M4010)
(OPTION_NO_M4100, OPTION_NO_M4650, OPTION_NO_MDMX, OPTION_NO_MIPS16)
(OPTION_NO_MIPS3D, OPTION_NO_RELAX_BRANCH, OPTION_RELAX_BRANCH)
(OPTION_TRAP): Redefine in terms of new defines.
(md_longopts): Reorder entries.
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From Bernd Schmidt <bernds@redhat.com>
and Michael Snyder <msnyder@redhat.com>
and Alexandre Oliva <aoliva@redhat.com>
* config/tc-h8300.c: Add insns and addressing modes for h8300sx.
* config/tc-h8300.h: Ditto.
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(all_frame_data, plast_frame_data, cur_frame_data): New.
(s_alpha_ent): Record data for dwarf2 cfi.
(s_alpha_end, s_alpha_mask, s_alpha_frame, s_alpha_prologue): Likewise.[
(alpha_elf_md_end): Emit dwarf2 cfi for ecoff unwind directives.
* config/tc-alpha.h (md_end): New.
(DWARF2_DEFAULT_RETURN_COLUMN): New.
(DWARF2_CIE_DATA_ALIGNMENT): New.
* gas/alpha/elf-reloc-8.d: Add .eh_frame relocs.
* gas/cfi/cfi-alpha-1.d: New.
* gas/cfi/cfi-alpha-1.s: New.
* gas/cfi/cfi.exp: Run it.
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* as.c (main): Always call cfi_finish.
* config/tc-i386.c (x86_dwarf2_return_column): New.
(x86_cie_data_alignment): New.
(md_begin): Set them.
(tc_x86_cfi_init): Remove.
(tc_x86_regname_to_dw2regnum): Fix 32-bit register numbers;
return int, not unsigned long; don't as_bad here.
(tc_x86_frame_initial_instructions): Streamline; use
updated api.
* config/tc-i386.h (tc_cfi_init): Remove.
(DWARF2_DEFAULT_RETURN_COLUMN): New.
(DWARF2_CIE_DATA_ALIGNMENT): New.
* gas/cfi/cfi-i386.d: Update for dw2gencfi rewrite.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/cfi/cfi-i386-2.d: New.
* gas/cfi/cfi-i386-2.s: New.
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gas:
* config/tc-i860.c (target_xp): Declare variable.
(OPTION_XP): Declare macro.
(md_longopts): Add option -mxp.
(md_parse_option): Set target_xp.
(md_show_usage): Add -mxp usage.
(i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
(md_assemble): Don't try expansions if XP_ONLY is set.
* doc/c-i860.texi: Document -mxp option.
gas/testsuite:
* gas/i860/xp.s: New file.
* gas/i860/xp.d: New file.
include/opcode:
* i860.h (expand_type): Add XP_ONLY.
(scyc.b): New XP instruction.
(ldio.l): Likewise.
(ldio.s): Likewise.
(ldio.b): Likewise.
(ldint.l): Likewise.
(ldint.s): Likewise.
(ldint.b): Likewise.
(stio.l): Likewise.
(stio.s): Likewise.
(stio.b): Likewise.
(pfld.q): Likewise.
opcodes:
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
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* config/tc-mips.c (macro_build_jalr): Warning patrol.
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fixp's. Don't relax overflow checking for partial_inplace relocations.
Use the actual relocation type in combined relocs, not just the type
of the first one.
(macro_build_jalr): Use actual relocation size for new fix.
(s_cpsetup, s_gpdword): Likewise.
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section symbol.
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Alexandre Oliva <aoliva@redhat.com>
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Adjust
pic tests, change to warning.
(_bfd_mips_elf_final_link): Remove EF_MIPS_CPIC flag setting.
2003-05-07 Eric Christopher <echristo@redhat.com>
* config/tc-mips.c (mips_abicalls): New variable.
(md_parse_option): Use.
(s_option): Ditto.
(s_abicalls): Ditto.
(mips_elf_final_processing): Set EF_MIPS_PIC and
EF_MIPS_CPIC dependent on above.
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* testsuite/gas/hppa/parse/parse.exp: Add "space.s".
* testsuite/gas/hppa/parse/space.s: New file to test spaces.
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* config/tc-i386.c (tc_x86_cfi_init): New function.
* config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines.
* as.c (parse_args): Set verbose flag on --verbose.
(main): Call tc_cfi_init()/cfi_finish().
* as.h (verbose): New external variable.
* read.c (pobegin): Insert CFI pops to the list.
* symbols.c (local_symbol_make): Make symbol external.
* symbols.h (local_symbol_make): New prototype.
* Makefile.am: Add dw2gencfi.[ch] files. Run "make dep-am".
* Makefile.in: Regenerate.
* doc/as.texinfo: Added node "CFI directives" with description of
all implemented .cfi_* directives.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
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(tic4x_start_line): Fixed scrub bug and added error for three-element
parallel insns.
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gas:
* config/tc-i860.c (i860_process_insn): Initialize fc after
each opcode mismatch.
include/opcode:
* i860.h (form, pform): Add missing .dd suffix.
opcodes:
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
print it.
bfd:
* elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
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* config/tc-i860.c (MAX_FIXUPS): Define.
(struct i860_fi fi[]): New struct.
(struct i860_it the_insn): Add above as member and move fields
exp, reloc, pcrel and fup into i860_fi.
(md_assemble): Replace all instances of exp, reloc, pcrel
and fup with fi[].exp, fi[].reloc, fi[].pcrel, fi[].fup.
Add a loop to possibly emit multiple fix-ups for each insn.
(i860_process_insn): Likewise.
(i860_get_expression): Likewise.
(md_apply_fix3): Use a bitwise check for OP_IMM_U5, not equality.
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2003-05-07 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-ia64.c (alias_hash): New.
(alias_name_hash): New.
(secalias_hash): New.
(secalias_name_hash): New.
(md_pseudo_table): Add "secalias".
(md_begin): Initialize alias_hash, alias_name_hash,
secalias_hash and secalias_name_hash.
(struct alias): New.
(dot_alias): Implement .alias and .secalias directives.
(do_alias): New.
(ia64_adjust_symtab): New.
(do_secalias): New.
(ia64_frob_file): New.
* config/tc-ia64.h (ia64_adjust_symtab): New.
(tc_adjust_symtab): Defined.
(ia64_frob_file): New.
(tc_frob_file): Defined.
gas/testsuite/
2003-05-07 H.J. Lu <hongjiu.lu@intel.com>
* gas/ia64/ia64.exp: Add alias.
* gas/ia64/alias.s: New.
* gas/ia64/alias.d: Likewise.
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